February 4, 2011
Lev Uvarov
Control/Status Register Group Update
CSR_REQ = 0x2E – L1 Request Configuration
™ RW: VM / MA
This read/write register allows delaying L1REQ signal, before it has been sent to the
backplane. The delay in implemented with the Synchronous FFO, so besides the delay setting,
the register allows to read the actual REQ FIFO word count.
Table 1: CSR_REQ / VM Data Format for 060801 and later versions
D15
X
0
NU
D14
X
RFC6
D13
X
RFC5
D12
D11
D10
D9
X
X
X
X
RFC4 RFC3 RFC2 RFC1
Request FIFO Word Count
D8
X
RFC0
D7
X
0
NU
D6
D5
D4
D3
D2
D1
D0 CYCL
LRD6 LRD5 LRD4 LRD3 LRD2 LRD1 LRD0
W
LRD6 LRD5 LRD4 LRD3 LRD2 LRD1 LRD0
R
L1 Request Delay [6:0]
Here:
− X – don’t care bit;
− LRD [6:0] = 0 (default)…127 – Additional delay for L1Request signal being sent to
the Backplane;
− RFC [6:0] = 0 (default)…127 – Actual L1 Request FIFO Word Count.
™ RW: SP / MA
This read/write register allows choosing the source of L1 request signals to be sent by the
SP05 to the backplane. Normally, the L1 Request is an OR of tracks with none-zero Modes,
found by the SP05 core logic. The user can also chose the L1 Request to be generated on an OR
of Valid Pattern bit occurrences for enabled CSC muons and non-zero quality occurrences for
enabled DT muons.
Beginning with firmware version 080421, triggers on singles from enabled ME VP
or/and MB quality bits generate pseudo tracks being passed to the MS with Mode = 11 = 0xB,
and the SPE bit also controls the SP_CORE output to the MS.
Beginning with firmware version 110204 mode for singles changed to Mode = 1.
Table 2: CSR_REQ / SP Data Format for 071025 and later (but earlier than 110202) versions
D15
SPE
SPE
Tracks
Enable
D14
X
0
D13
X
0
D12
X
0
D11
X
0
D10
X
0
D9
D8
MB1D MB1A
MB1D MB1A
DT Singles
Enable
D7
X
0
D6
X
0
D5
X
0
D4
F5E
F5E
D3
F4E
F4E
D2
F3E
F3E
D1
F2E
F2E
D0
F1E
F1E
CYCL
W
R
CSC Singles Enable
Here:`
− X – don’t care bit;
− F1E = 0 (default) /1 – Disable (default) / Enable VP-bits of F1 muons to be a source
of L1 Request;
− F2E = 0 (default) /1 – Disable (default) / Enable VP-bits of F2 muons to be a source
of L1 Request;
− F3E = 0 (default) /1 – Disable (default) / Enable VP-bits of F3 muons to be a source
of L1 Request;
− F4E = 0 (default) /1 – Disable (default) / Enable VP-bits of F4 muons to be a source
of L1 Request;
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Lev Uvarov
− F5E = 0 (default) /1 – Disable (default) / Enable VP-bits of F5 muons to be a source
of L1 Request;
− MB1A = 0 (default) /1 – Disable (default) / Enable non-zero quality of MB1A
muons to be a source of L1 Request;
− MB1D = 0 (default) /1 – Disable (default) / Enable non-zero quality of MB1D
muons to be a source of L1 Request;
− SPE = 0 / 1 (default) – Disable / Enable (default) none-zero Mode output of the
SP05 core to be a source of L1 Request.
Table 3: CSR_REQ / SP Data Format for 060801 and later (but earlier than 071025) versions
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0 CYCL
SPE ME4C ME4B ME4A ME3C ME3B ME3A ME2C ME2B ME2A ME1F ME1E ME1D ME1C ME1B ME1A
W
SPE ME4C ME4B ME4A ME3C ME3B ME3A ME2C ME2B ME2A ME1F ME1E ME1D ME1C ME1B ME1A
R
Tracks
CSC Singles Enable
Enable
Here:`
− X – don’t care bit for writes and zero for reads;
− ME1A…ME4C = 0 (default) /1 – Disable (default) / Enable VP-bit of
ME1A…ME4C muons to be a source of L1 Request;
− SPE = 0 / 1 (default) – Disable / Enable (default) none-zero Mode output of the
SP05 core to be a source of L1 Request.
Data Register Group Update
DAT_ETA = 0x68 – Eta Register File
™ RW: SP / MA
This read/write register provides access to the register file content, which keeps a set of
angle constraints for collision and halo muons. The SP core logic uses these constraints, when it
builds tracks from the input stubs. The total number of constraints in the register file depends on
the core logic version. As a rule, all constraints should be loaded or read out as an array of
values, after resetting the register file address counter with ACT_ACR command. Alternatively,
when only single constraint should be updated, the user may first download a constraint number
in the address counter with the CNT_ETA command, and then load a constraint value with the
DAT_ETA command.
This register is protected against accidental accesses: in order to get VME access to this
register the SP05 should be set to the VME fast control mode.
Table 4: DAT_ETA / SP Data Format for 110202 and later versions
Core Version #2
#
0
1
Constraint Name
Minimum eta difference for track cancellation logic1
Minimum eta difference for halo track cancellation logic1
1
Value
Range
N/A
N/A
Parameter is demoted to a placeholder only, which accepts writes and returns 0xFFFF on reads
2 of 8
Default
Value
0xFFFF
0xFFFF
February 4, 2011
#
Lev Uvarov
Constraint Name
2
3
4
5
6
7
8
9
Minimum eta for ME1-ME2 collision tracks
Minimum eta for ME1-ME3 collision tracks
Minimum eta for ME2-ME3 collision tracks
Minimum eta for ME2-ME4 collision tracks
Minimum eta for ME3-ME4 collision tracks
Minimum eta for ME1-ME2 collision tracks in overlap region1
Minimum eta for ME2-MB1 collision tracks
Minimum eta for ME1-ME4 collision tracks
10
11
12
13
Minimum eta difference for ME1-ME2 (except ME1/1) halo tracks
Minimum eta difference for ME1-ME3 (except ME1/1) halo tracks
Minimum eta difference for ME1/1-ME2 halo tracks
Minimum eta difference for ME1/1-ME3 halo tracks
14
15
16
17
18
19
20
21
Maximum eta for ME1-ME2 collision tracks
Maximum eta for ME1-ME3 collision tracks
Maximum eta for ME2-ME3 collision tracks
Maximum eta for ME2-ME4 collision tracks
Maximum eta for ME3-ME4 collision tracks
Maximum eta for ME1-ME2 collision tracks in overlap region1
Maximum eta for ME2-MB1 collision tracks
Maximum eta for ME1-ME4 collision tracks
22
23
24
25
Maximum eta difference for ME1-ME2 (except ME1/1) halo tracks
Maximum eta difference for ME1-ME3 (except ME1/1) halo tracks
Maximum eta difference for ME1/1-ME2 halo tracks
Maximum eta difference for ME1/1-ME3 halo tracks
26
27
28
29
30
31
32
Eta window for ME1-ME2 collision tracks
Eta window for ME1-ME3 collision tracks
Eta window for ME2-ME3 collision tracks
Eta window for ME2-ME4 collision tracks
Eta window for ME3-ME4 collision tracks
Eta window for ME1-ME2 collision tracks in overlap region1
Eta window for ME1-ME4 collision tracks
33 Maximum phi difference for ME1-ME2 (except ME1/1) halo tracks
34 Maximum phi difference for ME1-ME3 (except ME1/1) halo tracks
35 Maximum phi difference for ME1/1-ME2 halo tracks
3 of 8
Value
Range
Default
Value
0-127
0-127
0-127
0-127
0-127
N/A
0-127
0-127
7
14
14
21
21
0xFFFF
1
21
0-127
0-127
0-127
0-127
8
19
19
30
0-127
0-127
0-127
0-127
0-127
N/A
0-127
0-127
127
127
127
127
127
0xFFFF
24
127
0-127
0-127
0-127
0-127
14
25
25
36
0-255
0-255
0-255
0-255
0-255
N/A
0-255
6
6
6
6
6
0xFFFF
6
0-1023
0-1023
0-1023
64
64
64
February 4, 2011
#
Lev Uvarov
Constraint Name
36 Maximum phi difference for ME1/1-ME3 halo tracks
37 Minimum phi difference for track cancellation logic1
38 Minimum phi difference for halo track cancellation logic1
39 Parameter for the correction of misaligned 1-2-3-4 straight tracks
40 Parameter for the correction of misaligned 1-2-3-4 curved tracks
41 Phi Offset for MB1A, D[12] – sign, D[11:0] – value
42 Phi Offset for MB1D, D[12] – sign, D[11:0] – value
Value
Range
0-1023
N/A
N/A
Default
Value
64
0xFFFF
0xFFFF
0-4095
0-4095
-4095 to
4095
-4095 to
4095
60
200
0
2048
Table 5: DAT_ETA / SP Data Format for 090915 and later (but earlier than 110202) versions
Core Version #2
#
Constraint Name
Value
Range
0-31
0-31
Default
Value
8
8
0
1
Minimum eta difference for track cancellation logic
Minimum eta difference for halo track cancellation logic
2
3
4
5
6
7
8
9
Minimum eta for ME1-ME2 collision tracks
Minimum eta for ME1-ME3 collision tracks
Minimum eta for ME2-ME3 collision tracks
Minimum eta for ME2-ME4 collision tracks
Minimum eta for ME3-ME4 collision tracks
Minimum eta for ME1-ME2 collision tracks in overlap region
Minimum eta for ME2-MB1 collision tracks
Minimum eta for ME1-ME4 collision tracks
0-127
0-127
0-127
0-127
0-127
0-127
0-127
0-127
22
22
14
14
14
14
10
22
10
11
12
13
Minimum eta difference for ME1-ME2 (except ME1/1) halo tracks
Minimum eta difference for ME1-ME3 (except ME1/1) halo tracks
Minimum eta difference for ME1/1-ME2 halo tracks
Minimum eta difference for ME1/1-ME3 halo tracks
0-127
0-127
0-127
0-127
8
19
19
30
14
15
16
17
18
19
20
Maximum eta for ME1-ME2 collision tracks
Maximum eta for ME1-ME3 collision tracks
Maximum eta for ME2-ME3 collision tracks
Maximum eta for ME2-ME4 collision tracks
Maximum eta for ME3-ME4 collision tracks
Maximum eta for ME1-ME2 collision tracks in overlap region
Maximum eta for ME2-MB1 collision tracks
0-127
0-127
0-127
0-127
0-127
0-127
0-127
127
127
127
127
127
24
24
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Lev Uvarov
Constraint Name
21 Maximum eta for ME1-ME4 collision tracks
Value
Range
0-127
Default
Value
127
22
23
24
25
Maximum eta difference for ME1-ME2 (except ME1/1) halo tracks
Maximum eta difference for ME1-ME3 (except ME1/1) halo tracks
Maximum eta difference for ME1/1-ME2 halo tracks
Maximum eta difference for ME1/1-ME3 halo tracks
0-127
0-127
0-127
0-127
14
25
25
36
26
27
28
29
30
31
32
Eta window for ME1-ME2 collision tracks
Eta window for ME1-ME3 collision tracks
Eta window for ME2-ME3 collision tracks
Eta window for ME2-ME4 collision tracks
Eta window for ME3-ME4 collision tracks
Eta window for ME1-ME2 collision tracks in overlap region
Eta window for ME1-ME4 collision tracks
0-255
0-255
0-255
0-255
0-255
0-255
0-255
4
4
4
4
4
4
4
33
34
35
36
Maximum phi difference for ME1-ME2 (except ME1/1) halo tracks
Maximum phi difference for ME1-ME3 (except ME1/1) halo tracks
Maximum phi difference for ME1/1-ME2 halo tracks
Maximum phi difference for ME1/1-ME3 halo tracks
0-1023
0-1023
0-1023
0-1023
64
64
64
64
0-4095
0-4095
128
128
0-4095
0-4095
-4095 to
4095
-4095 to
4095
60
200
37 Minimum phi difference for track cancellation logic
38 Minimum phi difference for halo track cancellation logic
39 Parameter for the correction of misaligned 1-2-3-4 straight tracks
40 Parameter for the correction of misaligned 1-2-3-4 curved tracks
41 Phi Offset for MB1A, D[12] – sign, D[11:0] – value
42 Phi Offset for MB1D, D[12] – sign, D[11:0] – value
0
2048
Table 6: DAT_ETA / SP Data Format for 090601 and 090701 versions,
Core Version #2
#
Constraint Name
0
1
Minimum eta difference for track cancellation logic
Minimum eta difference for halo track cancellation logic
2
3
4
Minimum eta for ME1-ME2 collision tracks
Minimum eta for ME1-ME3 collision tracks
Minimum eta for ME2-ME3 collision tracks
5 of 8
Value
Range
0-31
0-31
Default
Value
8
8
0-127
0-127
0-127
22
22
14
February 4, 2011
#
Lev Uvarov
Constraint Name
Value
Range
0-127
0-127
0-127
0-127
0-127
Default
Value
14
14
14
10
22
5
6
7
8
9
Minimum eta for ME2-ME4 collision tracks
Minimum eta for ME3-ME4 collision tracks
Minimum eta for ME1-ME2 collision tracks in overlap region
Minimum eta for ME2-MB1 collision tracks
Minimum eta for ME1-ME4 collision tracks
10
11
12
13
Minimum eta difference for ME1-ME2 (except ME1/1) halo tracks
Minimum eta difference for ME1-ME3 (except ME1/1) halo tracks
Minimum eta difference for ME1/1-ME2 halo tracks
Minimum eta difference for ME1/1-ME3 halo tracks
0-127
0-127
0-127
0-127
8
19
19
30
14
15
16
17
18
19
20
21
Maximum eta for ME1-ME2 collision tracks
Maximum eta for ME1-ME3 collision tracks
Maximum eta for ME2-ME3 collision tracks
Maximum eta for ME2-ME4 collision tracks
Maximum eta for ME3-ME4 collision tracks
Maximum eta for ME1-ME2 collision tracks in overlap region
Maximum eta for ME2-MB1 collision tracks
Maximum eta for ME1-ME4 collision tracks
0-127
0-127
0-127
0-127
0-127
0-127
0-127
0-127
127
127
127
127
127
24
24
127
22
23
24
25
Maximum eta difference for ME1-ME2 (except ME1/1) halo tracks
Maximum eta difference for ME1-ME3 (except ME1/1) halo tracks
Maximum eta difference for ME1/1-ME2 halo tracks
Maximum eta difference for ME1/1-ME3 halo tracks
0-127
0-127
0-127
0-127
14
25
25
36
26
27
28
29
30
31
32
Eta window for ME1-ME2 collision tracks
Eta window for ME1-ME3 collision tracks
Eta window for ME2-ME3 collision tracks
Eta window for ME2-ME4 collision tracks
Eta window for ME3-ME4 collision tracks
Eta window for ME1-ME2 collision tracks in overlap region
Eta window for ME1-ME4 collision tracks
0-255
0-255
0-255
0-255
0-255
0-255
0-255
4
4
4
4
4
4
4
33
34
35
36
Maximum phi difference for ME1-ME2 (except ME1/1) halo tracks
Maximum phi difference for ME1-ME3 (except ME1/1) halo tracks
Maximum phi difference for ME1/1-ME2 halo tracks
Maximum phi difference for ME1/1-ME3 halo tracks
0-1023
0-1023
0-1023
0-1023
64
64
64
64
0-4095
0-4095
128
128
37 Minimum phi difference for track cancellation logic
38 Minimum phi difference for halo track cancellation logic
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#
Lev Uvarov
Constraint Name
39 Parameter for the correction of misaligned 1-2-3-4 straight tracks
40 Parameter for the correction of misaligned 1-2-3-4 curved tracks
Value
Range
Default
Value
0-4095
0-4095
60
200
Table 7: DAT_ETA / SP Data Format for 080408 and later (but earlier than 090601) versions,
Core Version #1
0
1
2
3
4
5
6
7
Minimum eta for ME1-ME2 collision tracks
Minimum eta for ME1-ME3 collision tracks
Minimum eta for ME2-ME3 collision tracks
Minimum eta for ME2-ME4 collision tracks
Minimum eta for ME3-ME4 collision tracks
Minimum eta for ME1-ME2 collision tracks in overlap region
Minimum eta for ME2-MB1 collision tracks
Minimum eta for ME2-MB2 collision tracks
Value
Range
0-127
0-127
0-127
0-127
0-127
0-127
0-127
0-127
8
9
10
11
12
13
14
15
Maximum eta for ME1-ME2 collision tracks
Maximum eta for ME1-ME3 collision tracks
Maximum eta for ME2-ME3 collision tracks
Maximum eta for ME2-ME4 collision tracks
Maximum eta for ME3-ME4 collision tracks
Maximum eta for ME1-ME2 collision tracks in overlap region
Maximum eta for ME2-MB1 collision tracks
Maximum eta for ME2-MB2 collision tracks
0-127
0-127
0-127
0-127
0-127
0-127
0-127
0-127
127
127
127
127
127
24
24
24
16
17
18
19
20
21
Eta window for ME1-ME2 collision tracks
Eta window for ME1-ME3 collision tracks
Eta window for ME2-ME3 collision tracks
Eta window for ME2-ME4 collision tracks
Eta window for ME3-ME4 collision tracks
Eta window for ME1-ME2 collision tracks in overlap region
0-255
0-255
0-255
0-255
0-255
0-255
2
2
2
2
2
2
22
23
24
25
Minimum phi difference for track cancellation logic
Minimum eta difference for accelerator tracks
Maximum eta difference for accelerator tracks
Maximum phi difference for accelerator tracks
0-63
0-127
0-127
0-1023
2
4
16
64
#
Constraint Name
7 of 8
Default
Value
22
22
14
14
14
10
10
10
February 4, 2011
Lev Uvarov
Table 8: DAT_ETA / SP Data Format for earlier than 080408 versions,
Core Version #0
0
1
2
3
4
5
6
7
Minimum eta for ME1-ME2 collision tracks
Minimum eta for ME1-ME3 collision tracks
Minimum eta for ME2-ME3 collision tracks
Minimum eta for ME2-ME4 collision tracks
Minimum eta for ME3-ME4 collision tracks
Minimum eta for ME1-ME2 collision tracks in overlap region
Minimum eta for ME2-MB1 collision tracks
Minimum eta for ME2-MB2 collision tracks
Value
Range
0-127
0-127
0-127
0-127
0-127
0-127
0-127
0-127
8
9
10
11
12
13
14
15
Maximum eta for ME1-ME2 collision tracks
Maximum eta for ME1-ME3 collision tracks
Maximum eta for ME2-ME3 collision tracks
Maximum eta for ME2-ME4 collision tracks
Maximum eta for ME3-ME4 collision tracks
Maximum eta for ME1-ME2 collision tracks in overlap region
Maximum eta for ME2-MB1 collision tracks
Maximum eta for ME2-MB2 collision tracks
0-127
0-127
0-127
0-127
0-127
0-127
0-127
0-127
127
127
127
127
127
24
24
24
16
17
18
19
20
21
Eta window for ME1-ME2 collision tracks
Eta window for ME1-ME3 collision tracks
Eta window for ME2-ME3 collision tracks
Eta window for ME2-ME4 collision tracks
Eta window for ME3-ME4 collision tracks
Eta window for ME1-ME2 collision tracks in overlap region
0-255
0-255
0-255
0-255
0-255
0-255
2
2
2
2
2
2
22
23
24
25
Eta offset for ME1
Eta offset for ME2
Eta offset for ME3
Eta offset for ME4
0-127
0-127
0-127
0-127
0
0
0
0
#
Constraint Name
8 of 8
Default
Value
22
22
14
14
14
10
10
10