MOS Capacitor, φms, band bending, oxide voltage
Semiconductor Devices - Hour 33
Last time we introduced basic principle of field effect transistors (FETs):
Use electric field to PULL carriers INTO place they would not otherwise be ("enhancement")
OR: Use electric field to PUSH carriers OUT OF place they would normally be ("depletion")
We are going to spend most of our time on the former "enhancement" type of FET
Which basically uses an applied voltage to charge a CAPACITOR => Bottom charged "plate" connects FET switch:
+
+
=>
--
--
--
THE BASIC CHALLENGE: To save power, we always want to minimize voltages
Here we want to apply minimum necessary voltage to top plate ("gate") to get lower connecting charge layer
But: 1) For a given amount of voltage on a capacitor, we only get a fixed induced charge: Q = C x V
2) And on the bottom plate, we need MOBILE charge - so will flow between ends
Semiconductor_Devices_33.mcd
1
6/25/2009
However, there CAN be a lot of IMMOBILE charge on that bottom plate:
- Charge due to impurities in oxide spacer layer (which is not shown in the sketches above)
- Charge due to charging of incompletely bonded Si atoms at the Si top surface ("surface states")
- AND charge of donor or acceptor impurity ions in the Si layer
They had to labor for ~ 20 years to reduce first two types of immobile charge to point device would even work!!
But we still have to deal with some of those types of immobile charge
Further, cannot escape third type of immobile charge: donor and acceptor ions in the silicon
Basic MOSFET design challenge is thus to figure out HOW MUCH applied voltage is required to turn on switch
"Threshold Voltage" = Voltage required to pull enough mobile charge into semiconductor surface
With the additional presence of immobile impurity + surface-state + donor or acceptor ion charges
Requires very complete calculation of the TOTAL CHARGE on bottom plate of this CAPACITOR
Built upon full band diagrams of the Metal / Oxide / Semiconductor (MOS) capacitor
Start with band diagrams of separate materials => Combine them => Account for any applied voltages:
Semiconductor_Devices_33.mcd
2
6/25/2009
Diagrams of separate materials:
Slamming them together (and looking VERY quickly):
Vacuum E
q ⋅ χoxide
q ⋅ ϕ'semi
q ⋅ ϕ'm
EF
EF
EF
EF
M
Metal
Oxide
O
S
Semiconductor
Confusing redefinition prevalent in this field:
Work Functions (φ) are normally defined as Vacuum Energy - EF
PRIME NOTATION: Instead use Lower edge of oxide conduction band - EF:
Semiconductor_Devices_33.mcd
3
φ ' = φ - χoxide
6/25/2009
But merged diagram above right is not at equilibrium (as revealed by mismatch of Fermi filling levels
So, inevitably, mobile charges will shift around until Fermi levels are evened out = equilibrium:
Wdepl
Holes in semiconductor move AWAY from surface
Ec
leaving negative acceptor ions exposed in a
"depletion layer" charge bending bands
Ei
EF_Metal
EF_Semiconductor
Ev
Na-
Metal
| Oxide
|
Holes + Na-
Semiconductor
Equilibrium indicated by alignment of (purple) Fermi levels (electron filling energies)
To turn ON this transistor switch, now APPLY positive voltage to top metal "gate" layer (at left):
Semiconductor_Devices_33.mcd
4
6/25/2009
Electrons LIKE positive, hence positive voltage = pulling DOWN electron energy diagram at left
Wdepl
q φ(x): New MOS term
Offset of EF from Ei at x
q φ(x)
qφFp
Ei
EF
Na-
~ Offset of EF from Mid-band gap at x
Way of tracking band bending
Holes + NaValue of q (x) deep in semiconductor (x > Wdepl) is determined only by doping:
( Ei−EF)
P-semi:
q φ(Wdepl) = qφFp = (Ei - EF)at > W = kT ln (Na / ni)
Comes from: p = Na = ni ⋅ e
k⋅T
( EF−Ei)
N-semi:
qφ(Wdepl) = qφFn = (EF - Ei)at > W = kT ln (Nd / ni)
Comes from: n = Nd = ni ⋅ e
k⋅T
NOTE: Convention throughout course for physical constants = Positive
Both qφFp, qφFn defined as positive numbers (Warning: about 1/2 of books define former as negative)
Semiconductor_Devices_33.mcd
5
6/25/2009
Additional symbol: qφs= | qφ(x=semi.surface) - qφ(x=deep) |
(here s denotes semiconductor surface)
q ⋅ ϕ ( Wdepl)
q ⋅ ϕs
q ⋅ ϕ ( 0)
q φs = Net (total) band bending in semiconductor
It is not the semiconductor work function (φsemi) !
q φs = Parameter that will determine if surface is:
"Accumulated" = more majority carriers attracted
"Depleted" of the majority carrier
"Inverted" by ξ field such that minority carriers pool at surface
Semiconductor_Devices_33.mcd
6
6/25/2009
AN IMPORTANT POINT in understanding MOS structures vs. P-N Diodes:
P-N Diode can also act as a Capacitor
Can move charge across junction
Charge shift => EF not constant in position
But MOS Capacitor is only a capacitor (never a diode) !
No DC current flow perpendicular to Si surface => EF constant throughout semiconductor
OK, lets develop a feel for what goes on inside an MOS capacitor by changing the voltage across it!
What follows are illustrations of the SAME Metal / Oxide / P-semi capacitor
with 6 different voltages (from metal more negative to much more positive than semiconductor)
Semiconductor_Devices_33.mcd
7
6/25/2009
"Accumulation" of carriers at semiconductor surface
"Flat Band"
qφFp
Band bend φs
Carriers
e-
holes
Carriers
e-
NaIons
NaIons
M+
Net ρ
Semiconductor_Devices_33.mcd
holes
M+
Net ρ
8
6/25/2009
"Equilibrium" (Vapplied = 0)
"Depletion" of semiconductor's carriers
φs
Band bend φs
holes
Carriers
e-
Carriers
Na-
Ions
Semiconductor_Devices_33.mcd
holes
Na-
Ions
M+
Net ρ
e-
M+
Net ρ
9
6/25/2009
"Inversion" of carrier type at semi surface
"Strong Inversion"
φs
φs
holes
Carriers
holes
Carriers
e-
e-
NaIons
NaIons
M+
Net ρ
Semiconductor_Devices_33.mcd
M+
Net ρ
10
6/25/2009
OK, we want to use such a capacitor (and its semiconductor inversion layer) to make a transistor
Most Common MOS Transistor is an "N-Channel Enhancement Mode MOSFET:
Positive Gate bias:
No gate bias:
VG
KEY QUESTION:
How does the external bias VG relate to the internal surface band bending that controls inversion?
Answer has 3 parts:
1) Figure out nature's mismatch between metal & semiconductor work functions
2) Figure out voltage drop across semiconductor's depletion layer when it is inverted
3) Figure out voltage drop across oxide capacitor when semiconductor is inverted
Semiconductor_Devices_33.mcd
11
6/25/2009
ANSWER TO PART #1: Figure out nature's mismatch between metal & semiconductor work functions
Remembering that φ's (work functions) and χ's (electron affinities) are in volts = energy / charge
So must multiply by the charge (q) to plot on energy diagrams
Case 1) Metal / Oxide / P-semiconductor
Case 2) Metal / Oxide / N-semiconductor
q ⋅ χ'semi
q ⋅ ϕ'm
q ⋅ ϕ'semi
q ⋅ χ'semi
q ⋅ ϕ'm
Eg/2
Eg/2
q ⋅ ϕ'Fn
q ⋅ ϕ'Fp
ϕ'semi_p_type = χ'semi +
⎛
⎝
ϕms = ϕ'm − ϕ'semi = ϕ'm − ⎜ χ'semi +
Semiconductor_Devices_33.mcd
Eg
2⋅ q
Eg
2⋅ q
+ ϕ'Fp
⎛
⎝
⎞
⎠
ϕms = ϕ'm − ⎜ χ'semi +
+ ϕ'Fp
12
Eg
ϕ'semi_n_type = χ'semi +
Eg
2⋅ q
2⋅ q
− ϕ'Fn
⎞
⎠
− ϕ'Fn
6/25/2009
Can also make the top (gate layer out of very heavily doped polycrystalline silicon (called "poly")
Heavily doped "poly" behaves ~ metal
It is polycrystalline because it is deposited on the disordered oxide and thus grows in a confused manner
It only changes the φ'm values in the cases above
Case P+ poly (top poly doped very heavily P):
q ⋅ χ'semi
qϕ'm
qϕ'm
~Eg
P+ poly gate
ϕ'm = χ'semi +
Case N+ poly (top poly doped very heavily N):
q ⋅ χ'semi
P or N Semi
P or N Semi
substrate
substrate
(as above)
(as above)
Oxide
N+ poly gate
Eg
Oxide
ϕ'm = χ'semi
q
From these, subtract the work function for p or n type semiconductor (as on previous page)
Semiconductor_Devices_33.mcd
13
6/25/2009
End up with: [ THREE choices of "metal" ] x [ TWO choices of semiconductor ]:
ϕ'metal :
ϕ'm (gate = real metal),
ϕ'semi :
χ'semi +
Eg
2⋅ q
χ'semi +
Eg
q
(gate = P+ polysilicon),
+ ϕ'Fp (substrate = P-silicon),
Eg
ϕ'semi +
2⋅ q
χ'semi (gate= N+ polysilicon)
− ϕ'Fn (substrate = N-silicon)
Table of Possible φ'ms Values
Crystalline Silicon Substrate Type
Gate
Material
Normal Metal
P+ "poly"
P-type Semiconductor
⎛
⎝
ϕ'm − ⎜ χ'semi +
Eg
2⋅ q
−Eg
N+ "poly"
Semiconductor_Devices_33.mcd
2⋅ q
Eg
2⋅ q
⎞
⎠
+ ϕFp
N-type Semiconductor
⎛
⎝
ϕ'm − ⎜ χ' +
Eg
− ϕFp
2⋅ q
− ϕFp
−Eg
2⋅ q
14
Eg
2⋅ q
⎞
⎠
− ϕFn
+ ϕFn
+ ϕFn
6/25/2009
ANSWER TO PART #2: Figure out voltage drop across semiconductor's depletion layer when it is inverted
Vapplied
From above, very beginning of inversion:
If knew ? would have answer !
q ⋅ ϕFp
What if:
Insist that magnitude of N-inversion
qVappl
?
Band bend in Semi
charge at the very surface of the
semiconductor (tip of red spike)
q ⋅ ϕFp
=
e-
p = ni ⋅ e
Density of holes deep in semiconductor
k⋅T
inversion charge
(blue box at right)
M+
But, magnitude of N-charge at surface is:
Nan ( x = 0) = ni ⋅ e
Semiconductor_Devices_33.mcd
"?"
k⋅T
ρ
15
6/25/2009
Set this equal to the concentration of holes deep in the semiconductor:
n ( x = 0) = ni ⋅ e
"?"
k⋅T
q ⋅ ϕFp
= p ( deep) = ni ⋅ e
k⋅T
Only works if "?" = φFp
q ⋅ Vox
q ⋅ ϕFp
q ⋅ Vapplied = q ⋅ Vthreshold
q ⋅ ϕFp
2 ⋅ ϕFp
With this arbitrary (but commonly used) definition of the "threshold" of surface inversion:
- Net band bending in the semiconductor (answer part 2) = 2 φFp (for P-type Semi substrate)
Semiconductor_Devices_33.mcd
16
6/25/2009
Inverted P-type semiconductor:
Inverted N-type semiconductor:
q ⋅ ϕFp
q ⋅ ϕFn
q ⋅ ϕFp
q ⋅ ϕFn
Semi band bending = 2 φFp
Semi band bending = - 2 φFn
All that is left is:
ANSWER TO PART #3:) Figure out voltage drop across oxide capacitor when semiconductor is inverted
The oxide is the center of a capacitor (with the metal and semiconductor as the side plates):
Semiconductor_Devices_33.mcd
17
6/25/2009
Capacitance:
where:
εox
Cox = εox A / tox
= dielectric constant of oxide = relative dielectric constant * permittivity of free space
= kox * εo = (3.9) * (8.85 * 10-14 farads/cm)
for SiO2 oxide
A
= Area of capacitor plates
tox
= separation of capacitor plates = thickness of the oxide
OK, but threshold voltage will not change with area of capacitor, so is easier to work with capacitance/area
Capacitance / Area = C'ox = εox / tox
NOTE:
Here I use prime to denote "per area" (common MOS convention)
I will be careful to use when mean "per area" - books are sometimes sloppy (so read carefully) !
FOR A CAPACITOR:
Vacross
= Vleft - Vright
= Qleft / C
= -Qright / C
Semiconductor_Devices_33.mcd
18
= -Qsemiconductor at depletion / C
6/25/2009
So, if can figure out the charge in semiconductor at depletion, can get the voltage across the oxide
Net charge in semiconductor
= Qright
qφFp
= spike (inversion charge) + depletion layer charge
qφFp
2qφFp
At threshold (beginning) of inversion spike is small, so
Qright ~ Depletion layer charge
= - q * Na * Xdt * A
Xdt
Xdt = X depletion with at threshold
KNOW the voltage across semiconductor = 2φFp, so:
Na
Xdt = W ( V = 2ϕFp) =
Xdt =
Semiconductor_Devices_33.mcd
19
2 ⋅ εsemi ( 2 ⋅ ϕFp)
q
⋅
1
Na
4 ⋅ kSi⋅ εo ⋅ ϕFp 1
⋅
q
Na
6/25/2009
So putting this together (for P-semiconductor substrate):
Vacross oxide
Where:
= Vacross capacitor
Xdt =
= - ( - q Na Xdt A) / Cox )
= q Na Xdt (Cox / A)
C'ox =
4 ⋅ kSi⋅ εo ⋅ ϕFp 1
⋅
q
Na
kox ⋅ ε0
tox
= q Na Xdt / C' ox
OK, we have all the parts to get total Vapplied necessary for beginning of inversion:
1) Voltage necessary to compensate for work function mismatch which will flatten out bands
φ'ms (possible values in table)
2) Voltage drop in semiconductor
2φ'Fp (P-type Semiconductor)
-2φ'Fn (N-type semiconductor)
3) Voltage drop in oxide
q Na Xdt / C' ox (P-type Semiconductor)
WE"VE NOW GOT ALL THE PIECES - PUT IT ALL TOGETHER IN NEXT HOUR !
Semiconductor_Devices_33.mcd
20
6/25/2009
Semiconductor_Devices_33.mcd
21
6/25/2009