11
(Saturated) MOSFET Small-Signal Model
■
Concept: find an equivalent circuit which interrelates the incremental changes
in iD, vGS, vDS, etc. for the MOSFET in saturation
Transconductance
The small-signal drain current due to vgs is therefore given by
id = gm vgs.
vGS = VGS + vgs , iD = ID + id -- we want to find id = (?) vgs
iD = ID + id
D
G
We have the functional dependence of the total drain current in saturation:
iD = µn Cox (W/2L) (vGS - VTn ) (1 + λnvDS) = iD(vGS, vDS)
_
+
Solution: do a Taylor expansion around the DC operating point (also called the
quiescent point or Q point) defined by the DC voltages Q(VGS, VDS):
iD = ID +
∂v
GS
Q
GS
_
VDS = 4 V
S
VGS = 3 V_
2
1 ∂ iD
( v gs ) + --2 ∂ v2
B
vgs
2
∂i D
+
+
600
2
( v gs ) + …
500
Q
iD
If the small-signal voltage is really “small,” then we can neglect all everything past
the linear term --
id
400
vGS = VGS + vgs
Q
(µA) 300
vGS = VGS = 3 V
gm = id / vgs
200
100
∂i D
iD = ID +
∂v
GS
( v gs ) = I D + g m v gs
1
Q
2
3
4
5
6
VDS (V)
where the partial derivative is defined as the transconductance, gm.
EE 105 Fall 1998
Lecture 11
EE 105 Fall 1998
Lecture 11
Another View of gm
Transconductance (cont.)
* Plot the drain current as a function of the gate-source voltage, so that
the slope can be identified with the transconductance:
■
Evaluating the partial derivative:
W
g m = µ n C ox  ----- ( V GS – V Tn ) ( 1 + λ n V DS )
L
D
iD = ID + id
G
■
+
+
B
vgs
_
+
_
VDS = 4 V
In order to find a simple expression that highlights the dependence of gm on the
DC drain current, we neglect the (usually) small error in writing:
S
VGS = 3 V_
gm =
iD(vGS, VDS = 4 V)
600
500
iD
400
2I D
W
2µ n C ox  ----- I D = ------------------------- L
V GS – V Tn
For typical values (W/L) = 10, ID = 100 µA, and µnCox = 50 µAV-2 we find that
id
Q
gm = id / vgs
(µA) 300
gm = 320 µAV-1 = 0.32 mS
200
100
3
1
2
vGS = VGS = 3 V
6 vGS (V)
4
5
vGS = VGS + vgs
EE 105 Fall 1998
Lecture 11
EE 105 Fall 1998
Lecture 11
(Partial) Small-Signal Circuit Model
■
Output Conductance/Resistance
How do we make a circuit which expresses id = gm vgs ? Since the current is not
across its “controlling” voltage, we need a voltage-controlled current source:
■
We can also find the change in drain current due to an increment in the drainsource voltage:
∂i D
2
W
g o = ------------ = µ n C ox  ------ ( V GS – V Tn ) λ n ≅ λ n I D
2L
∂v
DS
id
gate
+
vgs
Q
The output resistance is the inverse of the output conductance
drain
gmvgs
1
1
r o = ----- = -----------λn ID
go
_ source
_
The (partial) small-signal circuit model with ro added looks like:
id = gm vgs + (1/ro)vds
gate
drain
+
vgs
_ source
EE 105 Fall 1998
Lecture 11
gmvgs
id
ro
+
vds
_
EE 105 Fall 1998
Lecture 11
,,
MOSFET Capacitances in Saturation
Complete Small-Signal Model
fringe electric
field lines
gate
■
drain
,,,,
,,
,,,
source
All these capacitances are “patched” onto the small-signal circuit schematic
containing gm and ro ... gmb is open-circuited for EECS 105 since vbs = 0 V.
n+
n+
Csb
qN (vGS)
overlap LD
overlap LD
Cdb
depletion
region
Cgd
gate
id
+
drain
vgs
Cgs
Cgb
gmvgs
gmbvbs
ro
_ source
_
Csb
vbs
Cdb
+
bulk
In saturation, the gate-source capacitance contains two terms, one due to the
channel charge’s dependence on vGS [(2/3)WLCox] and one due to the overlap of
gate and source (WCov, where Cov is the overlap capacitance in fF per µm of gate
width)
2
C gs = --- WLC ox + WC ov
3
In addition, there is the small but very important gate-drain capacitance (just the
overlap capacitance Cgd = Cov)
There are depletion capacitances between the drain and bulk (Cdb) and between
source and bulk (Csb). Finally, the extension of the gate over the field oxide leads to
a small gate-bulk capacitance Cgb.
EE 105 Fall 1998
Lecture 11
EE 105 Fall 1998
Lecture 11
p-channel MOSFETs
p-channel MOSFET Models
■
Structure is complementary to the n-channel MOSFET
■
In a CMOS technology, one or the other type of MOSFET is built into a well -- a
deep diffused region -- so that there are electrically isolated “bulk” regions in the
same substrate
n-channel
MOSFET
A
(a)
DC drain current in the three operating regions: -ID > 0
( V SG ≤ – V T )
–ID = 0 A
– I D = µ p C ox ( W ⁄ L )[ VSG + V Tp – ( V SD ⁄ 2 ) ] ( 1 + λ p V SD )VSD
2
– I D = µ p C ox ( W ⁄ ( 2L ) ) ( V SG + V T p ) ( 1 + λ p VSD )
,,,,,
,,,,,,,,,
,,,,,,, ,, ,,
,
,,,,,,
, ,,,,,,,
,,,,,,,,,,
,
,
,
,,,,,
,,,,,,,,,,,
,
,
,
,
,
,
■
■
( V SG ≥ – V Tp, VSD ≥ VSG + V Tp )
The threshold voltage with backgate effect is given by:
p-channel
MOSFET
V Tp = V TOp – γ p ( ( – V SB + 2φ n ) – 2φ n )
Numerical values:
µpCox is a measured parameter. Typical value: µpCox = 25 µAV-2
A
isolated bulk contact with
p-channel MOSFET
shorted to source
–1
0.1µmV
λ p ≈ -------------------------L
VTp = -0.7 to -1.0 V, which should be approximately -VTn for a well-controlled
CMOS process
,
,,,,
,,,,,,
,,
,,,
,,
,,,
,,
,,,
,,,,
common bulk contact for
all n-channel MOSFETs
(to ground or to the − supply)
( V SG ≥ – V Tp, VSD ≤ VSG + V Tp )
p+
(b)
n+ source
p-type substrate
n+ drain
p+ drain
p+ source
n+
n well
EE 105 Fall 1998
Lecture 11
EE 105 Fall 1998
Lecture 11
p-channel MOSFET small-signal model
■
the source is the highest potential and is located at the top of the schematic
+
source
gmbvsb
Cgd
_ gate
vsb
gmvsg
Cgs
vsg
ro
−id
drain
Cgb
_
bulk
Csb
Cdb
EE 105 Fall 1998
Lecture 11