DIAMOND

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Department of Computer Engineering
ati.ttu.ee
DIAMOND: Targeting Verification
and Reliability Issues in Systems
Tallinn University of Technology
Department of Computer Engineering
Jaan Raik
DIAMOND: Targeting Verification and
Reliability Issues in Systems

EU FP7 STREP Project DIAMOND


A holistic view of design and soft errors
Success stories:

FoREnSiC (C, system-level)

zamiaCAD (VHDL/Verilog/SC, RTL)

Follow-up projects

Significance to CEBE
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Toyota problems: reliability or verification?
3
CEBE IAB meeting 2013
The DIAMOND concept
Soft-errors caused by cosmic
radiation
Design mistakes made by the
engineer
DIAMOND’s
diagnosis/correction
methods
Soft-errors in new generation chips
due to background radiation
Electronic systems fail while
working in the field
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CEBE IAB meeting 2013
DIAMOND: Objectives

A unified, holistic diagnostic model for bugs and
soft errors at all levels;

Automated localisation & correction
techniques based on the unified model, both
pre-silicon & post-silicon;

Implementation of a reasoning framework for
localisation & correction, encompassing wordlevel techniques, formal, semi-formal, and
dynamic techniques.
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CEBE IAB meeting 2013
DIAMOND: FP7 collaborative research

FP7-2009-ICT-4-248613 DIAMOND Diagnosis, Error Modelling and Correction
for Reliable Systems Design

Start January 2010; total budget 3.8M €
(EU contribution 2.9M €); 462.5 PM
The IBM logo is a registered trademark of
International Business Machines
Corporation (IBM) in the United States
and other countries.
DIAMOND Kick-off, Tallinn,
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February 2-3, 2010
CEBE IAB meeting 2013
Verification and debug
Verification
Debug
•
•
•
•
~2/3 of development time for verification
~2/3 of verification time for debug
Thus, nearly half of the development cycle!
Automation of the debug step needed...
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CEBE IAB meeting 2013
Traditional debug flow
???
Spec
Design
Verification
Error!
Counterexamples
(waveforms),
failed assertions,
...
• Too little information
• Too much information
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CEBE IAB meeting 2013
Automated debug flow
Spec
Design
Verification
Error!
Error
localization
Corrected
design, Repair
log, ...
Error
correction
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CEBE IAB meeting 2013
DIAMOND Debug Tools
 FoREnSiC


Formal automated debug
environment for ESL HW in C
zamiaCAD

A highly scalable framework for
design analysis and automated
debug at RTL (VHDL-centric)
Maksim Jenihhin
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CEBE IAB meeting 2013
FoREnSiC

FoREnSiC: Formal Repair Environment for Simple C

For system-level HW

Developed by TU Graz, University of Bremen and TUT

Front-end converting simple C descriptions to
flowchart model, different debug back-ends

Open source and available at:
http://www.informatik.uni-bremen.de/agra/eng/forensic.php
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CEBE IAB meeting 2013
Forensic Flow
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CEBE IAB meeting 2013
Available FoREnSiC Back-Ends

FoREnSiC includes 3 complementary back-ends:

Symbolic back-end (TU Graz)


Cut-based back-end (University of Bremen)


Symbolic+concolic engines and model-based diagnosis for
localization; template-based correction.
Formally verifies the equivalence between a C program and
an implementation in HDL.
Simulation-based back-end (Tallinn University of
Technology, University of Verona)

Intended for correcting larger programs. Statistical
localization + mutation-based correction
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CEBE IAB meeting 2013
Statistical localization + mutations
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CEBE IAB meeting 2013
Dynamic slicing for localization
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CEBE IAB meeting 2013
Statistical analysis

Ranking according to suspiciousness:
Suspiciousness score
Circuit blocks
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CEBE IAB meeting 2013
Fault model for correction
MUTATION OPERATOR
AOR (arithmetic operator replacement)
ROR (relational operator replacement)
LCR (logical connector replacement)
ASOR (assignment operator
replacement)
UOR (unary operator replacement)
Bitwise operator replacement
Bitwise assignment operator
replacement
Increment/decrement operator
replacement
Number mutation (decimal digit
replacement in integers, floats and
array indexes)
Constant replacement
unary minus/ unary plus/ zero
C OPERATORS/EXAMPLES
+, -, *, /, %
==, !=, >, <, >=, <=
&&, ||
+=, -=, *=, /=, %=, =
+, -, ~, !
<<, >>, &, |, ^
<<=, >>=, &=, |=, ^=
x++, ++x, x--, --x
0...9
+C, 0, -C
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CEBE IAB meeting 2013
Design error correction experiments
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CEBE IAB meeting 2013
zamiaCAD team and cooperation

Günter Bartsch, Stuttgart – founder

Rainer Dorsch, Stuttgart – Bosch/IBM

Tallinn University of Technology


Anton Tšepurov, PhD student

Maksim Jenihhin

Valentin Tihhomirov, PhD student

Saif Abrar PhD student

Jaan Raik
IBM Faculty Award 2011/2012
Maksim Jenihhin
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CEBE IAB meeting 2013
zamiaCAD flow
Maksim Jenihhin

http://zamiacad.sf.net

Front-end currently
supports VHDL

Object database ZDB

Persistence

Scalability

Custom designed

Highly optimized for
performance
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CEBE IAB meeting 2013
Maksim Jenihhin
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CEBE IAB meeting 2013
zamiaCAD Evaluation

A case study on ROBSY microprocessor

17k lines of VHDL code

Error localization based on statistical ranking
Bug data
Bug Failed/Passed
name Test cases
4 / 24
Bug 1
2 / 26
Bug 2
2 / 26
Bug 3
1 / 27
Bug 4
2 / 26
Bug 5
1 / 27
Bug 6
1 / 27
Bug 7
The proposed automated localization
Manual
Statistical Ranking
Cone inspection
debug
Time
Statements Located stm.
Cone
Added
(min)
Time
cand. / %
rank
dir. / depth stm. cand.
14 / 2.9%
3
2
4 hours
7 / 1.4%
1
2
2 hours
20 / 4%
3
2
4 hours
6 / 1.2%
(1)
fw / 1
21
2+(5) 4 hours
11 / 2.3%
1
2
2 hours
8 / 1.7%
(1)
bw / 1
13
2+(10) 5 hours
21 / 4.3%
(1)
fw / 1
10
2+(1) 1 hours
Maksim Jenihhin
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CEBE IAB meeting 2013
DIAMOND results

Publications



2 papers at IEEE D&T, 2 papers at JETTA, ...
PhD defenses

2012, S.Kostin, A.Tšertov, A.Karputkin, T.Viilukas

2013, I.Aleksejev, A.Tšepurov, U.Reinsalu
Follow-up projects

FP7 STREP BASTION

3 EU COST Actions

1 Estonian ICT programme
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CEBE IAB meeting 2013
ICT COST Actions

Rich-model toolkit: an infrastructure for
reliable computer systems


Median: manufacturable and dependable
multicore architectures at nanoscale


2009 oct. – 2013 oct.
2011 dec. – 2015 nov.
Trustworthy Manufacturing and Utilization of
Secure Devices (TRUDEVICE)

2012- 2016
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CEBE IAB meeting 2013
ICTP FUSETEST

Functional Self‐Test, Self‐Diagnosis and
Failure Analysis for Integrated Electronics
Systems (FUSETEST)

Partner: Testonica

2013 apr. – 2015 aug.
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CEBE IAB meeting 2013
Significance to CEBE

Verification and correction of bugs in the
CEBE processor family

Application of design error correction engines
in fine-tuning medical algorithms
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Thank you!
More info: www.fp7-diamond.eu
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