Fast Packet Classification Using Bit
Compression with Fast Boolean Expansion
Author:
Chien Chen, Chia-Jen Hsu and Chi-Chia Huang
Publisher:
Journal of Information Science and Engineering, 2007
Presenter: Chun-Yi Li
Date: 2009/03/11
Outline
 Related Work
 Bitmap intersection
 Aggregated Bit Vector (ABV)
 Bit Compression Algorithm
 Fast Boolean Expasion
 Performance
2
Related Work
Bitmap intersection
Each interval associated with an N-bits bit vector.
R5
R6
R3
R4
R2
R1
1
2
3
4
5
6
0
0
0
0
0
0
1
0
0
0
1
0
1
1
0
0
1
0
1
1
1
0
0
0
1
1
1
0
0
1
1
0
1
0
0
1
1
0
0
0
0
1
1
0
0
1
0
1
0
0
0
0
0
0
3
Related Work
Aggregated Bit Vector (ABV)
Rule Field1
Field2
0
1
Field1
R0
00*
00*
0000 1110 000
0000 0001 100
R1
00*
01*
010
011
R2
10*
11*
R3
11*
10*
R4
0*
10*
R5
0*
11*
R6
0*
0*
R7
1*
01*
0000 0010 110
R8
1*
0*
011
R9
11*
0*
R10
10*
10*
0
0
1
1100 1110 000
0010 0001 101
0001 0001 110
110
111
111
0
0
1
1
0
Field2
1
Aggregate size = 4
1000 0010 110
0100 0011 110
0001 1000 001
0010 0100 000
111
111
111
110
Related Work
Aggregated Bit Vector (ABV)
 Aggregation tries to decrease the memory
access time by adding ABV.
 Generates false matching.
- Rule rearrangement.
 Faster than bitmap intersection, but use more
space.
5
Outline
 Related Work
 Bitmap intersection
 Aggregated Bit Vector (ABV)
 Bit Compression Algorithm
 Fast Boolean Expasion
 Performance
7
Bit Compression Algorithm
 Memory storage - θ(dN㏒N)
 Require additional time for decompression
8
Bit Compression Algorithm
Construct Don’t Care Vectors (DCV)
Removing the redundant “1”
bits
Don’t Care Vectors (DCV)
0 0 0 0 0 0 0 0 0 0 1 1
9
Bit Compression Algorithm
Removing redundant ‘0’ bits
10
Bit Compression Algorithm
Construct Compressed Bit Vector(CBV)
Append “index table
lookup address” (ITLA)
For convience of memory access, fill up ‘0’ to the end of the CBVs and index table.
11
Bit Compression Algorithm
Construct index table
00
01
10
11
Index table
1 3 4 0
1 2 5 6
1 2 7 0
9 10 0 0
0
8
0
0
Filled up with ‘0’
12
Bit Compression Algorithm
Search
(DCV)
13
Bit Compression Algorithm
Maxmum Overlap Analysis
β – denote the probability that PA is a prefix of PB.
(PA and PB are randomly selected from the rule table)
14
Region Segmentation
The region segmentation algorithm constructs an
undirected graph first.
Each vertex vi corresponds to a rule Ri, and an edge is constructed
between vi and vj if rules i and j are dependent.
15
Region Segmentation
1. Find connected component.
2. Remove maximum degree vectex if set smaller than
maximum overlap.
Maximum overlap = 5
STEP1:
C1 {1, 2, 3, 4, 5, 6, 7, 8}
C2 {9, 10}
STEP2:
C11 {1, 3, 4}
C12 {1, 2, 5, 6, 7, 8}
C2 {9, 10}
STEP3:
C11 {1, 3, 4}
C121 {1, 2, 5, 6, 8}
C122 {1, 2, 6, 7}
C2 {9, 10}
16
Merge Rule Set
Two rule sets can be merged together if the rule numbers of the
merged rule sets are smaller than or equal to the maximum overlap.
CR1 {1, 3, 4}
CR2 {1, 2, 5, 6, 8}
CR3 {1, 2, 6, 7}
CR4 {9, 10}
00
01
10
11
Index table
1 3 4 0
1 2 5 6
1 2 6 7
9 10 0 0
Merge
0
8
0
0
CR1 {1, 3, 4. 9, 10}
CR2 {1, 2, 5, 6, 8}
CR3 {1, 2, 6, 7}
New index table
00 1 3 4 9 10
01 1 2 5 6 8
10 1 2 6 7 0
17
Merge Rule Set
New index table
00 1 3 4 9 10
01 1 2 5 6 8
10 1 2 6 7 0
18
Merge Rule Set
19
Outline
 Related Work
 Bitmap intersection
 Aggregated Bit Vector (ABV)
 Bit Compression Algorithm
 Fast Boolean Expasion
 Performance
20
Fast Boolean Expasion(FBE)
 Original boolean expression:
(CBVS+DCVS)*(CBVD+DCVD)
 Modify boolean expression:
(CBVS*CBVD)+(CBVS*DCVD)+
(DCVS*CBVD)+(DCVS*DCVD)
Takes few memory accesses since
CBVS and CBVD are compressed
bit vector.
Only extract the essential bits
from DCV that are corresponding
to the set bits of CBV
Default rule
21
Outline
 Related Work
 Bitmap intersection
 Aggregated Bit Vector (ABV)
 Bit Compression Algorithm
 Fast Boolean Expasion
 Performance
22
Performance
23
Performance
24
Performance
Transmission rate
Without wildcard rule
(K)
25
Performance
Transmission rate
Contain 20% wildcard rule
(K)
26
Performance
Transmission rate
Contain 50% wildcard rule
(K)
27