Computers Internal and External Memory 1 Characteristics of Computer Memory Location Capacity Unit of transfer Access Method Performance Physical Type Organization 2 UNIVAC Console and CPU 3 Memory Hierarchy COST SPEED REGISTERS CACHE MAIN MEMORY MAGNETIC DISK | DISK CACHE MAGNETIC TAPE | OPTICAL DISK 5 Capacity Units Bit Byte Kilobyte Megabyte Gigabyte Terabyte b B = 8 b KB = 1,000 B MB = 1,000,000 B GB = 1,000,000,000 B TB = 1,000,000,000,000 B 6 Memory Access Method Sequential - tape Direct - floppy or hard disk Random - internal memory Dynamic (DRAM) simple, small, must be refreshed Static (SRAM) no refresh needed Associative - some cache 7 Random Access Memory Chips and chip technology 8 Flip Flop Circuit Diagram 9 Memory Cells CONTROL read or write SELECT select cell 1 0/1 DATA IN / SENSE input or output 10 Write to Memory Read Enable Write Enable Row Address Col Address A0 . . . A10 ROW ADDRESS BUFFER COL ADDRESS BUFFER ARRAY MUX REFRESH DATA INPUT BUFFER DATA OUTPUT BUFFER D1 . . D4 11 Pin Assignments A0 … A10: address location (multiplexed) D1 … D4: data in or out Vcc: power supply Vss: ground RAS: row address select CAS: column address select WE: write enable OS: output enable 12 Cache Operation ALU CNTL ..... CACHE BUS MAIN MEMORY 13 14 Cache CPU Word CACHE Block Main Memory 15 Cache Slot Tag Number 0 Block 1 2 3 16 Random Access Direct Access Storage Device (DASD) or disk drives Optical Magnetic 17 Optical Disks (CD’s) 18 How CD’s work 19 Cylinder/Track/Block Track Block (Sector) Cylinder 20 Disk Organization 21 DASD Structure Read-Write Heads 22 Data Storage FAT (File Access Tables), Directories and Catalogs Update and Delete Fragmentation and reorganization Blocks, Headers and Interblock Gaps 23 DASD Access (PC) MAIN MEMORY CPU BUFFER CACHE DASD CONTROLLER 24 25 DASD Access (Mainframe) MAIN MEMORY CPU BUFFER CHANNEL DASD CONTROLLER 27 Data Structure BLOCK HEADER DATA CRC • Header written when disk is formatted Data copied into block • Cyclical Redundancy Check calculated • 28 Controller Operation (DASD retrieval) CPU passes parameters to registers in the controller The controller transfers data into the card buffer The controller checks the CRC to assure the data was copied correctly The controller (or CPU) transfers buffered data to memory one word at a time 29 Time Units Millisecond Microsecond Nanosecond Picosecond ms = 1/1000 s µs = 1/1,000,000 s ns = 1/1,000,000,000 s ps = 1/1,000,000,000,000 s 32 Representative Times Network speed = megabits per second Disk transfer = megabytes per second Disk access = milliseconds Memory access = nanoseconds Machine cycle = microseconds/nanoseconds 33 Error Correction and Checking Check Block Body Header Add bits to a block to use for error discovery Detection only Detection and retransmission Detection and recovery 34 Error Detection Only (Asynchronous Transmission) * Parity Bit * * * * * * * 7 Data Bits 27 = 128 distinct characters 35 Error Detection &Correction (Hamming Code: 4 bit word) * * * * * * * 3 Error Checking Bits 4 Data Bits 36 Error Detection &Correction (Hamming Code: 4 bit word) DATA * * * 1 1 1 0 1 1 1 0 37 Error Detection PARITY (even) 1 0 0 1 1 1 0 1 1 0 1 1 0 0 38 Error Correction (4 bit word) PARITY (even) 1 0 0 0 1 1 0 1 1 0 0 1 0 0 39 Error Correction & Detection Error detection takes fewer bits than error correction Longer packets take a smaller percent for correction but have more types of errors Hamming’s scheme detects all errors at a high overhead cost; others may correct only single bit or double bit errors with shorter check fields 40 CRC Error Checking The transmitted messages are divided into predetermined blocks The blocks are divided by a fixed divisor The remainder is appended to the message 41 IBM 1107 with tape drives 42 Memory 43