Chapter 1 Introduction Electricity is the driving force behind the development of any country. With the rapid increase in residential, commercial, and industrial consumers of electricity throughout the world, it has now become imperative for utilities companies to devise better, non-intrusive, Environmentally - safe techniques of gauging utilities’ consumption so that correct bills can be generated and invoiced. 1.1 Objective of the project Traditionally, the electricity meters are installed on consumer’s premises and the consumption information is collected by meter-readers on their fortnightly or monthly visits to the premises. This method of gauging electricity consumption has the following disadvantages: 1. Sometimes the meters are installed inside people’s homes and, if the consumer is not at home, the meter-reader cannot record the fortnightly or monthly consumption and then the utilities’ company has to resort to considering the average bill-amount of the previous months as an indicator of the likely consumption for the current month. This results in burden in form of larger bill amount for consumer or to the electricity supply company in form of less amount charge. This method of billing is also not suitable for the electricity supply company because it gives inaccurate account of the overall electricity consumption in the consumer’s area and may ultimately result in errors in future planning by the company. 2. Hiring of a number of meter readers by utilities’ companies and providing means of transportation to them is an expensive burden on the companies’ budgets. Moreover, these visits of the meter readers to consumers’ premises generate pollution in the air which has negative impact on the environment and the greenhouse effect. 3. Dissatisfaction of some customers who consider meter-readers’ entrance to their homes as some sort of invasion of their privacy. This is especially applicable in countries, like Oman, where during the day most men are outside of their homes earning a living and only women are at home doing the housework. Page 1 of 40 In order to overcome these disadvantages of the traditional meter reading system, efforts are underway around the world to automate meter reading and to provide comprehensive information to the consumer for efficient use of the utilities [1,2,3]. While Italy’s ENEL SpA is considered to be first utilities’ company which heralded in the new era of Automatic Meter Reading (AMR) in Europe, it is by no means alone in this massive endeavor. Among other countries, Germany, Greece, United Kingdom, Australia, and Argentina have deployed several AMR projects with the aim of reducing the cost of meter-reading, improving the collection of data from the meters, and then providing timely comprehensive information to consumers about their energy usage for better load balancing and utilities’ management. By 2008, all European Member States have to implement the Energy Services Directive, which requires customers to be given more information about their energy usage, and receive more timely and accurate billing. 1.2 Background of the Project In this paper, we have proposed a microcontroller based single phase digital Prepaid Energy Meter using microcontroller from the Atmel family because of its performance, power efficiency and design flexibility and an Energy Meter IC. In this paper a wireless card is used which is capable of communicating with both the distributor unit and the energy meter to which the number of units to be loaded. The proposed energy meter will be implemented in the laboratory and finally results obtained have been presented and compared with electromechanical energy meter. Page 2 of 40 Chapter 2 Overview of technologies used 2.1 Embedded Systems: An embedded system can be defined as a computing device that does a specific focused job. Appliances such as the air-conditioner, DVD player, printer, fax machine, mobile phone etc. are examples of embedded systems. Each of these appliances will have a processor and special hardware to meet the specific requirement of the application along with the embedded software that is executed by the processor for meeting that specific requirement. The embedded software is also called “firm ware”. The desktop/laptop computer is a general purpose computer. You can use it for a variety of applications such as playing games, words processing, accounting, software development and soon. Embedded systems do a very specific task, they cannot be programmed to do different things. Embedded systems have very limited resources, particularly the memory. Generally, they do not have secondary storage devices such as0 the CDROM or the floppy disk. Embedded systems have to work against some deadlines. A specific job has to be completed within a specific time. In some embedded systems, called real-time systems, the deadlines are stringent. Embedded systems are constrained for power. As many embedded systems operate through a battery, the power consumption has to be very low. Following are the advantages of Embedded Systems: 1. They are designed to do a specific task and have real time performance constraints which must be met. 2. They allow the system hardware to be simplified so costs are reduced. 3. They are usually in the form of small computerized parts in larger devices which serve a general purpose. 4. The program instructions for embedded systems run with limited computer hardware resources, little memory and small or even non-existent keyboard or screen. Page 3 of 40 2.2 Implementation of the Project This chapter briefly explains about the Hardware Implementation of the project. It discusses the design and working of the design with the help of block diagram and circuit diagram and explanation of circuit diagram in detail. It explains the features, timer programming, serial communication of microcontroller. It also explains the various modules used in this project. 2.3 Project Design The implementation of the project design can be divided in two parts. Hardware implementation Firmware implementation Hardware implementation deals in drawing the schematic on the plane paper according to the application, testing the schematic design over the breadboard using the various IC’s to find if the design meets the objective, carrying out the PCB layout of the schematic tested on breadboard, finally preparing the board and testing the designed hardware. The firmware part deals in programming the microcontroller so that it can control the operation of the IC’s used in the implementation. In the present work, we have used the Proteus design software for PCB circuit design, the Keil µv3 software development tool to write and compile the source code, which has been written in the C language. The Flash magic programmer has been used to write this compile code into the microcontroller. The firmware implementation is explained in the next chapter. The project design and principle are explained in this chapter using the block diagram and circuit diagram. The block diagram discusses about the required components of the design and working condition is explained using circuit diagram and system wiring diagram. Page 4 of 40 2.4 Block Diagram of the Project and its Description Figure 1: Block diagram of WEMRS Page 5 of 40 Figure: 2 Circuit Diagrams of WEMRS Page 6 of 40 Here as wireless system has two different control systems, so there are two block diagrams one for Master circuit, and other for Slave circuit. Brief explanation of functioning of each block of the system is given below the detailed is given in next chapters Crystal Oscillator: A crystal oscillator is an electronic oscillator circuit that uses the mechanical resonance of a vibrating crystal of piezoelectric material to create an electrical signal with a very precise frequency. This frequency is commonly used to keep track of time (as in quartz wristwatches), to provide a stable clock signal for digital integrated circuits, and to stabilize frequencies for radio transmitters and receivers. Figure 3: Crystal Oscillator The most common type of piezoelectric resonator used is the quartz crystal, so oscillator circuits designed around them became known as "crystal oscillators." Power Supply: Power supply is essential part of any industry. Today in any industry different type of power supplies are used. In which Voltage can be increased or decreased by using set-up Transformer or Step-down transformer respectively; as per requirement. In increased power supply, voltage is step up for high power requirement while in decraesed power supply, output voltage is decreased. The input to the circuit is applied from the regulated power supply. The a.c. input i.e., 230V from the mains supply is step down by the transformer to 5V. This 5V is supplied to the microcontroller and LCD display. Figure 4: Circuit for power supply Page 7 of 40 Microcontroller: Here, we have used microcontroller of atmel series AT89S51. AT89S51 is microcontroller used for controlling. Microcontroller is used because of its simple usability and programming. It controls LCD and sends data to wireless card. Microcontroller is used both in Master and Slave circuits. In slave it sends the read data from meter to LCD and to master through wireless card. Wireless Card: In this project we have used CC2500 wireless card. The CC2500 is a low-cost 2.4 GHz transceiver designed for very low-power wireless applications. CC2500 provides extensive hardware support for packet handling, data buffering, burst transmissions, clear channel assessment, link quality indication, and wake-on-radio. The main operating parameters and the 64-byte transmit/receive FIFOs of CC2500 can be controlled via an SPI interface. In a typical system, the CC2500 will be used together with a microcontroller and a few additional passive components. It is basically used 2400-2483.5 MHz ISM/SRD band systems, Consumer electronics, Wireless game controllers, Wireless audio, Wireless keyboard and mouse, RF enabled remote controls. LCD display: LCD display as output that shows the meter reading and consumed units of power to the user. The firmware programmed in microcontroller AT89S51 is designed to communicate with wireless module and send the data to the master placed at some distance. Figure 5: 16x2 LCD display Page 8 of 40 2.5 Flow chart 1.) SLAVE PART. START CONTINUOUSLY DETECT THE METER READER METER ID RECEIVED? NO YES NO METER ID IS OK? YES SEND THE METER READING TO THE READER. Page 9 of 40 2.) MASTER PART. START SEND THE METER NUMBER WAITING FOR THE DATA. NO DATA RECEIVED? YES SAVE THE DATA SEND SECOND METER NUMBER Page 10 of 40 Chapter 3 3.1 Prime Components of WEMRS Wireless Card CC2500 3.1.1 Description: The CC2500 is a low-cost 2.4 GHz transceiver designed for very low-power wireless applications. The circuit is intended for the 2400-2483.5 MHz ISM (Industrial, Scientific and Medical) and SRD (Short Range Device) frequency band. The RF transceiver is integrated with a highly configurable baseband modem. The modem supports various modulation formats and has a configurable data rate up to 500 kBaud. CC2500 provides extensive hardware support for packet handling, data buffering, burst transmissions, clear channel assessment, link quality indication, and wake-on-radio. The main operating parameters and the 64-byte transmit/receive FIFOs of CC2500 can be controlled via an SPI interface. In a typical system, the CC2500 will be used together with a microcontroller and a few additional passive components. 3.1.2 Key Features: RF Performance High sensitivity (–104 dBm at 2.4 kBaud, 1% packet error rate). Low current consumption (13.3 mA in RX, 250 kBaud, input well above sensitivity limit). Programmable output power up to +1 dBm. Excellent receiver selectivity and blocking performance. Programmable data rate from 1.2 to 500 kBaud. Frequency range: 2400 – 2483.5 MHz. Page 11 of 40 Analog Features OOK, 2-FSK, GFSK, and MSK supported. Suitable for frequency hopping and multichannel systems due to a fast settling frequency synthesizer with 90 us settling time. Automatic Frequency Compensation (AFC) can be used to align the frequency synthesizer to the received centre frequency. Integrated analog temperature sensor. Digital Features Flexible support for packet oriented systems: On-chip support for sync word Detection, address check, flexible packet length, and automatic CRC handling. Efficient SPI interface: All registers can be programmed with one “burst” transfer. Digital RSSI output. Programmable channel filter bandwidth. Programmable Carrier Sense (CS) indicator. Programmable Preamble Quality Indicator (PQI) for improved protection against false sync word detection in random noise. Support for automatic Clear Channel Assessment (CCA) before transmitting (for listen-before-talk systems). Support for per-package Link Quality Indication (LQI). Optional automatic whitening and dewhitening of data. Low-Power Features 400 nA SLEEP mode current consumption Fast startup time: 240 us from SLEEP to RX or TX mode (measured on EM design) Wake-on-radio functionality for automatic low-power RX polling Separate 64-byte RX and TX data FIFOs (enables burst mode data transmission) General Few external components: Complete on chip frequency synthesizer, no external filters or RF switch needed Green package: RoHS compliant and no antimony or bromine Page 12 of 40 Small size (QLP 4x4 mm package, 20 pins) Support for asynchronous and synchronous serial receive/transmit mode for backwards compatibility with existing radio communication protocols. 3.1.3 PIN CONFIGURATION Figure 6: Pin configuration of CC2500. The exposed die attach pad must be connected to a solid ground plane as this is the main ground connection for the chip. Page 13 of 40 Pin-out of CC2500: Table 1: Pin out overview of CC2500 Page 14 of 40 3.1.4 Block diagram description of CC2500: Figure 7: CC2500 Simplified block diagram A simplified block diagram of CC2500 is shown in Figure 2. CC2500 features a low-IF receiver. The received RF signal is amplified by the low noise amplifier (LNA) and down-converted in quadrature (I and Q) to the intermediate frequency (IF). At IF, the I/Q signals are digitized by the ADCs. Automatic gain control (AGC), fine channel filtering, demodulation bit/packet synchronization are performed digitally. The transmitter part of CC2500 is based on direct synthesis of the RF frequency. The frequency synthesizer includes a completely on-chip LC VCO and a 90 degrees phase shifter or generating the I and Q LO signals to the down-conversion mixers in receive mode. A crystal is to be connected to XOSC_Q1 and XOSC_Q2. The crystal oscillator generates the reference frequency for the synthesizer, as well as clocks for the ADC and the digital part. A 4-wire SPI serial interface is used for configuration and data buffer access. The digital baseband includes support for channel configuration, packet handling. Page 15 of 40 3.1.5 Typical application circuit: Figure 8: Typical Application and Evaluation circuit Table 2: Overview of external components used in typical application circuit Page 16 of 40 Only a few external components are required for using the CC2500. The recommended application circuit is shown in Figure 3. The external components are described in Table 14, and typical values are given in Table 15. Bias Resistor The bias resistor R171 is used to set an accurate bias current. Balun and RF Matching The components between the RF_N/RF_P pins and the point where the two signals are joined together (C122, C132, L121, and L131) form a CC2500 SWRS040C Page 18 of 89 balun that converts the differential RF signal on CC2500 to a single-ended RF signal. C121 and C131 are needed for DC blocking. Together with an appropriate LC network, the balun components also transform the impedance to match a 50ohm antenna (or cable). Suggested values are listed in Table 15. The balun and LC filter component values and their placement are important to keep the performance optimized. Crystal The crystal oscillator uses an external crystal with two loading capacitors (C81 and C101). Power Supply Decoupling The power supply must be properly decoupled close to the supply pins. Note that decoupling capacitors are not shown in the application circuit. The placement and the size of the decoupling capacitors are very important to achieve the optimum performance. 3.1.6 Configuration Overview CC2500 can be configured to achieve optimum performance for many different applications. Configuration is done using the SPI interface. Page 17 of 40 The following key parameters can be programmed: Power-down / power up mode. Crystal oscillator power-up / power-down. Receive / transmit mode. RF channel selection. Data rate. Modulation format. RX channel filter bandwidth. RF output power. Data buffering with separate 64-byte receive and transmit FIFOs. Packet radio hardware support. Forward Error Correction (FEC) with interleaving. Data Whitening. Wake-On-Radio (WOR). Figure 9 shows a simplified state diagram that explains the main CC2500 states, together with typical usage and current consumption. For detailed information on controlling the CC2500 state machine and a complete state diagram. Page 18 of 40 Figure 9: Simplified State Diagram with Typical Usage and Current Consumption at 250 kBaud Data Rate and MDMCFG2.DEM_DCFILT_OFF=1 (current optimized) Page 19 of 40 3.1.7 4-wire Serial Configuration and Data Interface CC2500 is configured via a simple 4-wire SPI compatible interface (SI, SO, SCLK and CSn) where CC2500 is the slave. This interface is also used to read and write buffered data. All transfers on the SPI interface are done most significant bit first. All transactions on the SPI interface start with a header byte containing a R/W bit, a burst access bit (B), and a 6-bit address (A5 – A0). The CSn pin must be kept low during transfers on the SPI bus. If CSn goes high during the transfer of a header byte or during read/write from/to a register, the transfer will be cancelled. The timing for the address and data transfer on the SPI interface is shown in Figure 7 with reference to Table 16. When CSn is pulled low, the MCU must wait until CC2500 SO pin goes low before starting to transfer the header byte. This indicates that the crystal is running. Unless the chip was in the SLEEP or XOFF states, the SO pin will always go low immediately after taking CSn Low. 3.1.8 Microcontroller Interface and Pin Configuration In a typical system, CC2500 will interface to a microcontroller. This microcontroller must be able to: Program CC2500 into different modes Read and write buffered data Read back status information via the 4-wire SPI-bus configuration interface (SI, SO, SCLK and CSn) 3.1.8.1 Configuration Interface The microcontroller uses four I/O pins for the SPI configuration interface (SI, SO, SCLK and CSn). Page 20 of 40 3.1.8.2 General Control and Status Pins The CC2500 has two dedicated configurable pins (GDO0 and GDO2) and one shared pin (GDO1) that can output internal status information useful for control software. These pins can be used to generate interrupts on the MCU. GDO1 is shared with the SO pin in the SPI interface. The default setting for DO1/SO is 3- state output. By selecting any other of the programming options the GDO1/SO pin will become a generic pin. When CSn is low, the pin will always function as a normal SO pin. In the synchronous and asynchronous serial modes, the GDO0 pin is used as a serial TX data input pin while in transmit mode. The GDO0 pin can also be used for an on-chip analog temperature sensor. By asuring the voltage on the GDO0 pin with an external ADC, the temperature can be calculated. With default PTEST register setting (0x7F) the temperature sensor output is only available when the frequency synthesizer is enabled (e.g. the MANCAL, FSTXON, RX and TX states). It is necessary to write 0xBF to the PTEST register to use the analog temperature sensor in the IDLE state. Before leaving the IDLE state, the PTEST register should be restored to its default value (0x7F). 3.1.8.3 Optional Radio Control Feature The CC2500 has an optional way of controlling the radio, by reusing SI, SCLK and CSn from the SPI interface. This feature allows for a simple three-pin control of the major states of the radio: SLEEP, IDLE, RX and TX. This optional functionality is enabled with the MCSM0.PIN_CTRL_EN configuration bit. State changes are commanded as follows: Page 21 of 40 When CSn is high the SI and SCLK is set to the desired state according to Table 3. When CSn goes low the state of SI and SCLK is latched and a command strobe is generated internally according to the control coding. It is only possible to change state with this functionality. That means that for instance RX will not be restarted if SI and SCLK are set to RX and CSn toggles. When CSn is low the SI and SCLK has normal SPI functionality. All pin control command strobes are executed immediately, except the SPWD strobe, which is delayed until CSn goes high. Table 3: Optional pin control coding for CC2500 3.2 Microcontroller 3.2.1 Definition of a Microcontroller Microcontroller, as the name suggests, are small controllers. They are like single chip computers that are often embedded into other systems to function as processing/controlling unit. For example, the remote control you are using probably has microcontrollers inside that do decoding and other controlling functions. They are also used in automobiles, washing machines, microwave ovens, toys ... etc, where automation is needed. Page 22 of 40 3.2.2 The key features of microcontrollers: High Integration of Functionality Microcontrollers sometimes are called single-chip computers because they have onchip memory and I/O circuitry and other circuitries that enable them to function as small standalone computers without other supporting circuitry. Field Programmability, Flexibility. Microcontrollers often use EEPROM or EPROM as their storage device to allow field programmability so they are flexible to use. Once the program is tested to be correct then large quantities of microcontrollers can be programmed to be used in embedded systems. Easy to Use Assembly language is often used in microcontrollers and since they usually follow RISC architecture, the instruction set is small. The development package of microcontrollers often includes an assembler, a simulator, a programmer to "burn" the chip and a demonstration board. Some packages include a high level language compiler such as a C compiler and more sophisticated libraries. Most microcontrollers will also combine other devices such as: A Timer module to allow the microcontroller to perform tasks for certain time periods. A serial I/O port to allow data to flow between the microcontroller and other devices such as a PC or another microcontroller. An ADC to allow the microcontroller to accept analogue input data for processing. Page 23 of 40 Figure 10: A typical microcontroller device and its different subunits `The heart of the microcontroller is the CPU core. In the past this has traditionally been based on an 8-bit microprocessor unit. Figure 4.1 above Shows a typical microcontroller device and its different subunits 3.2.3 Microcontrollers versus Microprocessors Microcontroller differs from a microprocessor in many ways. First and the most important is its functionality. In order for a microprocessor to be used, other components such as memory, or components for receiving and sending data must be added to it. In short that means that microprocessor is the very heart of the computer. On the other hand, microcontroller is designed to be all of that in one. No other external components are needed for its application because all necessary peripherals are already built into it. Thus, we save the time and space needed to construct devices. 3.2.4 AT89S51 The AT89S51 is a low-power, high-performance CMOS 8-bit microcontroller with 4K bytes of in-system programmable Flash memory. The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industrystandard 80C51 instruction set and pin out. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. Page 24 of 40 By combining a versatile 8-bit CPU with in-system programmable Flash on a monolithic chip, the Atmel AT89S51 is a powerful microcontroller which provides a highlyflexible and cost-effective solution to many embedded control applications. The AT89S51 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers, two 16-bit timer/counters, a five vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition, the AT89S51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue functioning. The Power-down mode saves the RAM contents but freezes the oscillator, disabling all other chip functions until the next external interrupt or hardware reset. 3.2.4.1 Key features for AT89S51: Compatible with MCS-51® Products 4K Bytes of In-System Programmable (ISP) Flash Memory – Endurance: 1000 Write/Erase Cycles 4.0V to 5.5V Operating Range Fully Static Operation: 0 Hz to 33 MHz Three-level Program Memory Lock 128 x 8-bit Internal RAM 32 Programmable I/O Lines Two 16-bit Timer/Counters Six Interrupt Sources Full Duplex UART Serial Channel Low-power Idle and Power-down Modes Interrupt Recovery from Power-down Mode Watchdog Timer Dual Data Pointer Power-off Flag Fast Programming Time Flexible ISP Programming (Byte and Page Mode) Page 25 of 40 3.2.4.2 PIN CONFIGURATION Figure 11: Pin configuration of AT89S51 The pin configuration shown in figure is dual in package packing. It is the most used package of IC’s due to less space requirement. Page 26 of 40 3.2.4.3 BLOCK DIAGRAM Figure 12: Block diagram of AT89S51 Page 27 of 40 3.2.4.4 Functional description Architectural overview AT89S51 is an 8-bit microcontroller and belongs to Atmel's 8051 family. AT89S51 has 4KB of Flash programmable and erasable read only memory (PEROM) and 128 bytes of RAM. It can be erased and program to a maximum of 1000 times. In 40 pin AT89S51, there are four ports designated as P1, P2, P3 and P0. All these ports are 8-bit bi-directional ports, i.e., they can be used as both input and output ports. Except P0 which needs external pull-ups, rest of the ports have internal pull-ups. When 1s are written to these port pins, they are pulled high by the internal pull-ups and can be used as inputs. These ports are also bit addressable and so their bits can also be accessed individually. Port P0 and P2 are also used to provide low byte and high byte addresses, respectively, when connected to an external memory. Port 3 has multiplexed pins for special functions like serial communication, hardware interrupts, timer inputs and read/write operation from external memory. AT89S51 has an inbuilt UART for serial communication. It can be programmed to operate at different baud rates. Including two timer & hardware interrupts, it has a total of six interrupts. In addition, the AT89S51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset. The microcontroller 8051 is a multi purpose 8-bit microcontroller, which offers high performance and very low power consumption. Figure shows the classic 8051 microcontroller. Classic means the original version, based upon which new enhancement and versions are provided. The classic version consists of following hardware: 1. A 12 MHz clock. Processor instruction cycle time is 1 µs. 2. An 8-bit ALU. The internal bus width is 8-bit. Page 28 of 40 3. CISC (Complex Instruction Set Computer) architecture. [ CISC provides many modes for addressing operands in architecture, logical, and other instruction. Several complex instructions take more than one cycle time. Complex instruction implement in hardware not by separate hardwired logic circuits for each instruction but by a micro program circuit. ] 4. Special bit manipulation instruction. 5. A program counter, in which the initial default reset value defined by the processor is 0x0000. 6. A stack pointer, in which the initial default value defined by the processor is 0x07. 7. A simple architecture, with no floating-point, no cache, no memory management unit, no atomic operations unit, no pipeline and no instruction level parallelism. 8. There is no DMA controller in the classic and most other version. 9. A harvard memory architecture. The program memory and data memory have separate address spaces from 0x0000 and separate control signal(s). 10. On–chip RAM of 128 bytes. 32 bytes of RAM are also used as four banks (sets) of register. Each register bank has 8 register. The external data/stack memory can be added up to 64 kB in most versions. In 8051 enhancement, this limit has been enhanced to 16 MB. 11. There are special four register (SFRs). These are PSW (program status word), A (accumulator), B register, SP (stack pointer) and registers for serial IOs, timers, ports and interrupt handler. 12. Two external interrupt pins, INT0 and INT1. 13. Four ports P0, P1, P2, and P3 of 8 bits each in single chip mode. There are two timers and a serial interface (SI). It can be programmed for three full duplex UART modes for a serial IO. The SI can also be programmed for half duplex synchronous IO. 14. Classic version has no pulse width modulator and provides on support to DAC. It has no modem no watchdog timer, no ADC. Certain versions provides watchdog timer and ADC. On-chip flash program memory (ROM) The microcontroller (8051) incorporates a 4K on-chip program space. This memory may be used for both code and data storage. Programming of the flash memory may be accomplished by using hex file of necessary program and load it by using Loader and Page 29 of 40 software. Various versions of microcontroller 80XX series has different on-chip space (ROM); 8051 has ROM of 4K; 8052 has a ROM of 8K while 8031 has a ROM of 0K. Similarly different versions of 8051 from Atmel have different on-chip Program (Rom flash). On-chip static RAM On-chip RAM may be used for code and/or data storage. As we have seen in on-chip program space (ROM), different versions of controller from Atmel have different RAM as shown in table below Microcontroller ROM RAM AT89S51 4K 128 byte AT89C10551 1K 64 byte AT89C2051 2K 128 byte AT89C52 8K 128 byte Interrupt in controller There are multiple interrupts in 8051. When an interrupt in enable, then on occurrence of that interrupt event, an ISR is called. In port-3, P3.2 and P3.3 as pins for INT0 and INT1 external interrupt pins when bit 7 at IE (interrupt enable SFR) EA (enable all) bit is 1, and bits 0 and 2 are 1 and 1, respectively. SI transmission or receiver interrupt and synchronous mode occur when SI is programmed using SCON. There are two external pins for interrupts from peripherals or external circuit. 8051 provides sets default priorities for service in the case when multiple occur concurrently. Priorities by default are in the order INTO, T0 overflow, INT1, T1 overflow, SI (UART mode), T2 (in 8052) and SI(synchronous mode). Using the SFR, called IP (interrupt priority) register, at address 0xB8 for the byte and at address 0x88 to 0x8C, 0x8D or 0X8E for the individual bits in the register, an instruction can define that a given interrupt is of higher (=1) or lower priority (=0) among the various enable interrupts. Page 30 of 40 Interrupt sources 8- bit SFRs used are IE (one interrupt enable all EA bit to enable interrupts and remaining enable individual interrupts bits) and IP (individual interrupt priorities set high or low bits) External INT0 interrupt T0 overflow interrupt External INT1 interrupt T1 overflow interrupt SI serial UART or synchronous mode interrupt Timer 2 interrupt in 8052 Vector Address from where either the 8-byte ISR executes or jump to the programmed ISR starting address takes place in case EA bit is set as well as specific interrupt bit is set. INT0 0x0000 T0 0x000B INT1 0x0013 T1 0x001B Serial 0x0023 T2 0x002B Syn serial 0x0053 in few version SYSTEM CONTROL Crystal oscillator On-chip integrated oscillator operates with external crystal or we can say that the 8051 has an on-chip oscillator but requires an external clock to run it. Most often a quartz crystal is connected to inputs XTAL1 (pin 19) and XTAL2 (pin 18). It also needs two capacitor of 30 pf value. We should know that there is various speed of the 8051 family. Speed refers to the maximum oscillator frequency connected to XATL. Page 31 of 40 Ex, a 12 MHz chip must be connected to a crystal with 12 MHz frequency or less. If one decide to use a frequency source other than a crystal oscillator, such as a TTL oscillator. It will be connected to XTAL1; XTAL2 is left unconnected. Reset Circuit Reset has two sources on the microcontroller 8051; the RESET pin and power on reset. The RESET pin is a input pin and it is active high (normally low). Upon applying a high pulse to this pin, the microcontroller will reset and terminate all activities. Figure 13: Reset circuit This is also can be done or this is often referred to as a power-on reset. Activating a power – on reset will cause all values in the register to be lost. It will set program counter to all 0s. Memory Organization MCS-51 devices have a separate address space for Program and Data Memory. Up to 64K bytes each of external Program and Data Memory can be addressed. Program Memory If the EA pin is connected to GND, all program fetches are directed to external memory. On the AT89S51, if EA is connected to VCC, program fetches to addresses 0000H through FFFH are directed to internal memory and fetches to addresses 1000H through FFFFH are directed to external memory. Data Memory The AT89S51 implements 128 bytes of on-chip RAM. The 128 bytes are accessible via direct and indirect addressing modes. Stack operations are examples of indirect addressing, so the 128 bytes of data RAM are available as stack space. Page 32 of 40 Watchdog Timer (One-time Enabled with Reset-out) The WDT is intended as a recovery method in situations where the CPU may be subjected to software upsets. The WDT consists of a 14-bit counter and the Watchdog Timer Reset (WDTRST) SFR. The WDT is defaulted to disable from exiting reset. To enable the WDT, a user must write 01EH and 0E1H in sequence to the WDTRST register (SFR location 0A6H). When the WDT is enabled, it will increment every machine cycle while the oscillator is running. The WDT timeout period is dependent on the external clock frequency. There is no way to disable the WDT except through reset (either hardware reset or WDT overflow reset). When WDT overflows, it will drive an output RESET HIGH pulse at the RST pin. Using the WDT To enable the WDT, a user must write 01EH and 0E1H in sequence to the WDTRST register (SFR location 0A6H). When the WDT is enabled, the user needs to service it by writing 01EH and 0E1H to WDTRST to avoid a WDT overflow. The 14-bit counter overflows when it reaches 16383 (3FFFH), and this will reset the device. When the WDT is enabled, it will increment every machine cycle while the oscillator is running. This means the user must reset the WDT at least every 16383 machine cycles. To reset the WDT the user must write 01EH and 0E1H to WDTRST. WDTRST is a write-only register. The WDT counter cannot be read or written. When WDT overflows, it will generate an output RESET pulse at the RST pin. The RESET pulse duration is 98xTOSC, where TOSC=1/FOSC. To make the best use of the WDT, it should be serviced in those sections of code that will periodically be executed within the time required to prevent a WDT reset. WDT during Power-down and Idle In Power-down mode the oscillator stops, which means the WDT also stops. While in Power down mode, the user does not need to service the WDT. There are two methods of exiting Power-down mode: by a hardware reset or via a level-activated external interrupt, Page 33 of 40 which is enabled prior to entering Power-down mode. When Power-down is exited with hardware reset, servicing the WDT should occur as it normally does whenever the AT89S51 is reset. Exiting Power-down with an interrupt is significantly different. The interrupt is held low long enough for the oscillator to stabilize. When the interrupt is brought high, the interrupt is serviced. To prevent the WDT from resetting the device while the interrupt pin is held low, the WDT is not started until the interrupt is pulled high. It is suggested that the WDT be reset during the interrupt service for the interrupt used to exit Power-down mode. To ensure that the WDT does not overflow within a few states of exiting Powerdown, it is best to reset the WDT just before entering Power-down mode. Before going into the IDLE mode, the WDIDLE bit in SFR AUXR is used to determine whether the WDT continues to count if enabled. The WDT keeps counting during IDLE (WDIDLE bit = 0) as the default state. To prevent the WDT from resetting the AT89S51 while in IDLE mode, the user should always set up a timer that will periodically exit IDLE, service the WDT, and reenter IDLE mode. With WDIDLE bit enabled, the WDT will stop to count in IDLE mode and resumes the count upon exit from IDLE. 3.2 Serial Communication in microcontroller 3.3.1 Serial communication overview: Several devices collect data from sensors and need to send it to another unit, like a computer, for further processing. Data transfer/communication is generally done in two ways: parallel and serial. In the parallel mode, data transfer is fast and uses more number of lines. This mode is good for short range data transfer. Serial communication on the other hand, uses only one or two data lines to transfer data and is generally used for long distance communication. In serial communication the data is sent as one bit at a time. This article describes the interfacing of 8051 microcontroller (AT89S51) with a computer via serial port, RS232. Serial communication is commonly used Page 34 of 40 in applications such as industrial automation systems, scientific analysis and certain consumer products. 3.3.2 Serial communication description: The microcontroller AT89S51 has an inbuilt UART for carrying out serial communication. The serial communication is done in the asynchronous mode. A serial port, like other PC ports, is a physical interface to establish data transfer between computer and an external hardware or device. This transfer, through serial port, takes place bit by bit. IBM introduced the DB-9 RS-232 version of serial I/O standard, which is most widely used in PCs and several devices. In RS232, high and low bits are represented by flowing voltage ranges: Bit Voltage Range (in V) 0 +3 +25 1 -25 -3 The range -3V to +3V is undefined. The TTL standards came a long time after the RS232 standard was set. Due to this reason RS232 voltage levels are not compatible with TTL logic. Therefore, while connecting an RS232 to microcontroller system, a voltage converter is required. This converter converts the microcontroller output level to the RS232 voltage levels, and vice versa. IC MAX232, also known as line driver, is very commonly used for this purpose. The simplest connection between a PC and microcontroller requires a minimum of three pins, RxD (receiver, pin2), TxD (transmitter, pin3) and ground (pin5) of the serial port of computer. Page 35 of 40 3.3.3 Overview of MAX232: The MAX232 is a dual driver/receiver that includes a capacitive voltage generator to supply EIA-232 voltage levels from a single 5-V supply. Each receiver converts EIA-232 inputs to 5-V TTL/CMOS levels. These receivers have a typical threshold of 1.3 V and a typical hysteresis of 0.5 V, and can accept ±30-V inputs. Each driver converts TTL/CMOS input levels into EIA-232 levels. The driver, receiver, and voltage-generator functions are available as cells in the Texas Instruments LinASIC™ library. 3.3.4 The key Features of MAX232: Meet or Exceed TIA/EIA-232-F and ITU Recommendation V.28. Operate With Single 5-V Power Supply. Operate Up to 120 Kbit/s. Two Drivers and Two Receivers. ±30-V Input Levels. Low Supply Current . . . 8 mA Typical. Designed to be Interchangeable With Maxim MAX232 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A). 3.3.5 Pin Diagram of MAX232: Figure 13: Pin configuration of MAX232 Page 36 of 40 3.3.6 Circuit diagram to connect MAX232 with microcontroller: TxD pin of serial port connects to RxD pin of controller via MAX232. And similarly, RxD pin of serial port connects to the TxD pin of controller through MAX232. MAX232 has two sets of line drivers for transferring and receiving data. The line drivers used for transmission are called T1 and T2, where as the line drivers for receiver are designated as R1 and R2. The connection of MAX232 with computer and the controller is shown in the circuit diagram. 3.3.7 Parameters to be considered while serial communication: An important parameter considered while interfacing serial port is the Baud rate which is the speed at which data is transmitted serially. It is defined as number of bits transmitted or received per second. It is generally expressed in bps (bits per second). AT89S51 microcontroller can be set to transfer and receive serial data at different baud rates using software instructions. Timer1 is used to set the baud rate of serial communication for the microcontroller. For this purpose, Timer1 is used in mode2 which is an 8-bit auto reload mode. Page 37 of 40 To get baud rates compatible with the PC, TH1 should be loaded with the values as shown: Baud Rate (bps) TH1 (Hex value) 9600 FD 4800 FA 2400 F4 1200 E8 For serial communication AT89S51 has registers SBUF and SCON (Serial control register). SBUF is an 8-bit register. For transmitting a data byte serially, it needs to be placed in the SBUF register. Similarly whenever a data byte is received serially, it comes in the SBUF register, i.e., SBUF register should be read to receive the serial byte. Page 38 of 40 Chapter 4 Conclusion As a part of curriculum in semester-7, we studied wireless card cc2500, its working and application in wireless energy meter reading system. We have enhanced our programming skills by interfacing of keypad, LCD, sevensegment with AT89S51 in KEIL (simulator) and tested on Flash Magic. In the next semester, we are going to implement the hardware of wireless energy meter reading system. The hardware could also be interfaced with the personal computer and result could be stored in the central server and its backup could be taken on the other backend servers. It could be interfaced with printer to get the hard copy of the attendance report almost Page 39 of 40 REFRENCES: http://www.ieee.org http://www.electronicsforyou.com http://www.engineeringgarage.com http://www.keil.com/dd/docs/datashts/atmel/at89s51_ds.pdf Page 40 of 40