High Efficiency Power Converters with Gallium Nitride Transistors Mark Nakmali University of Oklahoma Oklahoma City, Oklahoma Mark.u.nakmali-1@ou.edu Yutian Cui University of Tennessee Knoxville, Tennessee Ycui7@vols.utk.edu Abstract— The abilities of gallium nitride field effect transistors are evaluated. A material comparison on the limitations and costs of gallium nitride, silicon, and silicon carbide is explored. The theory of operation of a gallium nitride transistor is explained and its use and size implications in a buck power converter is demonstrated. The efficiency of the converter circuit is then explained as well as the means to reduce losses. Two simulations using silicon and gallium nitride respectively are used to demonstrate the comparison of efficiency and on-switching period. Finally, the performance of a real gallium nitride buck converter circuit is used to check the validity of the simulated gallium nitride on-switching period. Index Terms—Gallium nitride, HEMT, power converter, high efficiency, power density, direct band gap material, III-V nitride materials, conduction loss, switching loss I. INTRODUCTION It is not any new evidence, the capabilities of Gallium Nitride (GaN). Since the first report in 1991, it has become a topic of growing interest [1]. Because GaN is a direct band-gap material, the energy from electron-hole recombination can turn directly into light, which gave it its first place hold in optoelectronic devices [1]. However, its ability for high efficiency transistor performance was discovered when the two dimensional electron gas was discovered. Even with more research focus on GaN devices, it still has much room for improvement when compared to Silicon devices. Dr. Leon Tolbert University of Tennessee Knoxville, Tennessee Tolbert@utk.edu The graph in Figure 1 shows the breakdown voltage compared to the specific on-resistance, as well as a scatter plot representing where current technology is. A low on-resistance coupled with a high breakdown voltage is desired in a switching device, making the bottom right of this graph become the goal for the most ideal transistors. It is important to point out that silicon technology is already nearing its physical limit, due to its research maturity; however, GaN still has a large margin for improvement before reaching its limits. With the improvement of vertically stacked GaN devices, the breakdown voltage will become larger [3], and its already low on resistance will bring the necessary improvements in GaN technology. There are many other properties of GaN that set it above the other materials. When looking at Figure 2 below, it is easy to see that GaN has the highest qualities in electric field, energy gap, and electron velocity. While GaN is only slightly higher than Silicon Carbide (SiC) in energy gap and electron velocity, the fact that GaN is cheaper than SiC should be taken into consideration [5]. The graph also shows that the only downside that GaN has is its poor thermal conductivity and melting point, making it important to have proper cooling that could increase costs. However, this can be also be decreased by growing the GaN device on a SiC substrate and cooling the device by using the SiC's high thermal conductivity as mentioned in [1] or it can simply be reserved for lower power applications. After taking into account these thermal requirements, GaN has the qualities that give the device the high voltage and high frequency characteristics that are desired in transistors. Fig. 1 Comparison of the voltage breakdown versus the on-resistance including the state of current transistors [2]. Fig. 2 Material property comparison between Si, SiC, and GaN with emphasis on desirable switching transistor properties [4]. It is in these switching transistors that the improvements lie. Currently, the most widely used transistors are made of silicon. These are the most appealing for their cheap costs and manufacturing availability. However, silicon is not necessarily the best material to use in terms of efficiency. This is where gallium nitride comes in. The aim of this project is to show the efficiency of GaN as compared to the state of art silicon MOSFET. Both materials were placed in a synchronous buck or step down converter circuit because of its simplicity and its wide use in power electronics converters. That way, the results of this can be projected onto real world converter applications in order to demonstrate its efficiency and impact on shrinking the size of the circuit. II. BACKGROUND When comparing the performances of GaN versus silicon devices, the first thing to look at is the device specifications between the both of them. There are many characteristics that are desired in a transistor for the application of power converters. The main characteristics are a high drain-to-source voltage, VDS, a low on-resistance, RDS(on), and a small size. Table 1 is a compilation from the data sheets of EPC-CO’s eGaN [6] and IR’s HEXFET [7]. As is shown below in Table 1, to have a fair comparison, the gallium nitride transistor is selected to have the same drain-tosource voltage rating , it excels in most of the other categories. Its on-resistance and size are considerably lower than silicon’s, allowing for a lower amount of conduction loss and space taken on the circuit board and also lower junction capacitances due to the smaller sizes. It also has a higher drain current rating than silicon. One drawback on GaN is that its specified gate-to-source voltage is very small compared to silicon. This means that extra care must be taken when driving the gate in order to not let any voltage overshoots break the GaN device. Nevertheless, GaN’s advantages greatly outweigh its disadvantages when compared to silicon. Another aspect to consider is the price comparison of GaN and silicon devices. On a first look, GaN is vastly more expensive than that of silicon, costing $1900 for a two inch diameter bulk GaN substrate compared to $25-50 for a six inch silicon substrate [8]. It is because of this that using silicon as a substrate in the manufacturing of GaN devices has become a large interest. However, using a different substrate can cause lattice defects which can affect the performance of the device. Because of this, as [9] explains, buffer layers of aluminum nitride or aluminum gallium nitride can be used to lessen the strain on the GaN lattice, but this can add its own costs and TABLE II. PRICE COMPARISON BETWEEN 60V AND 100V EPC-CO EGAN FET VERSUS COMPETING SILICON MOSFETS [10] complexities. Also, it is important to keep in mind that because GaN devices are much smaller, more of them can be made on a single wafer, lowering costs. According to EPC-CO [10], they claim to have reduced the costs of their “eGaN” devices down to be even cheaper than their competing silicon MOSFET devices as shown in Table 2 above. As shown by [11] in Figure 3 below, to fabricate a GaN transistor, it starts with a silicon or silicon carbide substrate. A layer of Aluminum Gallium Nitride (AlGaN) is grown on the epitaxial layer to provide a base for the intrinsic GaN. A very thin layer of AlGaN is then grown on the GaN, providing the interface needed to create the two dimensional electron gas (2DEG). Finally, the contacts and dielectric are placed on the device. Because the 2DEG is normally conducting and it is more desirable for it to be normally off, the configuration of the device is set up such that the gate contact is placed inside the top AlGaN layer such that it can be in enhancement mode [11]. There are many other ways to accomplish this as shown in [12]; however the main idea is to make it such that the 2DEG does not span across the source and drain until the gate contact is charged. GaN’s characteristically high electron velocity is caused by the presence of the 2DEG. As [1] explains, the formation of the 2DEG is due to the boundary between the very thin AlGaN and the intrinsic GaN material. There are two reasons why this interface creates the 2DEG. The first is because AlGaN has a larger bandgap than GaN, causing some of the electrons to diffuse across the boundary. The second is due to what [1] refers to as “polarization doping.” This is caused by both spontaneous interactions and the strain in the AlGaN layer on top of the GaN forming polarizations piezoelectrically. It is the sum of these two polarizations that allow significant 2DEG densities. This 2DEG allows there to be an abundance of free electrons even in the normally inert GaN material. TABLE I. GALLIUM NITRIDE AND SILICON SPECIFICATION COMPARISONS [6] [7] VDS [V] RDS(on) [Ω] ID [A] VGS [V] Size [mm2] Gallium Nitride 30 0.001 60 -4<VGS<6 13.915 Silicon 30 1.3 42 -20<VGS<20 30 Fig. 3 Cross-sectional drawing of EPC-CO’s eGaN [11]. The faster switching ability of GaN also contributes to minimizing the switching loss of the device. Looking at the diagram above, it is caused by the transition of the device from off to on and on to off. It is in these transitions that the voltage and current are non-zero, making their product become a component in the calculation of its power loss. The faster the ability of the device to switch, the shorter the period, tsw(on) and tsw(off), becomes, causing the area under the peaks of the power curve to become thinner, and therefore, smaller, causing the switching loss to become smaller. III. METHODOLOGY Fig. 4 Capacitor and Inductor values exponentially decay with the increase of switching frequency [13]. With this abundance of free electrons and its high mobility, it is able to achieve such high switching speeds. This can allow higher frequencies which are crucial in the role of reducing the size of the passive components in the circuit. As seen above in Figure 4, [13] shows the exponentially decaying relationship between capacitor and inductor values versus the increasing frequencies. With this increase in frequency, the size of the circuit can be allowed to be chip-scale while still maintaining the same power specifications. Energy efficiency particularly appeals to power electronics in the application of converters that consume less power and generate less heat. In the performance of the device, there is a loss of power in the form of switching loss, conduction loss, and gate loss [14]. Because the gate loss with GaN devices on hundred kHz operation has a very small impact on the power loss, it is mentioned but assumed as negligible in this project’s calculations. However, the losses due to conduction and switching have been taken into consideration as shown below in Figure 5 [15]. The conduction loss plays into effect when the device is activated and is conducting electricity. Keeping in mind that the power lost is a product of the device’s resistance and the square of the current through it, it is important that the on-resistance of the device is kept as low as possible. This is also taken care of by the 2DEG and the purity of the GaN lattice offering little scattering, giving GaN a very low on-resistance [5]. With this lower on resistance, the conduction loss is lowered. The theory of operation in a buck converter circuit is demonstrated by [16] as shown at the bottom in Figure 6 [17]. A pulse width modulation (PWM) control signal is used to subsequently turn on and off the high side and low side transistors. When the high side switch is turned on, there is a path for the supply voltage, Vin, to flow through the inductor, thus charging it, and then to the output, Vout. The high side switch is then turned off and the low side switch turned on, separating the supply voltage from the output. It is during this phase that the inductor provides current to the output. This process is then repeated as each transistor is turned off and on. The level of the output voltage is dependent on the duty cycle, D, of the PWM control signal: πππ’π‘ = π·πππ In order to determine the values of the other passive components of the circuit, the following equations from [13] are used: π·(πππ − πππ’π‘ ) πΏ= 2πΌππ’π‘ ππ and (1 − π·) πΆππ’π‘ = , βπ 8ππ 2 πΏ( π ) πππ’π‘ where L is the inductance, Coutis the capacitance, Iout is the output current, fs is the switching frequency, and βVo is the output ripple. In terms of inductor and capacitor size, note that they become smaller as the switching frequency increases. This is why increasing the switching frequency will shrink the size of the circuit as was previously demonstrated in Figure 4. Even after finding the values of the passive components, due to losses and packaging parasitics, the duty cycle is adjusted again during testing to produce the desired output. Fig. 6 A synchronous buck converter circuit [17]. Fig. 5 Representation of the switching and conduction losses shown in one period of transistor operation. [15] IV. RESULTS The following, Figure 7, is a graph of one of the simulations showing power out and power in. For all of the waveforms, the steady state was reached before 200μs. It was only after this time that measurements were taken to ensure that any transient value fluctuations were not included in any of the analyses. Fig. 7 The input power (green) and the output power (maroon). After creating the waveforms, the average of both the Pin and Pout are taken within the period of 240μs and 360μs. These values were then used to find the efficiencies across all sets of variables. Below in Figure 8 are plots of these efficiencies. 3V Input Performance Efficiency 1 0.8 0.6 0.4 0.2 0 12.175 24.06 36.437 Output Power [W] 4V Input Performance Efficiency 1 0.8 0.6 0.4 0.2 0 12.09 24.353 36.514 Output Power [W] 5V Input Performance 1 Efficiency In order to compare the performance of both GaN and silicon devices, their respective simulation models were taken from the manufacturer’s open source codes. The GaN device is modelled after Efficient Power Conversion’s EPC2023 enhancement mode field effect transistor [6]. The silicon device is modelled after International Rectifier’s IRFH8307 single n-channel HEXFET Power MOSFET [7]. Each transistor was put into their respective circuits using the simulation software, LTSPICE. From the measurements, the device performances were then analyzed for losses. Only the loss for the high side transistor was considered. To calculate these losses, [14] provided the equations for both switching, conduction, and gate losses. The switching loss is calculated by πππ πΌπ π=( )(π‘π π€(πππ π) + π‘π π€(ππππ) )(ππ π€ ) 2 and the conduction loss is calculated by πππ’π‘ π = (πΌπ )2 π ππ (ππ) . πππ The gate loss is calculated as, π = ππ πππ π€ , where Qg is the gate charge however, as mentioned before, it is assumed to be negligible. After finding the amount of loss generated, the efficiency of the circuit was then analyzed. This is first done by calculating the input power, Pin, as πππ = πππ πΌπ ππ’πππ and the output power, Pout, as πππ’π‘ = πππ’π‘ πΌππ’π‘ . The efficiency is then calculated as πππ η= . πππ’π‘ During the testing of the circuit, the output voltage was designed to remain at a constant steady-state voltage of 1.2V over all variations. The performance of the devices were tested by varying the input voltage from 3V, 4V, 5V, and 6V, the output current was varied by changing the value of the load resistor to make the output power range from 12V, 24V, and 36V, and the frequency of the device was varied from 200kHz, 600kHz, and 1MHz. Finally, the switching characteristics of the devices were explored. In order to test the validity of the simulation’s outputs, a physical buck converter circuit was made using gallium nitride transistors and the switching times were compared to the measurements of the simulation. This was checked to compare the length of the on-switching transient period. Because the switching losses rely so heavily on the switching transient and they account for the greater majority of the amount of loss in a transistor, it is a good indicator of the performance of the device. 0.8 0.6 0.4 0.2 0 12.038 24.31 Output Power [W] 36.236 6V Input Performance Efficiency 1 0.8 0.6 0.4 0.2 0 12.169 23.996 36.529 Output Power [W] Fig. 8 Performance of GaN (green) and silicon (blue) across all variations of supply voltage (3-6V), output power (12-36W), and frequencies (200kHz dark, 600kHz medium, 1MHz light). As can be seen in the Figure 8 above, there are many different factors that play into the outcome of the efficiency. It is clear that GaN, represented by the green lines, has a higher efficiency than Silicon, represented by the blue lines. The different shades of colors from dark to light represents the performance of the device as the frequency is increased. With the darker colors on top and the lighter colors on bottom, it shows that efficiency is only slightly lowered with the increase of frequency. As the input voltage increases between graphs, efficiency decreases. Lastly, it is important to point out that with the increase in output power, the efficiency goes down, resulting in the negative slope seen in the graphs. The turn on transition of the GaN and silicon simulations were then compared as shown below in Figure 9. The beginning of the switching period was taken as the first instance in which the voltage increased. The end of the switching period was taken as the maximum of the first peak. It should also be stated that very small inductances around 100pH, were placed into the simulations to represent the parasitic inductance that happens with physical circuits. This is the reason why there are the fluctuations at the end of the switching periods. In these comparisons, only the on-switching periods were observed. Fig. 10 The switching period of a physical synchronous buck converter circuit as measured by an oscilloscope. The simulated measurements in Figure 9 show that the switching period of GaN is 2.2ns and the switching period of silicon is 28.7ns. This means that the switching period of silicon is about thirteen times longer than the switching period of GaN. This is one of the main reasons why the efficiency of GaN is better than that of silicon, especially under higher switching frequency, as can be proved by [14]. After determining the performance of the simulations, the performance of the GaN simulations were then compared to a real GaN buck converter circuit. As can be seen above in Figure 10, the oscilloscope graph on the top can be compared to the GaN simulated graph in Figure 9. According to the oscilloscope graph, the measured switching period was 3.5ns, while the simulated graph had a switching period of 2.2ns. This means that the simulated graph has a 1.3ns shorter on-switching period than that of the physical switching period. This deviation could be a product of the imperfections of a physical circuit or it could be that the provided simulated component from the manufacturers was slightly exaggerated. Nonetheless, the high switching ability of GaN is effectively demonstrated in the simulation and the physical circuit and its advantages over silicon devices remain valid. V. CONCLUSION Gallium Nitride devices are a great topic of interest because of the many advantages that it brings to the table. Not only that, but it still has much room to improve, giving promises to an ever improving field of power electronics as well as many other applications. With its high frequency capabilities, devices will be able to become smaller and data communications can be transferred at a much higher and more reliable rate. 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