A programmable gain amplifier*
(Please mark “*” when the work is supported
under financial supports and name the supported project in the footnote)
D. Buckmaster1, †, L. Lugani2, and G. Q. Wang2 (Please mark “†” after the Corresponding
author)
1
Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China
2
Institute of Microelectronics, Tsinghua University, Beijing 100084, China
Abstract: A broadband programmable gain amplifier has been designed. The amplifier is implemented in 0.13 µm
CMOS technology. Measurement results show that the proposed structure with the calibration algorithm can evidently
improve the linearity and resolution of the delay line. The delay resolution is 2 ps and the root mean square jitter of the
delay is 4.71 ps, leading to an error vector magnitude enhancement of 1.32 dB. (The abstract is a concise (short and
clear) summary of your work. It should clearly state the problem, the methods used, the main results, and
the conclusions, and should not include citations and formulas.)
Key words: CMOS technology; amplifier; integrated circuits (3–6 sets of key words are needed)
PACS: 85.40.-e (no more than 3 PACS codes)
EEACC: 2560; 2560B (no more than 3 EEACC codes)
1. Introduction (Times New Roman, word size: 14)
Programmable gain amplifiers (PGA)[1, 2] are the essential blocks in the majority of
communication systems in order to optimize the dynamic range of the system[3–6].
(Times New Roman, word size: 12)
2. Conventional low gain PGA architectures
Figure 1 shows the measured and simulated S parameters.
Figure 1. (Color online) The measured and simulated S parameters.
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*
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Project supported by the National Natural Science Foundation of China (No. 60123456). (Funding project)
† Corresponding author. Email: zhans@semi.ac.cn (Corresponding author)
3. Schematic design of the proposed PGA
3.1. Circuit design
The linearity of the delay line is defined as the deviation of delay from the ideal delay curve when
the control code increases with a step of one. The delay line structure proposed in this paper is shown
in Figure 2; we take the delay line structure from Reference [5] as a contrast. The transfer function is
given as
Vout
AV 0n2
 2
Vin s  2n s  n2 .
(1)
3.2. Gain amplifier circuit design
Table 1 shows the comparison with other recently published PGA.
Table 1. Comparison with other published PGA.
Parameter
Reference [7]
Reference [10]
This work
Technology
90 nm CMOS
130 nm CMOS
130 nm CMOS
Resolution of delay line (ps)
4.20
5.60
2.00
RMS jitter of delay line (ps)
9.33
11.32
4.71
EVM (dB)
-29.81
-29.53
-30.85
ACPR requirements
Met
Met
Met
4. Conclusion
The linearity and resolution of the delay line has a great effect on the transmitter performance.
In order to overcome the bottleneck of low linearity and low resolution, an improved delay line
structure is proposed with a calibration algorithm to conquer PVT variations for this all-digital
design. Measurement results show that the proposed structure with the calibration algorithm can
evidently improve the linearity and resolution of the delay line.
Acknowledgment (Optional)
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The scientific contributions from other people or groups are acknowledged here.
Financial supports are given in the footnote on the first page.
References
[1] Cui Jie, Chen Lei, Kang Chunlei, et al. A high-linearity InGaP/GaAs HBT power amplifier for IEEE
802.11a/n. Journal of Semiconductors, 2013, 34(6): 065001(Journal)
[2] Hur J, Kim H, Lee O, et al. Multi-level LINC transmitter with non-isolated power combiner. Electron Lett,
2013, 49(25): 1624 (Journal)
[3] Lazavi B. Design of integrated circuits for optical communications. Boston: McGraw-Hill, 2003 (Book)
[4] Yoo S J, Ravindran A, Ismail M. A low voltage CMOS transresistance-based variable gain amplifier. IEEE
International Symposium on Circuits and Systems, 2004: 809 (Conference publication)
[5] Guo Z Y. Optical readout infrared imaging system at room temperature. PhD Dissertation, University of
Science and Technology of China, 2005 (in Chinese) (Dissertation)
[6] Sato K. Multi-wavelength semiconductor laser array having phase-shift structures. USA Patent,
US6088374, 1998 (Patent)
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All authors of a publication should be listed, omission is not allowed unless there are more than
three of them; et al. should be used in the later case after the 3rd author to omit the others.