eeprom

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EEPROM Memory
Storing, Reading, and Writing
CS-280
Dr. Mark L. Hornick
1
Atmega32 Memory

Address bus (16-bit in
Atmega32)




Volatile – RAM (fast RW)


SRAM (temp data store)
DRAM
CS-280
Dr. Mark L. Hornick
A unique 16-bit address
references each memory
byte.
Data bus (8-bit)
Nonvolatile – ROM (fast R – slow W)





ROM
PROM
EPROM
EEPROM (permanent data store)
2
Flash ROM (program store)
EEPROM is non-volatile
memory




Power does not have to be supplied to
maintain values stored in EEPROM
EEPROM values are maintained when power
is shut off
EEPROM is (generally) not affected if
Program Memory is rewritten (new program
loaded)
EEPROM can be written/erased at least
100,000 times
CS-280
Dr. Mark L. Hornick
3
EEPROM Memory Addressing

EEPROM is organized and
accessed in bytes, as in SRAM


There are 1024 bytes of EEPROM
Each byte has a unique 16-bit
address


But since there are only 1024 bytes of
EEPROM, only 10 bits are used
The first byte of EEPROM is at
address 0x0000

As compared to SRAM, which starts at
0x0060
CS-280
Dr. Mark L. Hornick
0x0000
Byte 0
0x0001
Byte 1
0x0002
Byte 2
0x0003
Byte 3
0x0004
Byte 4
...
0x03FE
0x03FF
Byte
1022
Byte
1023
4
Data can be stored in EEPROM via the
.db directive
.ESEG
.ORG
; switch further directives to EEPROM segment
0x0000
; set addr for start of EEPROM
x1:
.db 1,5
; alloc 2 bytes in EEPROM with initial values of 1 and 5
title:
.db ‘c’,’e’,’2’,’8’,’0’, ‘0’,0
; allocate 7 bytes in EEPROM
course: .db “CE-2800”, 0
; allocate 8 bytes in EEPROM
Note assembler does NOT automatically insert a NULL char at the end of the string

The .db n,m,… (“define byte”) directive tells the assembler to allocate and
store the bytes n,m… in EEPROM

The initial values of the memory are specified, as with Program Memory
CS-280
Dr. Mark L. Hornick
5
The AVR Assembler creates a
separate file (with the .EEP extension)
containing EEPROM data

You have to load the EEPROM values as a
separate step in AVR Studio

Recall: The .HEX file contains opcodes for
the program as well as Flash memory data
CS-280
Dr. Mark L. Hornick
6
Downloading EEPROM data in
AVR Studio

From the Debug menu, select the “Up/Download
Memory” command


The debugger must be running for this command to become
enabled
The EEPROM data is in an “.eep” file, NOT the “.hex” file
CS-280
Dr. Mark L. Hornick
7
Reading data from EEPROM
There are no specific instructions to load (read)
data from EEPROM
Instead, EEPROM is accessed as if it were an I/O
Subsystem

EEPROM is accessed via Special-purpose I/O
Registers

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
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EECR – Control Register
EEARH – Address Register (high 2 bits)
EEARL – Address Register (low 8 bits)
EEDR - Data Register
CS-280
Dr. Mark L. Hornick
8
Using EEPROM I/O Registers
to read EEPROM data
.ESEG
; put data in EEPROM
values: .db 1,2,3,4,5
.CSEG
CLR
OUT
temp
EECR, temp ; clear EECR bits
; load the address of EEPROM data we want to read
LDI
ZL, LOW(values) ; low 8 bits of the address
LDI
ZH, HIGH(values) ; high 2 bits
OUT
EEARL, ZL ; set EEPROM address
OUT
EEARH, ZH
;next, tell the EEPROM we want to read it
SBI
EECR, 0
; set EERE=1 (read enable)
; after SBI, the EEPROM value is in the EEDR register
; finally, move the value in EEDR to a regular register
IN
temp, EEDR ; move data to temp register
CS-280
Dr. Mark L. Hornick
9
Using EEPROM I/O Registers
to write EEPROM data
.ESEG
; reserve space in EEPROM
values: .byte 5
.CSEG
CLR
OUT
temp
EECR, temp ; clear EECR bits
; load the address of EEPROM data we want to write
LDI
ZL, LOW(values) ; low 8 bits of the address
LDI
ZH, HIGH(values) ; high 2 bits
OUT
EEARL, ZL ; set EEPROM address
OUT
EEARH, ZH
EEWE is cleared automatically after the
byte is actually written, but each
EEPROM write takes several ms, so
EEWE will remain set for some time
Wait:
SBIC EECR, 1
; check if EEWE is clear (write not in progress)
RJMP wait
; loop back if not clear (takes several ms)
LDI
temp, ‘a’ ; the value to be written to EEPROM
OUT
EEDR, temp ; move the value to EEDR
SBI
EECR, 2
; bit EEMWE: master write enable
; note: EEMWE is cleared automatically after 4 clock cycles
SBI
EECR, 1
; bit EEWE: clr’d automatically after write
CS-280
Dr. Mark L. Hornick
10
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