Mustafa Khairallah Boost Valley Boost Valley Consulting Universal Verification Methodology (UVM) Benefits 1 Verification Needs UVM Benefits Example: I2S Conclusion Boost Valley Consulting Outline 2 Code Reuse Test Cases & Scenarios Modification Functional Coverage Calculation Generating & Managing Reports Debugging Communication Boost Valley Consulting Verification Needs 3 Code Reuse Test Cases & Scenarios Modification Functional Coverage Calculation Generating & Managing Reports Debugging Communication Boost Valley Consulting Verification Needs - Development 4 Code Reuse Test Cases & Scenarios Modification Functional Coverage Calculation Generating & Managing Reports Debugging Communication Boost Valley Consulting Verification Needs - Compilation 5 Code Reuse Test Cases & Scenarios Modification Functional Coverage Calculation Generating & Managing Reports Debugging Communication Boost Valley Consulting Verification Needs - Runtime 6 Code Reuse Test Cases & Scenarios Modification Functional Coverage Calculation Generating & Managing Reports Debugging Communication Boost Valley Consulting Verification Needs - Debugging 7 Verification Methodologies Do the same things the same way: Test/Test-bench separation: Compile once, run many times. Utilities: Functional coverage – reporting mechanisms - … etc. Boost Valley Consulting Ease of communication. 8 Boost Valley Consulting UVM Benefits 9 Boost Valley Consulting UVM Adoption 10 Test/Test-bench separation Test • Test Writer: Analysis Agent Test Register Model Configurations Passive Agent Environment Env (Testbench) • Selects sequences, • Configures the environment(s) • Runs test. • UVC User: Integrates UVCs into environment to test different designs. Active Agent Bus Agent DUT UVCs • Developer: UVC Design • Complication phase. Boost Valley Consulting Environment 11 Test/Test-bench separation Environment Analysis Agent Register Model Configurations Passive Agent Active Agent Bus Agent Environment Boost Valley Consulting Test 13 Configurability Configurations can be: Structural configurations. Runtime configurations. Provides topological flexibility: Components can be overridden, removed or configured. Boost Valley Consulting Controlled by the test writer. 14 UVM is compatible with the TLM 2.0 standard. Uses port/export communication. Hides communication details (pin level activities) Eases customization using configurations & overrides. Block 1 Block Block 2’ 2 Boost Valley Consulting TLM 2.0 15 Boost Valley Consulting Constrained Randomization 16 Boost Valley Consulting Coverage Collector 17 Boost Valley Consulting Checker (Reference Model) 18 Boost Valley Consulting Checker (Assertions) 19 Boost Valley Consulting Built-in reporting mechanisms. 20 Boost Valley Consulting Built-in reporting mechanisms. 21 Boost Valley Consulting 2 Practical Example :I S 22 Introduction I2S Bus Purpose: Communicate PCM audio data between integrated circuits. Characteristics Separates clock and serial data signals. Lower Jitter. Can recover clock from data stream. Boost Valley Consulting I2S stands for Inter-IC Sound, DUT is a slave I2S transceiver. It is around 2000 gates. 23 Boost Valley Consulting UVM Test-Bench Architecture 24 Runtime Comparison > 10 Times Reduction!! 25 Time in minutes VHDL UVM 15 VHDL Test-Bench UVM Test-Bench 10 5 No. of test cases 0 2 20 200 2000 20000 200000 2000000 Boost Valley Consulting 20 26 Conventional Test-bench UVM Test-Bench • Mainly simulation-based • Limited assertion-based capabilities • Simulation based • Advanced assertion-based in System Verilog & UVM Mostly directed testing Constrained random testing & directed testing Boost Valley Consulting Summary 27 Conventional Test-bench UVM Test-Bench Can’t automatically guarantee full functional coverage Supports functional coverage Boost Valley Consulting Summary 28 Conventional Test-bench UVM Test-Bench Strongly coupled with DUT Loosely coupled with DUT Requires longer development time Reusability reduces development time Boost Valley Consulting Summary 29 Questions? Boost Valley Consulting Thank You 30