Junction Barrier Schottky Rectifiers in Silicon Carbide
Fanny Dahlquist
KTH, Royal Institute of Technology
Department of Microelectronics and Information Technology
Stockholm, 2002
Junction Barrier Schottky Rectifiers in Silicon Carbide
A dissertation submitted to Kungliga Tekniska Högskolan,
Stockholm, Sweden, in partial fulfillment of the requirements
for the degree of Teknisk Doktor.
 2002 Fanny Dahlquist
KTH (Kungliga Tekniska Högskolan)
Royal Institute of Technology
Department of Microelectronics and Information Technology
Electrum 229,
SE-164 40, Kista
SWEDEN
ISRN KTH/EKT/FR-2002/4-SE
ISSN 1650-8599
TRITA - EKT
Forskningsrapport 2002:4
Printed in 250 copies by Kista Snabbtryck AB, Kista 2002
Dahlquist, Fanny: Junction Barrier Schottky Rectifiers in Silicon Carbide
ISRN KTH/EKT/FR-2002/4-SE, KTH, Royal Institute of Technology, Department of
Microelectronics and Information Technology, Stockholm, 2002
ABSTRACT
Silicon carbide (SiC) is a semiconductor material that may enable the transition of
traditional silicon (Si) power electronics into smart power. SiC material properties
allow devices with higher voltage rating and higher operating temperatures compared
to Si, which translates into smaller and less expensive components. Switches and
rectifiers are key components in power electronics and the Junction Barrier Schottky
(JBS) and Schottky rectifier in SiC are candidates to replace Si PiN diodes in the 3003300 V blocking voltage range.
The JBS rectifier combines a Schottky and PiN diode structure making use of the
advantages of both types. The forward voltage drop was investigated and analytic
equations formulated, considering the Schottky barrier height, the drift region and the
geometrical layout. A p+ grid structure was implemented and a design procedure to
minimize the drift region resistance for any blocking voltage was derived.
JBS diodes and reference Schottky diodes were fabricated on several 4H (and 6H)
SiC wafers with epitaxial (epi) designs for 600-3300 V blocking voltages. The
increase in forward voltage for the JBS diode compared to the Schottky diode due to
the p+ grid resistance is compensated by the fact that higher blocking voltages are
reached. For example, JBS diodes were shown to withstand 1500 V blocking voltage
where Schottky diodes only yielded 1100 V on the same epi layer. The reason is that
JBS diodes can withstand 20% higher junction electric field compared to Schottky
devices. This favorable scaling applies to all the investiga ted voltages. Blocking
voltage up to 3300 V was reached for JBS diodes with less than 2.1 V forward drop
for 2A current rating.
Furthermore, the JBS diodes show higher blocking yield than the Schottky diodes,
especially on those wafers where poor Schottky contact properties were measured.
This is explained by the different blocking mechanisms (p+ n junction versus Schottky
junction) and shows that the JBS design is less sensitive to imperfections and crystal
defects in state-of-the-art SiC material.
Keywords: silicon carbide, JBS rectifier, Junction Barrier Schottky (JBS), Schottky
rectifier, MPS rectifier, power rectifier, punch-through design, power loss, high
blocking voltage
Junction Barrier Schottky Rectifiers in Silicon Carbide
Table of Contents
Table of Contents............................................................................................................... i
Appended papers.............................................................................................................. ii
Related papers not included in the thesis ................................................................ iii
Summary and author’s contribution to the appended papers ............................ iv
Acknowledgements......................................................................................................... vi
1. Introduction ..................................................................................................................
1
2. Background ..................................................................................................................
3
2.1 Silicon carbide properties............................................................................................ 3
2.2 Device fabrication......................................................................................................... 4
3. Power rectifiers............................................................................................................ 6
3.1 Power diode concepts ................................................................................................. 6
3.2 Important parameters for power rectifiers ................................................................ 9
4. Forward and reverse characteristics of Schottky and JBS diodes .............16
4.1 Forward conduction characteristics .........................................................................16
4.2 Reverse blocking characteristics .............................................................................19
4.3 Summary of leakage current mechanisms............................................................23
4.4 Other variants on JBS structures .............................................................................25
5. Device design for 600-3300 V diodes...................................................................27
1. Minimized drift resistance by punch-through epitaxial design.............................27
2. Ideal and state-of-the-art parameters and forward voltage calculations ...........33
6. Fabrication process..................................................................................................43
6.1 Critical steps in JBS (and Schottky) diode process ..............................................43
6.2 Experimental
...............................................................................................................48
7. Results and discussion ...........................................................................................51
7.1 Papers I-V....................................................................................................................51
7.2 Electrical characterization and parameter extraction............................................53
7.3 Paper VI and Paper VII..............................................................................................55
7.4 Transient measurements ..........................................................................................59
8. Conclusions................................................................................................................60
9. References ..................................................................................................................62
i
Fanny Dahlquist
Appended papers
I.
Junction Barrier Schottky diodes in 6H SiC
C.-M. Zetterling, F. Dahlquist, N. Lundberg, and M. Östling,
Solid-State Electronics, 42, 1757 (1998)
II.
Junction Barrier Schottky Diodes in 4H-SiC and 6H-SiC
F. Dahlquist, C.-M. Zetterling, M. Östling, and K. Rottner,
Materials Science Forum, 264-268, 1061 (1998)
III.
A 2.8 kV, 2 V forward drop JBS diode with low leakage
F. Dahlquist, J.-O. Svedberg, C.-M. Zetterling, M. Östling,
B. Breitholtz, and H. Lendenmann,
Materials Science Forum, 338-342, 1179 (2000)
IV.
A High Performance JBS Rectifier - Design Considerations
F. Dahlquist, H. Lendenmann, and M. Östling,
Materials Science Forum, 353-356, 683 (2001)
V.
Long Term Operation of 4.5 kV PiN and 2.5 kV JBS Diodes
H. Lendenmann, F. Dahlquist, N. Johansson, R. Söderholm,
P. A. Nilsson, J. P. Bergman, and P. Skytt,
Materials Science Forum, 353-356, 727 (2001)
VI.
A JBS diode with controlled forward temperature coefficient and surge
current capability
F. Dahlq uist, H. Lendenmann, and M. Östling,
Materials Science Forum, 389-393, 1129 (2002)
VII.
Junction Barrier Schottky (JBS) and Schottky diodes in silicon carbide for
the 600-3300 V blocking voltage range
F. Dahlquist, H. Lendenmann, and M. Östling,
Submitted to IEEE Transactions on Electron Devices (May 2002)
ii
Junction Barrier Schottky Rectifiers in Silicon Carbide
Related papers not included in the thesis
VIII. Demonstration of Lateral Boron Diffusion in 4H-SiC Using the JBS Device
as Test Structure
F. Dahlquist, H. Lendenmann, M. S. Janson, and B. G. Svensson,
Presented at the International Workshop on Ultra low- loss Power Device
Technology, UPD2000, and printed in Journal of Future Electron Devices, 11, 2,
(2000)
IX.
Performance and Reliability of High Power SiC diodes
H. Lendenmann, F. Dahlquist, N. Johansson, J. P. Bergman, H. Bleichner, and
C. Ovrén,
Presented at the International Workshop on Ultra low- loss Power Device
Technology, UPD2000, and printed in Journal of Future Electron Devices, 11, 2,
(2000)
X.
4.5 KV 4H-SiC diodes with ideal forward characteristic
H. Lendenmann, A. Mukhitdinov, F. Dahlquist, H. Bleichner, M. Irwin,
R. Söderholm, and P. Skytt,
Proceedings of the International Symposium of Power Semiconductors, 31
(2001)
XI.
High Power SiC diodes: Characteristics, Reliability, and relation to
material defects
H. Lendenmann, F. Dahlquist, J. P. Bergman, H. Bleichner, and C. Hallin,
Materials Science Forum, 389-393, 1259 (2002)
iii
Fanny Dahlquist
Summary and author’s contribution to the appended papers
The author’s contribution to the work in Papers I-VII is as follows:
Paper I: Junction Barrier Schottky diodes in 6H-SiC
In Paper I JBS diodes in silicon carbide were reported for the first time. In this work the
goal was to develop a process to verify the first design of JBS devices in SiC and
electrically characterize them in comparison with Schottky and PiN diodes. The author
participated in the process development, processed the devices and did most of the
analysis and electrical characterization as well as contributed to the manuscript.
Paper II: Junction Barrier Schottky Diodes in 4H-SiC and 6H-SiC
In Paper II, the author fabricated JBS devices in both 4H and 6H-SiC. The goal was to
demonstrate the usefulness of 4H- material for power devices and improve the results
from Paper I. The author did further process development compared to Paper I, which
included improvement in implantation profile and Schottky contact formation. The
author did all processing, electrical characterization, most of the analysis part and wrote
the manuscript.
Paper III: A 2.8 kV, 2 V forward drop JBS diode with low leakage
In Paper III the author did a complete new experiment design based on the results in the
previous experiments. The goal was to fabricate 3 kV JBS diodes with as low forward
voltage drop as possible. The author did a comprehensive experiment design in both
layout and process. The author did part of the processing, all electrical measurements of
the finished devices, the analysis and writing of the manuscript.
Paper IV: A High Performance JBS Rectifier - Design Considerations
In Paper IV the author performed a more extensive analysis of the design variations in
Paper III and wrote the manuscript.
iv
Junction Barrier Schottky Rectifiers in Silicon Carbide
Paper V: Long Term Operation of 4.5 kV PiN and 2.5 kV JBS Diodes
In Paper V the JBS diodes in Paper III and Paper IV were presented together with
results on separately processed PiN diodes. The author contributed in the analysis and
writing of the manuscript.
Paper VI: A JBS diode with controlled forward temperature coefficient and surge
current capability
In Paper VI the temperature dependence and capability to handle high current densities
in a JBS diode was studied. The author did the experiment design, the analysis part and
writing of the manuscript.
Paper VII: Junction Barrier Schottky (JBS) diodes in silicon carbide for the 6003300 V blocking voltage range
For Paper VII JBS and Schottky diodes were processed with an improved design based
on the previous results and the goal was to demonstrate the advantages by using a JBS
diode concept for different blocking vo ltages. The author designed the experiments,
developed the process, did all electrical characterization, analysis and wrote the
manuscript.
v
Fanny Dahlquist
Acknowledgements
In March 1997, I started as PhD student at the Electronics department and eight months
later, in November, I decided to accept the opportunity to continue with an industrial
PhD working for ABB. During five intensive years I have now combined practical
research work in an industrial environment with the academic side of research.
This thesis is a result of a daily work that has been carried out with both short term and
long term goals and perspectives. But what really makes this thesis possible is that I
have gone into a deep analysis of the normal work from time to time. The difference
between being an engineer and a researcher became obvious to me during these times of
diving deeply into my research field.
Now, I am bringing my thesis to an end and it is a collected analysis of my work. It has
been decisive to discuss my research with my supervisors and colleagues.
First of all I want to thank Professor Mikael Östling, for creating a PhD position and for
being such inspiring, encouraging and professional supervisor! I also want to express
my gratitude to Dr. Heinz Lendenmann, Dr. Christer Ovrén and Ove Albertsson at ABB
for all the support. Thanks goes also to colleagues at the EKT and FTE departments.
Special thanks to Dr. Carl-Mikael Zetterling and Dr. Erik Danielsson for reading my
thesis manuscript. I would also like to thank my colleagues at ABB for a great working
atmosphere.
I am in the happy situation to be surrounded by a caring family. My parents Gudrun and
Sven-Gunnar, my brother Mårten and his Johanna, my brother Olof and his Hanna. My
grandparents Birgit and Börje Åstrand, and Inga-Lisa and Arne Dahlquist. Thank you
for your support in all kind of ways!
Thanks also to my friends Jenny, Lotta and Denny, you have meant a lot to me during
this time. You are great friends, always there when I need you.
Finally, to Jens Nordquist in Göteborg, thank you for your unconditional support.
Fanny Dahlquist
May 2002
vi
Junction Barrier Schottky Rectifiers in Silicon Carbide
1. Introduction
The role of efficient power electronics and power devices become more important in the
modern society since we consume more and more electricity. One issue is saving energy
to suppress increase in CO2 gas, another is that the information society puts stronger
requirements on reliable and stable electrical energy supply. Power electronics control
or modify the flow of electrical energy between sources and their loads in many
applications. One example where more efficient power electronics is necessary is for
future energy sources such as wind power, solar cells and fuel cells. The transmission of
electricity from these sources needs to be more efficient to realize the m into
economically competitive alternatives to conventional energy sources.
Silicon carbide is considered as the semiconductor material that will enable the
transition of traditional silicon power electronics into smart power. Silicon carbide has
material properties that allow devices with higher voltage rating and higher operating
temperatures compared to traditional silicon, which translates into smaller and less
expensive components. Reduced energy loss, more efficient use of the power grid,
increased controllability and better switching properties are all attributes to devices
made of silicon carbide.
In power electronic systems, such as high voltage DC transmission (HVDC), control
electronics, power supplies and motor drives, switches and rectifiers are key
components. This thesis is about high voltage rectifiers in silicon carbide intended to
replace the silicon rectifiers utilized today. Unipolar rectifiers in silicon carbide (SiC),
Junction Barrier Schottky (JBS) or Schottky diodes, are candidates to replace silicon
(Si) bipolar PiN diodes in the 300-3300 V blocking voltage range. The first SiC
Schottky diodes for 300 V or 600 V are now commercially available [1-4]. The Junction
Barrier Schottky (JBS) rectifier is a device, which combines a PiN diode and a Schottky
diode making use of the advantages of both types [5,6].
In this thesis, the JBS diode concept is designed and verified experimentally for 4H and
6H silicon carbide, and compared to Schottky and PiN rectifiers. Chapter 2 gives a
background to silicon carbide and why its material properties give outstanding device
performance for power devices compared to other semiconductor materials. Chapter 3
presents the important parameters for power rectifiers and in Chapter 4 an analytic
model for the total forward drop over a Schottky and JBS diode is discussed and
compared. In Chapter 5 parameters affecting the trade-off between forward voltage and
blocking voltage are identified and summarized. In Chapter 6 the most critical steps in
1
Fanny Dahlquist
the processing of JBS diodes are identified and described and the fabrication process is
presented. Electrical characterization and discussion of the results in the appended
papers are found in Chapter 7. Finally, this thesis work is concluded.
2
Junction Barrier Schottky Rectifiers in Silicon Carbide
2. Background
2.1 Silicon carbide properties
The high electric breakdown field strength, high thermal conductivity, low intrinsic
carrier concentration and the high saturated drift velocity are important properties that
give silicon carbide high potential in the field of high-power devices. Power losses are
substantially reduced since devices with both higher blocking voltage, lower onresistance and higher operating temperatures than comparable silicon (Si) devices can
be manufactured. It is the wide bandgap energy (3 eV), which translates into high
electric breakdown field strength, about ten times higher than in Si. Rectifiers and
switches can then be designed with ten times thinner drift layer, resulting in one to two
decades of performance improvement. SiC has for more than 50 years received attention
as a material for high power devices but until early 90’s no wafer bulk material of
device quality was available. During the last ten years rapid development in material
quality has resulted in intensive research in the areas of high-power, high-temperature
and high-frequency devices.
SiC consists of equal parts of silicon and carbon atoms and exists in more than 300
crystal structures, called polytypes. 4H SiC (Figure 1) and 6H SiC are the polytypes
showing best physical and electrical properties for device fabrication. 6H- material is
mainly used for high frequency devices while 4H- material is used for high power
devices due to the higher electron mobility.
Figure 1 The 4H SiC crystal structure where each plane contains one carbon atom
layer and one silicon atom layer. (Photograph is taken from a crystal structure model.)
3
Fanny Dahlquist
Table 1 Comparison of electrical properties for the traditional power semiconductor
materials Si and GaAs and the wide band gap semiconductors SiC, GaN and diamond.
Property
Si
GaAs
6H-SiC
4H-SiC
GaN
Diamond
n [cm2/Vs]
1.1
0.29*
1350*
1.4
0.3
8500
3.0
2.5
400
3.3
2.4**
880**
3.4
3.3
1000
5.5
20
2200
p [cm2/Vs ]
490*
400
80
120
30
1800

11.8
12.8
10
10
8.9
5.7
 [W/cmK]
ni [cm-3]
1.5
0.5
3.0-3.8***
3.0-3.8***
1.3
20
1.5e10
2.0e6
- (low)
5e-8
- (low)
- (low)
sat [107 cm/s]
1
1
2
2
2.5
1.5
at T=300K
Eg [eV]
Ec [MV/cm]
*
for Nd=110 14 cm-3, ** for Nd=61015 cm-3 (2500 V), parallel to c-axis, *** at E>2105 V/cm
In Table 1 the electrical properties are compared for the semiconductor materials that
are of interest for high power. Si and gallium arsenide (GaAs) are the traditional
materials. Gallium nitride (GaN) and diamond are, like SiC, wide bandgap materials
also considered as future power semiconductor materials. Diamond, which is the
material with the highest inherent potential for high-power devices, is behind SiC in
high-quality bulk material development and for example no n-type dopant has yet been
found, which makes device development a difficult.
2.2 Device fabrication
State-of-the-art 4H-SiC material still contains a variety of defects affecting the device
properties. The crystal defects that still are present in the substrate material, makes
processing of working devices in SiC a challenge. Table 2 summarizes the most
common reported defects in 4H-SiC and their effect on device characteristics. Due to
the high binding energy SiC also has high chemical stability and extreme mechanical
hardness. This makes process technology more complicated compared to Si although
many Si processes can be used with some modifications.
4
Junction Barrier Schottky Rectifiers in Silicon Carbide
Table 2 Most common defects in 4H-SiC, typical density and effects on power device
characteristics. (The table is taken from Paper V.)
Defect type
Typical density
Effect on device
Micropipes
1-30 cm-2
reduced blocking, <50 - 70% Ec
Carrots
0.1-10 cm-2
Ec, leakage current, ideality factor
Major pits
1-100 cm-2
Ec, leakage current
Screw dislocations
103 cm-2
reduced blocking, < 80% Ec
Edge dislocations
104-105 cm-2
not known
Low angle grain boundaries
102-103 cm-2
lifetime reduc tion
Threading dislocations
a few cm-2
not known
Stacking faults
100-102 cm-2
lifetime reduction
5
Fanny Dahlquist
3. Power rectifiers
Switches and rectifiers are key components in power electronic systems, which cover a
wide range of applications, from power transmission to control electronics and power
supplies. The total power handling ranges from 40W in control electronics, to several
MW in power transmission.
Table 3 Example of common applications that utilize power rectifiers.
Application
Diode blocking
Diode current
voltage
High Voltage DC
transmission
(HVDC)
Switching
frequency
5000-25000V
100-3000A
50Hz - few kHz
1700-6500V
500-1500A
50 - 1kHz
Power supplies and
motor drives
300-1200V
3-100A
2kHz - 250kHz
Control electronics
40-300V
1-10A
50kHz several 100kHz
Traction and
industrial drives
3.1 Power diode concepts
When realizing SiC power devices that will operate in applications with lower power
losses compared to Si is it important to design and fabricate devices that really make use
of the better electrical properties of SiC. The improved device performance should
result in higher blocking voltages for the same total power losses as for Si devices and
higher possible operating temperatures (above 125 C). Then the benefit is fewer
components and less cooling equipment. The natural approach is to start with power
diode structures well known in Si and GaAs technology and then adapt and modify
design and process to the SiC material. For power diodes there are three main device
structure concepts:
1) Schottky diode
Unipolar diode that offers extremely high switching speed, but suffers from high
leakage current. A unipolar diode means that the current conduction is governed only by
majority carriers (electrons).
6
Junction Barrier Schottky Rectifiers in Silicon Carbide
2) PiN diode
Bipolar diode that offers low leakage current but shows reverse recovery current charge
during switching as a consequence of minority (holes) and majority (electrons) carriers
both are involved in the current conduction.
3) Junction Barrier Schottky (JBS) diode
Unipolar diode, which combines Schottky- like on-state and switching characteristics
with PiN- like blocking characteristics.
3.1.1 The Junction Barrier Schottky (JBS) diode
A pn junction in SiC has a large forward voltage drop (about 3 V) because of the wide
bandgap energy. For low and medium voltage applications, 300-4500 V, the forward
drop becomes a significant part of the static losses in SiC PiN diodes. On the other
hand, using a Schottky diode as rectifier where the forward voltage drop (1-1.5 V) is
proportional to the Schottky barrier height may result in excessive reverse leakage
current, thus limiting the desired blocking voltage.
The JBS device was first demonstrated in silicon [5,6] and is a Schottky structure with a
p+n junction grid integrated into its drift region. Schematic cross sections of Schottky
and PiN diode structures in comparison with a JBS structure are shown in Figure 2. In
forward conduction mode the current flows unipolar through the multiple conductive
channels under the Schottky contact with a voltage drop determined by the metalsemiconductor Schottky barrier height. In reverse blocking mode the p+n junctions
become reverse biased and the depletion layers spread into the channel and pinch off the
Schottky barrier. After pinch-off a potential barrier is formed which limits the electric
field at the Schottky contact while the drift region supports further increase in voltage.
The spacing between the p+ regions should be designed so that pinch-off is reached
before the electric field at the Schottky contact increases to the point where excessive
leakage currents occur due to tunneling currents. Lowering of the leakage current
without too much increase in on-resistance can be obtained for the JBS if an optimized
spacing is used in the p+ grid design.
7
Fanny Dahlquist
Schottky metal
Ohmic contact
Anode
Anode
P+
P+
Schottky
Schottky
PiN
NN- epi
epi
N+ substrate
N- epi
N+ substrate
Cathode
Cathode
Schottky metal/
Ohmic contact
P+
Anode
P+
JBS
JBS
N- epi
N+ substrate
Cathode
Figure 2 Schematic diode structures of Schottky, PiN and JBS diodes.
In Si, the difference in barrier voltages in a PiN diode and Schottky diode are small thus
giving similar forward voltages (about 0.8 V). Hence the reduced leakage current in the
JBS diode is not justifying the increase in on-resistance [7]. The JBS structure in Si is
mainly used to lower the recovery transient losses. By operating the diode at a forward
voltage where the p+ regions are injecting but at the same time having current
conduction through the Schottky contact the reverse recovery current is lowered with
only a little sacrifice in forward voltage and leakage currents. When the JBS diode is
operated in this mode it is usually referred to as the Merged Pinch Schottky (MPS)
rectifier.
SiC JBS or Schottky diodes could replace Si diodes with much lower reverse recovery
charge during turn-off of the rectifier while still exhibiting low conduction losses.
8
Junction Barrier Schottky Rectifiers in Silicon Carbide
3.2 Important parameters for power rectifiers
The most important parameters when quantifying a power rectifier are blocking voltage
(VB), on-resistance (Ron), and forward voltage drop (VF). How these parameters change
with temperature have to be considered. For rectifiers the static on-state losses can be
expressed in the forward voltage drop over the diode (VF) and the on-resistance (Ron) in
the drift region, which accommodates the specified blocking voltage. In Figure 3 these
parameters are compared for a SiC PiN, Schottky and JBS diode. The barrier voltage
over the diode is lower for a Schottky and JBS diode compared to the PiN diode since it
is determined by the metal-semiconduc tor barrier height (B) instead of a p+n junction
barrier. On the other hand the on-resistance is lower for the PiN diode since the forward
current is conductivity modulated. The PiN diode on-resistance is a function of blocking
voltage, current density and carrier lifetime in the base. In the Schottky and JBS diode
the conduction is a unipolar electron current giving a linear current dependence with
forward voltage drop (see Figure 4).
SiC PiN
SiC Schottky
VF2.8V
SiC JBS
V F  1V
VF1V
Ron=Rdrift
Ron=Rdrift,JBS+Rgrid
B
B
(0.8V for Si)
Ron=f(VB,J,)
= tepi/(qnNd)
J (A/cm2)
Figure 3 Contributions to the total on-state losses for a PiN diode, Schottky diode, and
JBS diode respectively. The JBS diode has an additional resistive part from the p+n
junction grid compared to the Schottky diode.
For the total on-state losses contact resistances and substrate resistance must also be
accommodated for. Silicon carbide wafers (substrates) are normally 300 m thick with
1018 cm-3 nitrogen (N) doping. Then the substrate resistance is 0.1-0.3 mcm2 resulting
in voltage drops of 10-30 mV at 100 A/cm2. Reproducible contact resistances to n-type
SiC using nickel as contact metal are in the 10-5 cm2 to 10-4 cm2 range, which results
9
Fanny Dahlquist
in voltage drops of around 10 mV at 100 A/cm2 [8]. Then a good estimation is that the
substrate plus contact resistance contribution to the total forward voltage drop is
maximum 100 mV.
In Figure 4 the typical current- voltage characteristics is shown for a Schottky, PiN and
JBS diode. In comparison with a SiC PiN diode, the Schottky or JBS diode are
attractive only as long as the unipolar on-resistance gives a lower voltage drop than that
of the PiN diode. The “cross-over” point depends on blocking voltage, but also on
operating current density and operating temperature. This is under the assumption that
the transient losses are the same for the Schottky, JBS and PiN diode.
JF (A/cm2)
JF (A/cm2)
Si PiN
PiN
Increasing
frequency
Ron,PiN= f(VB,J,)
Schottttkkyy
Ron,Sch=Rdrift
JBS
R on,JBS=R drift,JBS + R grid
VF (V)
VF (V)
0.8V
B 2.8V
Figure 4 (Left) Schematic comparison of forward characteristics for a PiN, Schottky
and JBS rectifier in SiC. (Right) Si PiN diode with strong dependence on forward
voltage with switching frequency.
3.2.1 Unipolar drift region resistance
The unipolar drift region resistance (diode on-resistance if contact and substrate
resistances are neglected) is determined by the epi layer thickness (tepi), doping
concentration (Nd ) and electron mobility (mn ) according to Equation 1 [9]:
Ron, sp 
tepi
qmnNd
[cm2]
(1)
where q is the electron charge. In an ideal no n punch-through structure the depletion
width W is equal to the epi layer thickness at voltage breakdown (see Figure 5). Then
the reverse bias voltage VB is given by:
10
Junction Barrier Schottky Rectifiers in Silicon Carbide
VB  qN dW
2e s
2
[V]
(2)
Electric field
Ec
Schottky
metal
n-
n+
Distance
tepi= W
Figure 5 Electric field distribution for a metal-semiconductor junction where the
depletion width is equal to epi thickness at breakdown voltage. (Equivalent for PiN and
JBS diodes where the Schottky metal is replaced by a p+ layer.)
The depletion width W at breakdown voltage can be expressed in terms of the critical
electric field at the junction and the doping:
W 
e s Ec
qNd
[cm]
(3)
2VB
Ec
[cm]
(4)
or
W 
The critical electric field Ec has a doping dependence according to equation 5, which is
experimentally determined by Konstantinov et al. [10]:
Ec 
2.49 106
1
N d 

1  log 10  16
4
 10 
[V/cm]
(5)
Combining (3) and (4) gives the maximum blocking voltage for a given drift region
doping:
11
Fanny Dahlquist
VB 
e s Ec2
2qN d
[V]
(6)
The drift region resistance in Equation 1 can now be rewritten by Equations 3 and 6 to
an expression in terms of the designed blocking voltage and critical electric field,
usually called the specific on-resistance Ron,sp (when tepi=W):
Ron,sp 
4V B2
[cm2]
3
n c
e sm E
(7)
Equation 7 is often used as a figure of merit for unipolar power devices since it gives
the differential on-resistance for a designed blocking voltage. The
on-resistance
increases quadratically with blocking voltage and is the reason why unipolar devices
have non-attractive on-state losses for higher voltages compared to bipolar devices. The
electron mobility mn has a doping dependence that also has to be taken into account
when calculating the on-resistance [11]:
mn 
947

 Nd
1 

 1.94 1017 
0.61
[cm2/Vs]
(8)
In Figure 6 Equation 7 is plotted for Si and 4H-SiC showing the usefulness of unipolar
devices in SiC compared to Si. For Si a critical electric field of 0.25 MV/cm is used and
for calculating on-resistance the doping and electron mobility are assumed to be
constants. For SiC a critical electric field of 2.0 MV/cm is used (dashed line) which
corresponds to a constant doping of 1e15 cm-3. The solid line is the optimized (lowest)
on-resistance where the doping dependence in the critical electric field (equation 5) is
taken into account. Equation 5 together with Equation 6 are used to maximize the
doping concentration for each blocking voltage.
12
Junction Barrier Schottky Rectifiers in Silicon Carbide
Figure 6 Comparison of specific on-resistance as function of blocking voltage for Si and
4H-SiC. For Si a critical electric field of 0.25 MV/cm is used (ideal value, above
current state-of-the-art for high voltage Si power components). For SiC a critical field
of 2.0 MV/cm is used (dashed line). The optimized on-resistance (solid line) is when the
maximum doping is used for each blocking voltage. T= 30 C.
Temperature dependence
In unipolar devices the on-resistance increases with temperature due to a decrease in
mobility with increasing temperature, nT-2.15 [11], see Equation 9. In comparison with
bipolar PiN diodes this dependence is a disadvantage with respect to losses since PiN
diodes show a negative temperature coefficient. But for paralleling of devices a positive
temperature coefficient is advantageous for obtaining uniform current distribution.
However, in a trade-off comparison between unipolar (Schottky or JBS diodes) and PiN
diodes is it important to take the different temperature dependencies into account, i.e.,
make the power loss comparison at the temperature at which the diodes will be operated
in the application.
13
Fanny Dahlquist
2.15
 T 
mn 


0.61 
 300 

 Nd
1 

 1.94 1017 
947
[cm2/Vs]
(9)
Influence of electric field
The maximum electric field reached at the junction is also an important parameter
affecting on-state losses, Ron,sp 1/Ec3, as was shown in Equation 7. It has been reported
that it is realistic to reach 80% of the critical electric field strength because of
imperfections in the epi material, doping uniformity etc, [12]. However, if the device
could be designed for 100% critical field, the on-resistance (drift region resistance)
would be lowered to 51% of the 80%-field resistance according to Equation 10:
Ron,100% (0.8E c ) 3

0.51
Ron,80%
Ec3
(10)
From Figure 7 the gain by reaching the theoretical critical electric field is clear. The onresistance at 125 C and theoretical field is almost the same as for 30 C and 80%-field.
In order to reach the corresponding breakdown voltage to the theoretical field strength, a
proper junctio n termination such as floating field rings, JTE etc [9] is also needed to
extend the surface field over a sufficiently wide distance.
14
Junction Barrier Schottky Rectifiers in Silicon Carbide
Figure 7 Specific on-resistance versus blocking voltage for T=30 C and T=125 C for
80% and 100% reached critical electric fields Ec. The 100%Ec resistance at 125 C is
close to the 80%Ec resistance at 30 C.
15
Fanny Dahlquist
4.Forward and reverse characteristics of Schottky and JBS
diodes
In this chapter an analytic model for the total forward drop over a Schottky and JBS
diode is discussed and compared. The reverse leakage current mechanisms are also
discussed and the most important parameters affecting the trade-off between forward
voltage and blocking voltages are identified and summarized.
1. Forward conduction characteristics
1.
Forward voltage drop in a Schottky diode
Forward conduction characteristics in experimental SiC Schottky diodes (n-type) [13,
14] have agreed well with the thermionic emission theory, which is also the dominating
current transport mechanism in Si Schottky diodes [15]. The forward voltage drop is a
function of temperature, Schottky barrier height and drift region resistance. Then the
forward voltage drop VF at a defined current density JF can be written as [15]:
VF 
h kT  JF 
ln
2   hf   RonJF ,
q
 A**T 
(11)
where k is Boltzmann’s constant, q is the electron charge, T is the temperature, h is the
ideality factor, B is the Schottky barrier height and JF is the forward current density at
VF. A** is the Richardson’s constant, theoretically calculated to be 146 A/cm2K2 for
SiC [13]. Ron is the drift region resistance and already presented in Equation 1.
4.1.2 Forward voltage drop in a JBS diode
During forward conduction in the JBS diode the current flows unipolar between the
anode and cathode in channels between the p+n junctions. Consequently, in normal
operation (100 A/cm2) the Schottky current dominates and the forward current analysis
can be based on thermionic emission theory for Schottky junctions.
For a JBS diode the relationship between the forward voltage drop and current density is
equal to that of a Schottky diode (Equation 11), except that the expression has to be
16
Junction Barrier Schottky Rectifiers in Silicon Carbide
modified to allow for the area taken up by the p+ regions in the structure, see Figure 8.
The current density across the Schottky barrier JFS will be modified to [9]:
JFS 
Atotal
JF
ASchottky
(12)
where JF is the total current density over the metal contact. For a striped (linear) p+ grid
design Equation 12 can be written in terms of the grid spacing s and grid width w:
JFS 
s w
JF
s  2d
(13)
The area relation between total contact area and Schottky area is:
Atotal 
sw
ASchottky
s  2d
(14)
where w is the width of the p+ regions and s is the spacing in between, i.e., the Schottky
area region. d is the junction depletion width from the p+ regions, according to
Equation 15, due to the built- in voltage Vbi and has to be considered for forward
voltages up to 2.8V (Vbi at RT). The voltage drop Vch in Equation 15 is the potential at
the bottom of the channel (p+ grid junction depth). If the Schottky barrier adds 1V to Vch
and the grid resistance adds 0.05V (Rgrid is typically 0.5 mcm2), then Vch equals
1.05 V. A typical doping Nd=3e15 cm-3 then gives a depletion width of d=0.8 m.
d
2e s
(V V ch )
qNd bi
(15)
17
Fanny Dahlquist
BB

Anode
Schottky metal
w
s
p+
Rgrid
Rdrift,JBS
w
n-
s
d
Current spreading
due to p++ grid
p+
d
n+
Cathode
Figure 8 (Left) Part of JBS grid showing the main contributions to the total forward
voltage drop over the diode. (Right) Upper part of JBS grid showing depletion regions
and current spreading due to the p+ regions.
If a 45 degree current spreading is assumed below the channels the JBS drift resistance
Rdrift,JBS can be written as in Equation 16 (with homogenous current conduction
assumed). The electron mobility parallel to c-axis is 20% higher than the mobility
perpendicular to c-axis [11]. A 45current spreading, by assuming isotropic mobility is,
however, considered a sufficiently good estimation for the analytical calculations.
Rdrift, JBS 
(tepi  xj  w/ 2)
qmnNd
(16)
where t epi is the total epi thickness and xj is the p+ grid depth. Resistive contribution
Rgrid from the channels and current spreading is given by Equation 17:
 xj  w / 2  s  w   s  w 

Rgrid  
 ln

 qmnND  s  2d   s  2d 
(17)
The total JBS on-resistance is the sum of Rgrid and Rdrift,JBS :
(18)
Ron, JBS  Rgrid  Rdrift, JBS
Now the forward voltage drop of a JBS diode can be written by modifying Equation 11
with Equations 13 and 18:
18
Junction Barrier Schottky Rectifiers in Silicon Carbide
VF , JBS 
h kT  (s  w)
JF   nf   Ron, JBSJF
ln 
2
q
 (s  2d ) A**T 
(19)
Equation 19 can be used to calculate the forward voltage drop for a JBS diode at a
defined current density.
2. Reverse blocking characteristics
1.
Leakage current mechanisms in a Schottky diode
The basic reverse current leakage mechanism in Schottky rectifiers is thermionic
emission, which depends on the Schottky barrier height, temperature and applied bias.
Thermionic emission means that electrons are thermally excited over the Schottky
barrier. The relationship between the thermionic emission reverse leakage current
density and Schottky barrier height is [15]:
JR  A **T 2e ( f B / kT ) e( qV / nkT ) 1
(20)
The thermionic reverse leakage current is also affected by image- force barrier height
lowering, which means that the effective Schottky barrier height is decreased by an
amount that depends on the electric field:
f B 
qE
4pes
(21)
where Df B is the image- force barrier height lowering and E is the electric field at the
metal-semiconductor interface. To account for the barrier lowering in the leakage
current, Equation 20 can for large negative voltages V be rewritten to:
JR  A **T 2 e ( f B / kT )e ( f B / kT )
(22)
The strong dependence of leakage current on barrier height, temperature and electric
field is the reason why Si Schottky diodes are not practically used above 150 V. In
Table 4 typical Schottky barrier heights to n-type Si, GaAs and SiC are shown. In
19
Fanny Dahlquist
silicon relatively low barrier heights are formed; consequently there is a substantial
increase in leakage current with increasing temperature.
at 300 K
Si
Eg (eV)
Ec (MV/cm)
B (eV)
1.12
0.25
0.5-0.7
GaAs 4H SiC 6H SiC
1.43
0.3
0.8
3.26
3.03
2.4
2.2
0.8-1.7 0.6-1.5
Table 4 Comparison of energy bandgap, critical electric field (relevant values) and
typical n-type Schottky barrier heights in different semiconductors [9,14-16].
A second leakage mechanism that also has to be taken into account is caused by
generation in the depletion region. Corresponding leakage current JG can be written:
JG 
qniW
2t r
(23)
where ni is the intrinsic carrier concentration, W is the depletion width and t r is the
carrier lifetime within the depletion region.
4.2.2 Leakage current in a SiC Schottky diode
The Schottky barrier height to SiC is usually about two times higher (Table 4) than for
Si and the leakage currents are relatively low also at elevated temperatures. However,
the leakage current has been found experimentally to be larger than predicted by
thermionic emission theory. The increase is also larger with increasing field than what
can be explained by image- force barrier lowering. It has been shown that the larger
electric fields used in SiC substantially increase thermionic field emission and field
emission [17], which are negligible leakage mechanisms in silicon. Both thermionic
field emission and field emission are tunneling mechanisms that depend on barrier
height, and thermionic field emission also on temperature. The consequence is high
leakage currents at electric field values lower than the theoretical electric breakdown
field strength, especially for higher temperatures. The reported dependence between
tunneling current density Jtunnel and electric field and Schottky barrier height is
expressed according to Equation 24 [17]:
20
Junction Barrier Schottky Rectifiers in Silicon Carbide
/
2 ( 8p 2 m*f 3/ 2 3hqE )
Jtunnel  E e
(24)
where m* is the electron effective mass, and h is Planck’s constant. Since the electric
field E at the Schottky contact increases with the square of the applied voltage V
according to Equation 25 (from Equation 6) the tunneling leakage current is directly
proportional to the applied reverse voltage.
E
2qNdV
es
(25)
Leakage current caused by generation in the depletion region, see Equation 23, is low in
SiC since the intrinsic carrier concentration is very small (ni =5.27e-8 cm-3 at RT in SiC
compared to ni =1.5e10 cm-3 in Si at RT).
In conclusion, SiC Schottky diodes show low thermionic leakage currents because of
higher Schottky barrier heights while the high electric fields enhance the tunneling
leakage current, which limits the blocking voltage. Schottky diodes with blocking
capability up to 4.9 kV have been reported [18,19]. However, a high Schottky barrier is
used (1.5 eV) and the drift region doping is extremely low (<1014 cm-3) which allow
the electric field to be designed to only about 60% of the theoretical value.
Consequently, the high blocking voltage is demonstrated but the forward voltage drop is
much too high for normal device application (>6V at 100A/cm2). Since the reverse
characteristics depends strongly on temperature the maximum blocking voltage is also
defined by the operating temperature. Schottky diodes with reasonable forward
characteristics and blocking voltages up to 2000 V at elevated temperatures have been
reported [20] and also shown in this thesis in Paper III.
4.2.3 Leakage current in a SiC JBS diode
The important feature of the JBS diode is that the depletion regions from the
p+n junctions pinch off the channel and the electric field is reduced at the metal-SiC
junction. The electric field E at the Schottky contact depends on the channel pinch-off
voltage Vp and the doping Nd :
E
2qNd
(V p Vbi )
es
(26)
21
Fanny Dahlquist
where Vbi is the junction built- in voltage. The pinch-off voltage is determined by the
Schottky spacing s between the p+ regions since that gives the voltage at which channel
pinch-off occurs:
VP 
qNd 2
s  Vbi
8es
(27)
In Figure 9 the pinch-off voltage VP is plotted versus Schottky spacing s (channel
width).
Figure 9 Calculated pinch-off voltage showing the quadratic dependence on Schottky
spacing s.
How much the electric field is reduced depends not only on the Schottky spacing but
also on the doping concentration in the channel, the doping profile shape and depth of
the p+ regions.
22
Junction Barrier Schottky Rectifiers in Silicon Carbide
4.3 Summary of leakage current mechanisms
The reverse leakage current mechanisms that should be considered in a JBS or Scho ttky
diode are summarized below.
Thermionic emission leakage current density
From Equation 20 (as the exponential term in brackets becomes negligible for high
reverse voltages):
2 (f B / kT )
JR  f (f B ,T )  A **T e
Js
(28)
For Schottky barrier heights higher than 1.0 eV and temperatures below 125 C this
contribution gives negligible current densities.
Schottky barrier lowering
From Equation 21:
(29)
JR  Js  e  f B / kT
In Figure 10 the leakage current contributions from Equations 28 and 29 are plotted
versus typical Schottky barriers in SiC.
23
Leakage current density (A/cm2)
Fanny Dahlquist
1e+00
1e-01
1e-02
1e-03
1e-04
1e-05
1e-06
1e-07
1e-08
1e-09
1e-10
1e-11
1e-12
1e-13
1e-14
1e-15
1e-16
1e-17
with barrier lowering at 2.0 MV/cm
with barrier lowering at 0.5 MV/cm
Jr from Equation 28
125 °C
30 °C
0,8
0,9
1
1,1
1,2
1,3
1,4
Schottky barrier height (eV)
Figure 10 Calculated Schottky leakage current density from thermionic emission theory
(solid lines) and with Schottky barrier lowering (dotted lines) at electric fields of
0.5 MV/cm and 2.0 MV/cm.
Generation in depletion region
Neglected in SiC due to the low intrinsic carrier concentration as mentioned in 4.2.2.
Tunneling leakage current density
From Equation 24:
2 (8p
J tunnel  f (E,f B )  E e
/
2 m*f B 3/ 2 3hqE )
(30)
The tunneling leakage current is a strong function of the electric field at the Schottky
contact and consequently also of the doping concentration in the drift layer
(Equation 5).
By using a JBS structure both the Schottky barrier lowering and tunneling current
contributions to the leakage current are decreased due to the electric field reduction at
the Schottky contact. As seen in Figure 10 the leakage current from the Schottky barrier
lowering is not severe, the leakage currents are still very low even at 125 C, at least for
barrier heights higher than 1 eV. Thus the electric field dependent tunneling current is
the leakage current mechanism that should be suppressed by use of the JBS grid.
24
Junction Barrier Schottky Rectifiers in Silicon Carbide
4. Other variants on JBS structures
In order to improve the forward voltage versus leakage current trade-off other variants
on the same theme as the JBS structure have been suggested and experimentally verified
in the literature.
1.
Dual Metal Trench (DMT) diode
In the dual metal trench (DMT) diode (Figure 11) the p+ n junctio ns in the JBS structure
are replaced by trenches. At the bottom of each trench a relatively high Schottky barrier
metal are formed. At the top of the mesa a lower barrier Schottky metal is deposited for
current conduction during forward bias. The DMT forward characteristics is then
dominated by the lower barrier regions and reverse characteristics is dominated by the
higher barrier regions giving lower leakage currents than for a Schottky diode with only
the lower barrier. Reported is a combination of titanium (0.84 eV) and nickel (1.51 eV)
[21,22]. This diode concept is a pure Schottky barrier structure and therefore it will be
sensitive to high electric fields (giving tunneling currents) as described in section 4.2.2.
The fabrication of this diode is often claimed to be simple since no p-type ion
implantation is required. On the other hand, a stable process for forming a uniform and
reproducible Schottky contact with low leakage currents on dry etched surfaces has to
be developed on both vertical and lateral trench walls.
Ni Schottky
contact
Anode
Ti Schottky
contact
N- epi
N+ substrate
Cathode
Figure 11 Schematic structure of a Ti/Ni DMT diode.
25
Fanny Dahlquist
4.4.2 Trench MOS Barrier Schottky (TMBS) diode
By replacing the JBS grid by a UMOS trench like grid, a trench MOS barrier Schottky
(TMBS) structure is formed (Figure 12). Reported fabrication of this device is a
polysilicon planarized Ni-TMBS in 4H-SiC [23].
Schottky
contact
Anode
N- epi
SiO2
N+ substrate
Cathode
Figure 12 Schematic structure of a TMBS diode.
26
Junction Barrier Schottky Rectifiers in Silicon Carbide
5. Device design for 600-3300 V diodes
For Schottky and JBS diodes the switching power losses are very low and therefore the
design strategy is to minimize the static losses for a rated blocking voltage. As was
presented in Chapter 4 the static on-state losses are split between forward voltage drop
over the Schottky junction plus the on-resistance of the diode. The most important
design parameters are consequently the drift resistance (epitaxial doping, thickness),
Schottky contact properties (barrier height, current ideality), and for the JBS diode also
the p+ grid dimensions. How these parameters change with temperature has to be
considered.
In the following sections the analytical expressions in previous chapter are used to
calculate the total forward voltage drop for JBS and Schottky diodes at a current density
of 100 A/cm2. It is important to optimize the forward voltages for rated blocking
voltages that should be possible to reach experimentally, i.e., the parameter values for
the Schottky barrier height and epitaxial design have to generate realistic junction
electric field values at the blocking voltage, which will be discussed. Furthermore,
Schottky barrier heights, geometries and dimensions for the p+ grid must be possible to
realize with state-of-the-art process technology.
This chapter covers the device design work that was carried out for the JBS and
Schottky diodes in Paper VI and Paper VII and is a continuation from the experiments
in Paper I-IV. In section 5.1 the optimization of drift resistance for a given blocking
voltage is presented. In section 5.2 ideal and state-of-the-art forward voltages are
defined and calculated for 600/1200/1700/2500 and 3300 V blocking voltages.
1. Minimized drift resistance by punch-through epitaxial design
In the presentation of unipolar drift resistance in section 3.2.1 only a non punch-through
design was considered. However, there are advantages by using a so-called punchthrough design (or “field stop” design) where the drift region is designed so that the
depletion region reaches the highly doped substrate before junction breakdown occurs,
see Figure 13.
27
Fanny Dahlquist
Electric field
Ec
VB ,pt =(E c + sEc)  tepi /2)
sEc
VB ,npt =(E c tepi /2)
Schottky
metal
n-
n+
Distance
tepi > = W if npt
tepi < W if pt
Figure 13 Definition of punch-through and non punch-through design for a Schottky
diode (equivalent for PiN and JBS diodes where the Schottky metal is replaced by a p+
layer). The epitaxial layer doping is not equal for the punch-through and non punchthrough case.
The punch-through factor spt is defined as the ratio between the electric field at the
substrate and at the junction.
s pt 
Ec,n / n 
Ec,Sch / n
if W > t epi
(31)
where W is the non punch-through depletion width according to Equation 3. A
generalized factor s_pt in Equation 32 also defines the ratio of the excess epitaxial layer
thickness for non punch-through designs. Increasingly negative number indicates more
zero electric field in the epitaxial layer.
s pt 
W
1
t epi
if W <= tepi
(32)
For a non punch-through design the voltage supported by the drift region is given by:
VB,npt 
Ec tepi
(33)
2
For a punch-through design the blocking voltage is:
28
Junction Barrier Schottky Rectifiers in Silicon Carbide
VB , pt 
( Ec  s pt Ec ) tepi
(34)
2
The advantage by using a punch-through (PT) design is that the drift region thickness
can be made thinner than for the non-punch-through (NPT) case for the same
breakdown voltage. Consequently, an improvement in the drift region resistance is
obtained if epitaxial layer (epi) thickness and doping are optimized. The second
advantage is that the doping can also be made lower for the same drift region resistance
as for a NPT design. Thus the breakdown voltage is less dependent on the doping
compared to the NPT case. Usually a PT structure is designed with both thinner epi
thickness and lower doping. The drift region resistance for a specified blocking voltage
can be minimized by PT design as will be shown in the next section.
5.1.2 Optimization of drift resistance
Non punch-through (NPT) design:
The non punch-through on-resistance in the drift region is determined by:
Ron, sp 
4Vnpt 2
(35)
e s mnEc 3
Punch-through (PT) design:
For a punch-through design Equation 33 can be rewritten to:
Vpt 
(Ec  (s pt Ec)  tepi
(36)
2
By combining the following equations and assuming Ec to be independent of Nd the
punch-through on-resistance is determined by Equation 40.
Vpt  s pt Ect epi 
t epi 
qNdt epi2
2e s
(if s > 0)
(37)
2Vpt
(38)
Ec (1 s pt )
29
Fanny Dahlquist
Nd 
e s Ec 2
(1  s pt 2 )
2qVpt
(39)
2
t
4V pt
1
Ron, pt  epi 
3
2
qmnNd e smnEc 1 s pt 1  s pt 


(40)
Minimizing this expression gives a minimum drift resistance for spt=1/3.
In conclusion, a “33% punch-through” design (spt=1/3) gives minimum on-resistance if
the appropriate epi doping and thickness combinations are used. This reduces the drift
resistance by 16% compared to the non punch-through case. In Figure 14 the onresistance is plotted versus punch-through factor to illustrate the minimum at
spt
equals 1/3.
For spt <0 the epi thickness is made thicker for the same blocking voltage, thus
increasing the on-resistance. For spt >0, the epi thickness is thinner and doping lower,
thus decreasing the on-resistance. However, for spt >1/3 the lowering of the doping
starts to dominate over the decrease in epi thickness and consequently the on-resistance
increases.
0.014
1.7
x 10
-3
2
R on, pt 
0.012
1
W b  4V p t
qmnNd e mn Ec 1 s 2 1 s 
3


1.69
2
Ro n, pt 
Specific on-resistance (Ohmcm2)
Specific on -resistance (Oh mcm 2)
1.68
0.01
0.008
0.006
0.004
3


1.67
1.66
1.65
1.64
1.63
1.62
Nd = 7e15 cm -3
0.002
4Vpt
1
Wb

qmn Nd emnE c 1  s 2 1  s 
Nd = 7e15 cm-3
1.61
Nd =1e16 cm-3
0
-0. 6
-0.4
-0.2
0
s
0.2
0.4
1.6
0.2
0.6
0.22
0.24
0.26
0.28
0.3
0.32
0.34
0.36
0.38
0.4
s
Figure 14 (Left) On-resistance versus punch-through factor
spt for two doping concentrations. Each
doping corresponds to a constant blocking voltage for all s. (Right) On-resistance versus punch-through
factor showing optimized “33% punch-through” epi design.
For unipolar epi design a chart (in Figure 15) can be created where the epi doping and
thickness can be determined for a design blocking voltage with punch-through factor
30
Junction Barrier Schottky Rectifiers in Silicon Carbide
and on-resistance. In Figure 16 the same chart is created for 80% reached critical
electric field for the same epi doping and thickness combinations. The corresponding
blocking voltage range then changes from 2000 V-10 kV to 1500 V-6500 V. Figure 17
contains the epi design for a lower voltage range, 200-2100 V, where 80% of the critical
electric field is used.
For creating these charts the procedure outlined below is carried out:
1. Critical electric field Ec should not be exceeded for a doping Nd
2. Determine punch-through factor spt (red lines)
3. Sufficient epi thickness to reach blocking voltage VB (solid and dashed black lines)
4. The on-resistance (grey lines) is then calculated for each VB and spt
80
0,05
0
75 ,048
500
70
Epi thickness [um]
0,014
2500
0,006
60
55
,036
0,034
50
0,032
3500
6500
0,012
0,024
0,3
0,022
00
NPT
-0,3
0
0,018
4500
0,02
-0,6
0,016
0,03
0,028
0,01
0,014
0,008
0,006
5500
6500
0,004
0,012
0,024
35 022
5500
0,018
30
,02
25
500 0,014
20
3500
15
Ron, sp at 300K
0,01
0,008
0,026
0,04
500
80,038
40 026
Punch-through factor s
0,016
0,028
,044
Blocking voltage
-0,6
5500 0,02
046
65 ,042
45
-0,3
0,032
75000,03
2500
0,3
0,6
PT
0,016
0,004
0,3
30,6
500
0,006
-0,6
0,006
0,01
2500
0,008
-0,3
0,01 4500
0,008
0,012
0 3500
0,002
0
-0,3
2500
2500
0,004
0,60,002
10
1e+15
0,3
1e+16
Epi doping, Nd [cm-3]
Figure 15 On-resistance in Wcm2 (grey lines) for 2000 V-10 kV blocking voltages (solid
and dashed black lines) and punch-through factors (red) for theoretical electric field
strength.
31
Fanny Dahlquist
80
0,05
0
75 ,048
-0,3
0,032
0,03
70
046
00
Epi thickness [um]
65 ,042
60
55
,036
0,0340,3
0,022
50
0,032
0
0,02
0,014
0,006
0,012
0,024
5500
NPT
-0,3
0,018
-0,6
0,016
0,03
0,028
0,01
0,014
0,008
0,006
2500
35 022
0,3
0,018
,02
PT
305,00106
0,012
3500
-0,3
0
0,006
0,004
0,6
0,002
0,3
2500
2500
-0,6
0,01
0,008
0,014
20
1500 0,004
0,012
0,024
15
0,008
4500
4500
25
Ron,sp at 300K
3500
40 026
30
1500
0,01
2500
0,026
0,04
0,038
45
Punch-through factor s
0,016
0,028
,044
Blocking voltage
-0,6
0,02
0
-0,3
0,01
0,008
10
1e+15
0,006
0,004
0,6
0,002
15000,3
1e+16
Epi doping, Nd [cm-3]
Figure 16 On-resistance in Wcm2 for 1500 V-6500 V blocking voltages if 80% of the
critical electric field is used for the epitaxial design.
000
0
666
333 180
0.30.30.3
600600
180018001800
Blocking voltage --0.60.6
80 00.3
0.60.60.6
555 600600600
---0.
30.30.3
0.6 Blockingvoltage
--0.60.60.6
-0.3
5
400400400
Punch-through factor s
2
8
.
5
2000
000
400400 2
5.5
8.5
8.5
8.5
Ron, sp at 300K
2000
2000
2000
5.5
5.5
5.5
Punch-through factor s
8
4.5
Ron, sp at 300K
1800
804.54.54.5
888
12
7.5
800
0
4
1.5
1200
0.5
180018001800 1600
20
7.57.57.5
7
60
800800800
444
1.51.51.5 120012001200
1600
1
60
0.50.50.5
3.5
1600
777
16001600
10 6.5
1400
40
6.5600
3.53.53.5
1000
00
1
14
00
140
40
140014001400
0.6
6
.5
100010001000
2.5
3
0.3 11
-0.6
0.6
0
5
5.5
-0.3
400
0
2
8 1400
1200
200
20
600
0
0.60.60.6
56660.9
4.5
333 2.52.52.5
0.30.30.3
--000
0.60.60.6
1000
00
1000
00
---0.30.30.3
1.5
4
0.5
222
6 .5
800
0
400400400
3.5
3 200
120012001200
600600600
800
00.90.90.9
800
00
5 4.5
4.5
3 4.5
0.6
0
0.3
100010001000
4 2.5600
100010001000 1.51.51.5
0.50.50.5600
2 444 0
0
0.9
600
0
2
800800800
0.5
400
0
4.500
1.5
0800800800
400
00800800800
400
0
2 333 1
0.6
0.60.60.6
000
0.30.30.3
0.9
200
.5600600600
0
0 600600600
200
0 600600600
0.90.90.9 200
200
0
0.5
222
0.9
0.50.50.5
400400
0 4004004001.51.51.5
400
400400400
400400400
0.60.60.6
1e+15
1e+16
11
0.90.90.9
200200200
200200200
200200200
200200200
0.50.50.5
EpiEpiEpi
Epi doping, Nd [cm-3]
0.90.90.9
14
Epi thickness [m]
m]
m]
m]

[[
thi
ck
ne
sst
hi
ck
NPT
NPTNPT
PT
PTPT
dopingdopingdoping,,NdNdNd
ne
Figure 17 On-resistance in mWcm2[cm[
for
V blocking voltages if 80% of the
cm[200
cm--333V-2100
]]
ss
t
critical
electric field is used for the epitaxial design.
hi
ck
ne
ss
E
32
Junction Barrier Schottky Rectifiers in Silicon Carbide
2. Ideal and state-of-the-art parameters and forward voltage calculations
In this section parameter values are generated for ideal (theoretical) and state-of-the-art
(realistical) Schottky and JBS diodes. Corresponding forward voltage drops at
100 A/cm2 are then calculated for 600/1200/1700/2500 and 3300 V blocking voltages.
These are voltage classes relevant for device applications.
1.
Ideal conditions
In Table 5 ideal parameter values are listed. The epi doping and thickness are for each
blocking voltage the values corresponding to the theoretical electric field and 33%
punch-trough of the electric field at breakdown, i.e., according to Figure 15. When the
drift resistance is minimized for a given blocking voltage the next parameters to
optimize are the Schottky barrier metal and p+ grid dimensions.
Schottky contact properties
For analytical calculations of the forward voltage drop over the Schottky contact the
barrier height and ideality factor are the necessary parameters. Ideal values are assumed
to be 1.0 eV for the barrier height and an ideality factor of 1.0. These values could be
reached with titanium as Schottky metal according to the literature [16]. A 1.0 eV
barrier height is on the aggressive side practically for a pure Schottky diode, since such
low barrier in combination with the high theoretical electric fields will generate
tunneling reverse leakage currents. For the JBS diode, on the other hand, the idea is to
use a lower barrier than for a Schottky diode for the best trade-off between forward
voltage and leakage current.
P+ grid
For the p+ grid a striped (linear) geometry with a p+ stripe width of 3 m and a Schottky
spacing of 3 m. This corresponds to a 50% relative Schottky area of the total anode
area. Optimization of exact p+ grid dimensions and geometry could, however, be more
developed, with potentially sub micron p+ width in order to increase the forward
conducting Schottky area for the same Schottky spacing and thus decreasing the p+ grid
resistance. Here, the same Schottky spacing are used for all different doping
concentrations (blocking voltages), however, a doping dependent spacing could also be
33
Fanny Dahlquist
considered since the depletion width from the p+ grid depends on the doping according
to Equation 15.
Substrate and contact resistances
Only the drift resistance contribution to the total on-resistance has been considered so
far but there are always resistive contributions from the substrate and from the cathode
(backside) contact. The ideal resistive contribution from substrate and backside contacts
is assumed to be 0.05 mcm2 that corresponds to a voltage drop of 5 mV at 100 A/cm2.
This value is based on a 125 m thick substrate doped to 5e19 cm-3, and a contact
resistance in the 10-6 cm2 range.
The calculated on-state parameters are listed in Table 6 and plotted in Figure 18.
Table 5 Ideal parameter values for forward voltage drop calculations. T=30 C.
Ideal design
600V
1200V
1700V
2500V
3300V
parameters
Nd [cm-3] /
3.2e16
1.3e16
8.3e15
5.3e15
3.8e15
tepi [m]
3
6.7
10
16.5
22
100% Ec
2.8
2.6
2.4
2.3
2.3
 B [eV]
1.0
1.0
1.0
1.0
1.0
Ideality factor 
1.0
1.0
1.0
1.0
1.0
p+ width
3
3
3
3
3
p+ spacing s
3
3
3
3
3
[m]
RSubstr.+Cont.
0.05
0.05
0.05
0.05
0.05
[MV/cm]
w [m]
2
[mcm ]
34
Junction Barrier Schottky Rectifiers in Silicon Carbide
Table 6 Ideal JBS (and Schottky) on-state calculations based
on Table 5 input
parameters. T=30 C.
Ideal
on-state
600V
1200V
1700V
2500V
3300V
Rdrift [mcm2]
0.08
0.4
0.9
2.3
4.2
VF,Sch at
0.71
0.74
0.79
0.93
1.12
Ron,JBS [mcm2] 0.11
0.48
1.0
2.5
4.5
Rgrid [mcm2]
0.09
0.20
0.32
0.5
0.75
Rgrid/ Ron,JBS
82%
42%
32%
20%
17%
VF,JBS at
0.73
0.78
0.83
0.98
1.19
parameters
100A/cm2 [V]
100A/cm
2
[V]
5.2.2 State-of-the-art - realistic conditions
State-of-the-art conditions (Table 7) mean that the ideal parameters in Table 5 are given
realistic values that are in accordance with state-of-the-art process technology. The
changes from ideal conditions are:

Maximum electric field is lowered to 80% of the theoretical value (charts in
Figure 16 and Figure 17), which is in good agreement with experimental data in
PaperIII and reports in literature on screw dislocation limitations [12].

Schottky barrier height and Schottky current ideality parameters are increased to
values that can be reached with state-of-art technology.

Substrate plus contact resistances are calculated from a 300 m thick substrate
doped to 8e18 cm-3, and a backside contact resistance in the 10-4 cm2 range.
The state-of-the art on-state parameters are listed in Table 8.
35
Fanny Dahlquist
Table 7 State-of-the-art parameter values; changes compared to ideal values in Table 5
are listed. T=30 C.
State-of-the -art
600V
1200V
1700V
2500V
3300V
parameters
Nd [cm-3] /
2.0e16
7.5 e15
4.5e15
3.0e15
2.0e15
tepi [m]
4.5
9.0
13.8
22.0
28.0
80% Ec[MV/cm]
2.2
1.9
1.8
1.8
1.7
 B [eV]
1.3
1.3
1.3
1.3
1.3
Ideality factor 
1.1
1.1
1.1
1.1
1.1
RSubstr.+Cont.[mcm2]
1
1
1
1
1
Table 8 State-of-the-art JBS (and Schottky) on-state values calculated with parameters
in Table 7. T=30 C.
State-of-the art
parameters
600V
1200V
1700V
2500V
3300V
Rdrift [mcm2]
0.2
0.9
2.2
5.2
9.8
VF,Sch [V]
1.21
1.28
1.41
1.70
2.19
Ron,JBS
0.2
1.0
2.5
5.7
10.6
Rgrid [mcm2]
0.13
0.35
0.60
0.94
1.5
Rgrid/ Ron,JBS
VF,JBS [V]
65%
1.24
35%
1.33
24%
1.48
16%
1.80
14%
2.30
Increase from
+70%
+71%
+78%
+80%
+93%
2
[mcm ]
ideal VF,JBS
36
Junction Barrier Schottky Rectifiers in Silicon Carbide
Figure 18 Comparison of forward voltage drops for ideal and state-of-the-art JBS and
Schottky diodes. T=30 C.
In Figure 18 the ideal and state-of-the-art forward voltage drops from Table 6 and
Table 8 are shown. For 600/1200 V blocking voltages, the higher voltage drop over the
Schottky contact dominates the on-state increase. For higher blocking voltages it is
instead the increased drift resistance that dominates the difference between ideal and
state-of-the-art forward voltages, due to the decrease in reached electric field that lowers
the epi doping. Furthermore, since the epi doping is lower for the 80% electric field, the
grid resistance increases. But, the drift region resistance increase is, as seen in Table 8
dominating over the increase in grid resistance, which makes that effect negligible.
5.2.3 Influence of Schottky contact properties
To investigate how changed Schottky contact properties influence the forward drop in
detail, the electric field (i.e. epi design) needs to be constant in order not to dominate
over other parameter changes for higher blocking voltages. For “semi- ideal” conditions
all parameters are taken from Table 5 with theoretical electric field epi design changed
to 80% field values from Table 7.
37
Fanny Dahlquist
In Figure 19 an ideal JBS diode (ideal Schottky contact, theoretical electric field and
ideal contact resistance) is compared to JBS diodes with ideal/non- ideal Scho ttky
contact and 80% electric field. It is clear that for 600/1200 V classes it is more
important how ideal the Schottky contact is (i.e., low ideality factor and barrier height),
than if the highest critical electric field is reached. But for higher voltages the drift
resistance, as function of the designed electric field, is increasing according to
Equation 40, and hence more important than the Schottky contact.
Figure 19 Schottky contact properties versus reached electric field: influence on
forward voltage drop for different blocking voltages. T=30 C. For 600/1200 V classes
it is more important how ideal the Schottky barrier is, than if the highest critical electric
field is reached. For higher voltages the drift resistance for the designed electric field
dominates.
5.2.4 Temperature dependence
In Figure 20 the ideal and state-of-the art JBS on-state values from Figure 18 are
compared to the values at 125 C (398 K). The forward voltage drop is decreasing with
increasing temperatures for the lower voltages, i.e., the 600-1200 V diodes show a
negative temperature coefficient. The reason is that the drift resistance is so small that
the reduction in Schottky contact voltage drop with temperature is dominating over the
38
Junction Barrier Schottky Rectifiers in Silicon Carbide
decrease in electron mobility, which normally makes unipolar diodes showing a positive
temperature coefficient in forward voltage.
Figure 20 Temperature dependence of forward voltage- comparison between ideal and
state-of-the-art JBS diodes (temperature dependence of Schottky barrier height and
ideality factor are not taken into account). The lower voltage diodes show a negativ e
temperature coefficient.
From Figure 20 it can be seen that the inflexion point (the point where the temperature
coefficient changes from negative to positive, in this case between 30C and 125C)
depends on blocking voltage and degree of ideality of the device. But also the
temperature increase and current density determines the inflexion point as was
discussed in more detail in Paper VI.
5.2.5 Comparison of punch-through versus non punch-through epitaxial
design
In Figure 21 the comparison between optimized punch-through (PT) and non punchthrough (NPT) design is shown. The gain by using a 33% PT design is a 16% reduction
in drift resistance compared to the NPT case. But as can be seen in Figure 21 the
reduction in total forward voltage drop is significant only for higher voltages
(>2500 V). For lower voltages, the contribution from the Schottky barrier is dominating.
When the operating temperature is increased the difference becomes even less since the
39
Fanny Dahlquist
decrease in electron mobility (nT-2.15) dominates over the reduced epi thickness.
Important though, is that the main advantage with PT design is that the designed
blocking voltage gets a margin to the avalanche breakdown voltage since the doping is
lowered (see Figure 15). The lowering of drift resistance and, that at the same time a
margin to the breakdown voltage is obtained, strongly motivates the use of a
33% punch-through design.
Figure 21 Comparison of forward voltage drop for punch-through (“33% PT”) and non
punch-through (NPT) JBS diodes.
40
Junction Barrier Schottky Rectifiers in Silicon Carbide
Figure 22 Temperature dependence of forward voltage drop for punch-through (“33%
PT”) and non punch-through (NPT) JBS diodes.
5.2.6 Conclusions
For blocking voltages above 1700 V, the drift resistance dominates the on-state static
losses and consequently the junction critical electric field is the most important
parameter to optimize between 1700 V and 3300 V. Around 3000 V is the limit where
unipolar diodes loose their attractiveness compared to bipolar PiN diodes, particularly if
125 C operation is considered due to the unipolar positive temperature coefficient. For
600-1700 V, the Schottky contact properties dominate over the drift resistance, i.e., the
parameters affecting on-state losses are the Schottky barrier height and the current
ideality factor, which determine the voltage drop over the Schottky barrier. Therefore,
for 600-1700 V, it is more important to optimize the Schottky contact to as close to
ideal as possible, compared with the higher blocking voltages.
For 600-1200 V JBS, the resistive contribution from the p+ grid is typically 80% of the
total on-resistance, which makes optimization of p+ grid parameters more important
compared to 1700-3300 V where the grid resistance part is typically 20%. For the
higher blocking voltages there is consequently more design flexibility regarding
blocking properties without increasing the forward voltage too much.
41
Fanny Dahlquist
For paralleling and packaging of devices the forward temperature dependence is critical
with respect to uniform current sharing. The Schottky junction has a negative
dependence while the drift resistance shows a unipolar positive dependence. The current
density inflexion point where the coefficient changes from negative to positive is
decreasing with increasing drift resistance. For lower voltages, 600-1700 V, this
inflexion point can be at a current density below 100 A/cm2 for a temperature increase
of 95 C (from 30 C to 125 C). This is of importance when specifying operating
current density. Because of the p+ grid resistance JBS diodes show a positive
temperature coefficient at lower current densities compared to Schottky diodes.
42
Junction Barrier Schottky Rectifiers in Silicon Carbide
6. Fabrication process
Developing a JBS diode process is about combining Schottky contact technology with
PiN diode technology in a way that fulfils both design requirements and that the
fabrication is also possible to realize with a state-of-the-art process technology. In short,
a Schottky contact that yields good forward current conduction must be processed
together with a good blocking p+n junction. In this chapter the JBS diode process is
presented together with aspects of the process development that was carried out in this
thesis work. To start with, the most critical steps in the processing of JBS diodes are
identified and described.
1. Critical steps in JBS (and Schottky) diode process
1.
Epitaxial growth
The epitaxial (epi) doping concentration and thickness determine the exact breakdown
voltage and therefore are uniformity and control of these parameters important. An
increase in doping or a decrease in thickness from the designed values will affect the
reverse characteristics and breakdown voltage. On the other hand, a decrease in doping
or an increase in thickness will make the forward characteristics (on-resistance) worse
than expected (according to Equation 1). In Paper VII the influence of non-uniformities
in doping and thickness on device characteristics is discussed. An example of how
variations in doping and thickness over one wafer spread the expected breakdown
voltage and on-resistance in diodes is shown in Figure 23 and Figure 24. In this case the
doping concentration and thickness are measured before any processing starts on the
epilayer by low temperature photoluminescence [24] and by infrared interference
fringes [25], respectively. The doping can also be measured by capacitance-voltage (CV) measurements after processing on Schottky diodes. Important to note is, that for the
same breakdown voltage there can be several on-resistance data points because of
different combinations in epi doping and thickness. The calculated 1570 V breakdown
voltage is marked by a dotted line in Figure 24 and the corresponding doping and
thickness values are on the line in Figure 23. The spread in on-resistance for the same
theoretical breakdown voltage is larger for 125 C compared to room temperature due to
the more than quadratic dependence of on-resistance with temperature, Ron T2.15.
43
Fanny Dahlquist
Epi thickness (mm)
12,0
11,8
11,6
11,4
11,2
11,0
10,8
10,6
10,4
10,2
10,0
3,0e+15
3,5e+15
4,0e+15
4,5e+15
5,0e+15
5,5e+15
Epi doping (cm-3)
Specific On-Resistance (Wcm2)
Figure 23 An example of epi doping and thickness variations over one wafer that was
used for diodes in Paper VII. Each measured data point corresponds to one diode. The
dotted line corresponds to 1570 V breakdown voltage.
0,005
125 °C
30 °C
0,004
0,003
0,002
0,001
0
1470 1490 1510 1530 1550 1570 1590 1610 1630 1650 1670
Theoretical Breakdown Voltage (V)
Figure 24 Expected specific on-resistance for 30 C and 125 C (for the data points in
Figure 23) versus breakdown voltages if 80% of the theoretical critical electric field is
reached. (Figure is taken from Paper VII.)
44
Junction Barrier Schottky Rectifiers in Silicon Carbide
2.
Schottky contact formation
Combined Ohmic and Schottky metallization in the JBS diode
The optimal JBS metallization is a contact metal that forms a low Schottky barrier
contact to n-type SiC and good Ohmic contact to the p+ regions in the JBS grid. Then
the normal diode operation can be at a low forward voltage (less than 3 V) where only
the Schottky regions are conducting. But for high current densities and forward voltages
higher than 3 V when the total power in the diode is high the p+ regions could start to
inject current and thus the on-resistance gets conductivity modulated. However, the
problem is that Schottky barriers cannot withstand the high temperature anneals (at least
800 C) currently necessary for Ohmic contact formation to p-type SiC. Separate
deposition and temperature anneal or a two- metal scheme is a possible solution with the
disadvantage of complex processing (one more mask layer) and high demands on the
alignment process. A two-metal scheme solution is reported in Paper VI where current
injection through the p+ n junction is demonstrated. Others have also reported results on
this [26].
If the p+ grid in the JBS structure is designed only for blocking mode (to pinch off the
channels below the Schottky junction) the metal contact on top of the p+ regions does
not need to be a good Ohmic contact, which means a contact resistance lower than
10-4 cm2. The current conduction in the reverse direction is so small that a high
contact resistance is not a serious limitation.
Schottky contact issues
The Schottky barrier formation is a critical process step since a good Schottky contact
should meet the requirements below:

Sustainability of an electric field near the theoretical limit of the SiC material

Uniformity of the Schottky barrier height over the diode area and from diode to
diode over a wafer

Good ideality factor, as close to =1 as possible

Reproducibility in the contact formation

Long-term stability
45
Fanny Dahlquist
The advantages with a JBS structure is that the actual Schottky barrier height is less
critical for the electric field and temperature dependence on leakage current since the
leakage current is suppressed by the p+ grid. Therefore, as discussed in section 5.2, a
low Schottky barrier metal should be used for obtaining the best forward characteristics.
Titanium (Ti) is the metal that was used throughout all experiments due to its low
barrier height in combination with excellent adhesion properties. Variations in barrier
height, ideality factor and leakage currents have been observed in the experiments in
this work but the physical mechanisms were not investigated in detail. Reported is, that
the resulting electrical properties of a Schottky barrier are strongly sensitive to the
condition of the surface [16, 27-29]. The variations in surface conditions come from
device processing (surface preparation, surface treatment and metal deposition) but also
from crystal defects and imperfections in the SiC material.
Recently reported are non- uniformities of the Schottky barrier height between diodes
and over one diode for titanium, nickel and platinum Schottky contacts [27,30]. The
consequence is that the forward characteristics of the diode become anomalous with a
high ideality factor and excess leakage currents. Suggested is that the non-uniformities
result from localized lower barrier height areas within one diode and that these areas are
related to discrete crystal defects [27]. Alternative explanations involving generationrecombination current, interfacial layers and effects related to periphery are ruled out.
Another study on titanium Schottky contacts correlates the lower barrier height areas to
epitaxial growth pits [29].
In conclusion, defects in state-of-the-art SiC material cause non-uniformities in
Schottky barrier formation. The JBS diode concept could make the reverse
characteristics less sensitive to these variations in Schottky barrier heights due to the
JBS grid.
6.1.3 Ion implantation of JBS p + grid
For the ion implantation of the JBS p+ grid one critical issue is to create a low leakage
junction at blocking voltage. Another is that there has to be good control on how the
drawn grid dimensions in the mask layout agree with dimensions after processing
(lithography and ion implantation).
Boron (B) is the preferred p-type dopant for low leakage p+n junctions [31]. because of
low ion implantation damage and vertical diffusion into the material at the elevated
temperatures used for the activa tion anneal, at 1700 C. Then the electrical junction is
46
Junction Barrier Schottky Rectifiers in Silicon Carbide
created in a region that was not exposed to ion implantation damage. However, in order
to create an Ohmic contact a surface layer of aluminum (Al) is necessary since boron
also diffuses out from the surface as a consequence of activation anneal. Vertical
diffusion of implanted boron is reported [32, 33] and an example of this diffusion is
shown in Figure 25.
1020
Concentration (cm-3)
Al
1019
1018
B
1017
1016
1015
0
0.5
1
1.5
Depth (um)
2
2.5
3
Figure 25 Secondary Ion Mass Spectrometry (SIMS) measurement showing vertical
boron diffusion after activation anneal at 1700 C. (Figure is taken from ref. [34].)
However, it was demonstrated by the author [34] that lateral diffusion is also taking
place and that the diffusion length is in the same range as the vertical diffusion (at least
3 m). This diffusion has a major impact on the actual grid dimensions (Sactual in
Figure 26) compared to the designed dimension (Sdrawn).
As was described in
section 5.2, 3 m is used in device design both for Schottky spacing (Sdrawn) and
p+ width (W) and therefore is B not possible to use as dopant in the p+ grid.
Schottky metal
0.6 m
p+
w/2
sdrawn
p+
sactual
tepi
nn+
Backside ohmic contact
47
Figure 26 Schematic cross-section
of a cell of the JBS structure.
Sactual is the resulting spacing due
to lateral boron diffusion. (Figure
is taken from ref. [34].)
Fanny Dahlquist
6.2 Experimental
In all experiments in this thesis work JBS diodes have been processed together with
reference Schottky and PiN diodes on the same wafers. Basically, four process
development iterations have been done and a short summary of these experiments is
shown in Table 9.
Table 9 Summary of the experiments in Papers I-VII.
Experiment
Published
SiC
results
material
1
Paper I
6H
2
Paper II
4H / 6H
3
Paper III, IV, V
4H
Paper VI, VII
4H
(several
batches)
4
Epi layer
Blocking voltage
design
Purchased
from Cree
Inc. [35]
Purchased
from Cree
Inc.
Grown by
ABB [36,37]
Grown by
ABB
2100 V
1900 V / 2250 V
4000 V
300-5000 V
In Experiment 1 and 2 a three mask layer process was used and the diodes had no
junction termination or surface passivation. For Experiment 3 a five mask layer process
was developed where the two extra mask layers were used for implantation of a twozone junction termination extension. Finally, a process with 7 mask layers was
developed and summarized in the next section. The extra mask layers come from an
improved surface passivation process and the bond metal on top of the Schottky
contacts.
48
Junction Barrier Schottky Rectifiers in Silicon Carbide
6.2.1 Process description - abbreviated
1. Starting wafer material with grown epi
layer.
n--epi
n+-substrate
2. Dry etching of alignment marks.
n---epi
-epi
n
n+-substrate
Resist
Au, 1um
n-
3. Exposure for p + grid (lift-off process).
4.Deposition
of gold (Au) for ion
n+
implantation mask.
n-
5. Implantation mask after lift-off.
Au
n+
Al
6. Ion implantation with aluminum (Al) at
Au
500 C.
nn+
7. Removal of implantation mask.
nn+
49
Fanny Dahlquist
n
nn--
8.Implantation of Junction Termination
Extension (JTE) zone 1 (Z1).
9.Implantation of zo ne 2 (Z2).
n+
10.Activation anneal of all
Z1 Z2
implantations at 1700 C.
Passivation
JTE
n-nn
11.Deposition and patterning of thick
oxide surface passivation.
12.Deposition
of nickel backside
Ohmic contact and contact anneal.
n+
Backside Ohmic contact
Ti
Resist mask
Passivation
JTE
n-
13. Deposition and patterning of
titanium (Ti) Schottky contact (lift-off
process).
n+
Backside Ohmic contact
Bond +
Schottky metal
14. Deposition and patterning solder
and bond metals.
nn+
Ohmic + Solder metal
50
Junction Barrier Schottky Rectifiers in Silicon Carbide
7. Results and discussion
7.1 Papers I-V
The main electrical results from Paper I to Paper V are summarized in Table 10. For
these results single wafers or wafer pieces of 6H and 4H SiC were used for the
experiments. In Paper I and Paper II the goal was to demonstrate the JBS diode
concept in SiC for the first time [38]. In Paper I 1100 V blocking voltage was reached,
corresponding to 60% of the theoretical electric field strength. For the forward voltage
drop calculation the active Schottky area was used to define the device active area,
which means that 2.6 V is a lower forward voltage than what would be possible in a real
diode. In Papers II-V is instead the active area defined as the anode contact area (total
Schottky metal area), which gives the actual forward voltage of a diode.
In Paper II JBS diodes in 6H and 4H SiC with 1100 V blocking voltage were
demonstrated while reference Schottky diodes only blocked 150 V. The forward
characteristics was dominated by the Schottky junction but with a high total forward
voltage drop due to a non-optimized epi design for that blocking voltage (on-resistance
of 20mcm2). Therefore, the on-resistances resulted in forward voltages of >3 V at
100 A/cm2. The JBS on-resistance was about two times lower in 4H compared to 6H,
but the measured doping concentration was 4 times higher in the 6H epi (4e15 cm-3
compared to 1e15 cm-3). The calculated 4H on-resistance is in fact 8 times lower than
for the 6H material. The theoretical difference should be 10 times since the mobility is
10 times higher in 4H compared to 6H for 4e15 cm-3. The deviation can be due to nonuniform epi doping and thickness between the devices. Furthermore, the Schottky
barrier height was 0.2 eV higher for the 4H diodes compared to the 6H diodes, due to
the higher bandgap energy in 4H [39].
As seen in Table 10 the 4H JBS diode in Paper II is deep punch-through (s_pt=0.84) at
1 kV blocking voltage, which could result in breakdown effects at the epi-substrate
interface. However, the 6H diode reached the same blocking voltage with much less of
the junction field at the epi-substrate interface (s_pt=0.48). The reached electric field of
55% and 53% of the theoretical value, respectively, can therefore either be explained by
breakdown at the periphery of the devices (the field termination is a “guard ring”
implanted toge ther with the p+ grid), or that the breakdown voltage is occurring at the
pn junction or at the Schottky interface. The reference Schottky contacts without guard
ring reached 870 V and 540 V, for 4H and 6H respectively, and the PiN diodes reached
51
Fanny Dahlquist
1.4 kV and 1.1 kV respectively. This supports the conclusion that the JBS blocking
voltage is limited by the electric field at the Schottky interface-p+ grid and that the
Schottky barrier height and spacing can be optimized to increase the blocking voltage.
Table 10 Summary of the electrical results on JBS diodes in Papers I-V.
* The active area used in the calculation of current density is the anode contact area (except in
Paper I where the active Schottky area was used).
** In Paper I, 2.2 MV/cm is given as reached junction electric field, which was based on a
calculation with a simplified formula not taking punch-through into account.
Paper I
Paper II
Paper II
Papers III-V
6H SiC JBS
4H SiC JBS
6H SiC JBS
4H SiC JBS
VF at 100 A/cm2 *
2.6 V
3.1 V
5.0 V
1.85 V
Ron (Rdrift , theoretical)
[mOhmcm2]
20 (9)
19 (6.8)
43 (19.5)
8 (6.4)
VB (highest) [V]
1100 V
1000 V
1000 V
2800 V
Electric field at VB
1.7 MV/cm**
1.1 MV/cm
1.4 MV/cm
1.8 MV/cm
60%
55%
53%
80%
0.24
0.84
0.48
0.17
0.15 A/cm2
A/cm2
A/cm2
mA/cm2
0.98 eV
1.20 eV
0.98 eV
1.40 eV
1.03
1.06
1.04
1.10
% of theoretical
critical electric field
Punch-through factor
s_pt
JR at VB
Schottky barrier
height, B
Ideality factor, 
Paper III was the first experiment where an optimal punch-through epi design was used
for low on-state characteristics. The p+ grid layout was also improved using a p+ stripe
width of 3 m as well as various Schottky spacings from 21 m down to 3 m in order
to increase the relative Schottky area for a better trade-off between forward voltage and
leakage current. In previous experiments 5 m lines was the smallest dimension due to
limitation in contact lithography. A low forward voltage drop of less than 2V was
obtained for 2.8 kV blocking voltage (see Figure 27) and low leakage at elevated
52
Junction Barrier Schottky Rectifiers in Silicon Carbide
temperatures up to 225 C was demonstrated. In Paper IV the forward voltage and
leakage current were analyzed with respect to low (100 A/cm2 ) and high (500 A/cm2)
current densities and high temperatures (up to 225 C). It was shown, that for the 2.8 kV
diode with the epi doping of 3e15 cm-3, a Schottky spacing of 7-9 m is optimal for
lowest forward voltage while maintaining low leakage current. Paper V compares these
JBS diodes together with separately processed PiN diodes with 4.5 kV blocking voltage.
1e-01
Leakage current density (A/cm2)
Schottky
1e-02
JBS
J
1e-03
1e-04
1e-05
1e-06
PiN
PiN
1e-07
1e-08
1e-09
0
400
800
1200
1600
2000
2400
2800
Reverse voltage (V)
Figure 27 Reverse blocking characteristics of a 2.8 kV JBS diode with 2V forward
voltage drop in comparison with a reference Schottky and PiN diode. (Figure is taken
from Paper III.)
7.2 Electrical characterization and parameter extraction
Paper VI and Paper VII present results on Schottky and JBS diodes from many wafers
in several batches. The processed diodes were all first characterized on-wafer, i.e., the
diode chips have not been diced out and gone through device packaging. Electrical
measurements of the static current-voltage (I-V) diode characteristics are the fastest way
to evaluate if the performance of the diodes is close to that expected from the device
design. It was important to develop a measurement routine for the automatic prober that
is correct and reliable for the interesting parameters. For selected diodes, the
characteristics were measured with high resolution. The important parameters that were
53
Fanny Dahlquist
chosen to measure for all devices and then used to extract the diode characteristics for
evaluation are listed in Table 11.
Table 11 Extracted parameters from the static current-voltage measurements.
Directly measured parameter
Extracted parameter
(at six temperatures, RT-225 C)
VF, (V)
Differential on-resistance, Ron,sp (T) (cm2)
at 33, 50, 100, 300,
and 500 A/cm2
Differential on-resistance, Ron,sp (JF) (cm2)
Temperature coefficient, TempK
(V/K)
VF , (V)
Schottky barrier height, B (T) (eV)
at 20n, 2, 200, 200m, and 10 A/cm2
Ideality factor, (T) and (JF)
Reverse leakage as function of junc tion
JR,
2
(A/cm )
at -100V, -300V, and -500V (A/cm )
electric field, JR (Ej)
Reverse leakage as function of temperature,
JR (T)
VR,MAX (V)
Maximum reverse voltage (at RT):
limited by avalanche breakdown or
100mA/cm2
Maximum reverse blocking
Maximum junction electric field
Yield
2
JR,
(A/cm2)
at -1000V, -2000V, -2500V, -3000V
Leakage current characteristics
Defects analysis
and at VR,MAX (only at RT)
The differential on-resistance was calculated according to Equation 41 for different
current densities since the on-resistance was observed not to be constant for all JF.
Ron, sp 
VF (J F ,high) VF ( J F ,low)
J F , high  J F ,low
[cm2]
(41)
The definition used for the diode temperature coefficient in this work (Paper VI), is the
forward voltage change at 100A/cm2 for a temperature increase from RT (30 C) to
125 C (Equation 42):
TempK 
VF (125C) VF (30C)
125C  30C
[V/K]
54
(42)
Junction Barrier Schottky Rectifiers in Silicon Carbide
3. Paper VI and Paper VII
JBS and Schottky diodes were processed on wafers with epitaxial designs for 6003300 V and the goal was to compare diode characteristics for the two device concepts
for the said blocking voltage range. Normally considered disadvantages with the JBS
concept compared to the Schottky concept in SiC are:

Higher forward voltage compared to the Schottky diode due to the extra
resistive contribution in forward characteristics from the p+ grid.

More complex process due to the fabrication of the p+ grid.
In Paper VI and Paper VII advantages with a JBS design are demonstrated that could
justify both of the above statements:
1) Increased blocking voltage compensates the higher forward voltage
Figure 28 shows Schottky and JBS diodes from the same wafer where the theoretical
breakdown voltage and measured blocking voltage are plotted for each diode. These
diodes have all the same total chip area and block about 1400 V for the JBS and about
600V for the Schottky diodes. The observed forward voltage for the JBS diodes is
1.45 V, which agrees well with the expected forward voltage drop from Figure 18. The
Schottky diodes show a forward voltage around 1.4 V. This is an expected value, due to
the elimination of the p+ grid. The value is also in good agreement with the expected
forward voltage for the theoretical breakdown voltage, around 1800 V. However, since
in reality these Schottky diodes block only 600 V a 15% lower forward drop at about
1.2 V would be possible if the Schottky diode could reach a junction electric field
strength comparable to the JBS diode and the epi design would be adapted accordingly.
This means that a more aggressive epitaxial design in terms of the electric field can be
used for the JBS diodes of the same blocking voltage and that consequently a lower drift
resistance is possible for the JBS diodes. Hence, the increased blocking voltage can
offset the resistive contribution from the p+ grid.
2) Higher blocking yield by shielding of effects from defects
In Paper VII was shown that the JBS diodes reach about 20% higher junction electric
field compared to the Schottky diodes on the same epi. Using as yield criteria an
absolute voltage value at a given maximum leakage current, this translates directly into
a higher yield for the JBS diodes. In all experiments a higher blocking yield was
55
Fanny Dahlquist
observed for the JBS diodes compared to the Schottky diodes. Again Figure 28 shows
an example of this observation, where the theoretical breakdown voltage and measured
blocking voltage are plotted for each diode.
There are several different factors that contribute to the better blocking yield. The
phenomenon is suggested to be dominated by the different blocking mechanisms of
semiconductor to metal junctions versus semiconductor pn junctions. For implanted pn
junctions, used for the p+ grid, the employed process shows excellent blocking, even in
the presence of a variety of crystal defects (shown in Paper V). On the other hand, the
processing makes the effects of defects at the surface worse. A micropipe defect (typical
20 cm-2) ‘contaminated’ by p-type doping in a pn junction leads to a local reduction in
the electric field shielding the defect effectively. However, if the same defect is
processed as a Schottky area, the deposited metal decorating the micropipe leads to a
local increase in the electric field strength. Moreover, an epi layer surface contains
epitaxial growth related defects only present at the surface but not in the bulk. All these
facts lead to additional local peaks in the electric field at the surface and thereby at the
Schottky barrier.
The JBS design moves the highest point of electric field away from the surface, placing
the highest electric field points at the pn junction inside the crystal, and reduces the field
at the Schottky junction. Simultaneously, the Schottky area is reduced by the p+ stripes,
then the sensitive Schottky area is replaced by less sensitive pn junctions. A further
improvement in the Schottky barrier technology addressing the above issues would
benefit both diode types similarly.
56
Theoretical breakdown voltage (V)
Junction Barrier Schottky Rectifiers in Silicon Carbide
2500
JBS
Schottky
2250
2000
1750
1500
0
500
1000
1500
2000
Measured blocking voltage (V)
Figure 28 An example of blocking yield for JBS and Schottky diodes on the same wafer.
Theoretical epi breakdown voltage is plotted versus measured blocking voltage.
3) Capability to handle high current pulses by bipolar injection through the
p+ regions
The capability to handle high current pulses is a requirement in most application
circuits. Schottky diodes have, due to the constant differential on-resis tance
characteristics, excessive high forward voltage and associated high thermal heating.
Schottky diodes may experience permanent damage already in the single kA/cm2 range.
Typical applications, however, may require 2-20 kA/cm2 of non repetitive pulses of up
to 20 milliseconds. The JBS diode has the potential to show better high current
characteristics than a Schottky diode if the p+ grid could start to inject current at a
certain forward voltage and thereby obtain bipolar operation for high current pulses. In
Paper VI bipolar operation of the JBS diode is demonstrated for a forward voltage
higher than 3.1V (shown in Figure 29). In this diode, the p+ grid was Ohmically
contacted to the anode by an additional process step. Prior to this demonstration, it was
unclear, if bipolar injection can be achieved effectively in a JBS structure due to the
lateral extension of the shorting effect of the Schottky barrier on the pn junction. In this
experiment the boundary conditions and design rules for a high current JBS diode were
investigated.
57
Fanny Dahlquist
Figure 29 Electro luminescence graph for a JBS diode. The PiN regions on the
boundary of the device inject at high current. (Figure taken from Paper VI).
4) The temperature dependence in the diode characteristics could be controlled by
the p+ grid design
For paralleling and packaging of devices the forward temperature dependence is critical
with respect to uniform current sharing. Since the Schottky junction has a negative
dependence while the drift resistance shows a unipolar positive dependence the overall
characteristic for the Schottky diode is given by the technology and the material
property. This leads for a 600V Schottky diode to the undesired negative temperature
coefficient as shown in Paper VI, and hence to a risk of current imbalance. The JBS
diode offers a way to control this temperature characteristics through the p+grid
resistance. In Paper VI is shown, how an appropriate design of the p+ grid indeed can
lower the critical current density, so that for the JBS diodes a larger save operating
domain can be reached than for the Schottky diodes. However, the temperature
coefficient is a strong function of the operating current density that is, e.g., determined
by the allowed power density in the diode packaging. If high current densities
(>200 A/cm2 ) are possible, also 600 V Schottky diodes show a positive forward
temperature dependence with a margin.
58
Junction Barrier Schottky Rectifiers in Silicon Carbide
7.4 Transient measurements
3,5
Current (A)
3,0
1200
2,5
2,0
1000
1,5
800
1,0
Voltage (V)
1400
600
0,5
400
0
-0,5
-1,0
4e-7
200
6e-7
8e-7
1e-6
0
1,2e-6 1,4e-6 1,6e-6 1,8e-6
Time (s)
Figure 30 Single pulse turn-off of a 2.1 mm2 1400 V JBS diode in an inductive clamped
circuit at three different currents. Turn-off was performed at T=150 C. The three
voltage traces are identical.
A detailed investigation of transient characteristics has not been done in this work but
an example of a single pulse turn-off measurements of a 1400 V JBS diode operated at
1200 Vdc, and at 1, 2, and 3A is shown in Figure 30. The turn-off was performed at RT
and at 150 C and was found to be similar. The curves confirm that no stored charge is
present, since the reverse charge is independent of the forward current.
JBS diodes were also operated for over 1000 h in a Power Factor Correction (PFC)
circuit. Operation at 90 kHz, 400 Vdc and at 250 W confirmed stable operation, and also
the expected improvement in circuit efficiency compared to an operation with a silicon
PiN diode.
59
Fanny Dahlquist
8. Conclusions
This thesis concerns design, process integration, fabrication and evaluation of JBS and
Schottky diodes in SiC. The developed design strategy minimizes the static on-state
power losses for a rated blocking voltage, considering also process limitations. The
most important design parameters affecting the trade-off between forward voltage and
leakage current were found to be the epi design (doping, thickness), Schottky contact
properties (barrier height, current ideality factor) and for a JBS diode also the p+ grid
design.
The forward voltage drop of the JBS and Schottky diode was investigated and analytic
equations formulated, considering the Schottky barrier height, the drift region and for
the JBS device also the contribution from the p+ grid. For high blocking voltages above
1700 V the drift region contribution to the device on-resistance dominates the forward
voltage drop and hence it is crucial in design to approach the theoretical critical junction
electric field. For lower blocking voltages, 600-1700 V, instead it is the Schottky
junction properties that dominate the forward voltage. Then the Schottky barrier height
and ideality factor are the dominating parameters affecting on-state power losses. The
forward voltage to leakage current trade-off was also found to be a strong function of
the operating current density and operating temperature.
A design procedure to minimize the drift region resistance was derived. The lowest drift
resistance is reached with a punch-trough epi design where 1/3 of the junction electric
field is accommodated at the epi-substrate interface. For a given blocking voltage the
drift resistance is then reduced by 16% compared to a non punch-through design.
Simultaneously a margin to the avalanche breakdown voltage is also obtained compared
to the non punch-through case, due to the lower doping of the drift region.
Experimental results were analyzed for JBS and Schottky diodes with epitaxial designs
for 600-3300 V. Suppression of reverse leakage current and thereby higher obtained
blocking voltage was demonstrated for JBS diodes in comparison with Schottky diodes.
Independent of the epi design about 20% higher junction electric field was reached in
the JBS diodes (1.75-2.0 MV/cm) compared to the Schottky diodes (1.3-1.75 MV/cm)
on the same epi. The leakage current was lowered by at least two orders of magnitude.
The higher blocking voltage justifies the higher forward voltage in the JBS devices. For
the JBS diodes, also bipolar operation was demonstrated for forward voltages higher
than 3.1 V thereby giving good capability to handle high cur rent pulses.
60
Junction Barrier Schottky Rectifiers in Silicon Carbide
Furthermore, the JBS diodes show better blocking yield than the Schottky diodes which
could be explained by the different blocking mechanisms, making the JBS design less
sensitive to crystal defects and imperfections in state-of-the-art SiC material.
JBS and Schottky diodes in SiC are competitors to Si PiN diodes for the 300-3300 V
blocking voltage range because of the much lower switching power losses. When
comparing Schottky and JBS diodes it is a trade-off between both process complexity
and device characteristics, i.e., power losses. For a complete trade-off comparison it is
important to compare the static on-state losses for the two device types versus the
operating current density, the operating temperature and also the capability to handle
high current pulses. Manufacturability and process yield have also to be taken into
account for each case.
It is concluded, that the main advantages of the JBS device compared to a Schottky
device are higher blocking voltage versus forward voltage rating, higher blocking yield
and capability for bipolar operation for high current pulses.
61
Fanny Dahlquist
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