Memory
CLO-4

Develop larger-size RAM from smaller memory
elements and program PLD devices.
2
Memory and Programmable Logic

A memory unit is a device to which binary information is transferred for
storage and from which information is retrieved when needed for processing.

When data processing takes place, information from memory is transferred
to selected registers in the processing unit.

Intermediate and final results obtained in the processing unit are transferred
back to be stored in memory.

Binary information received from an input device is stored in memory, and
information transferred to an output device is taken from memory.

A memory unit is a collection of cells capable of storing a large quantity of
binary information.
3
Computer Memory Measurement Unis
4
Basics of Semiconductor Memory


A single binary bit is stored in a memory cell
An organized group of cells is called a array
Basics of Semiconductor Memory

The location of a unit of data is called the address

The number of units that can be stored in a memory is the
memory’s capacity
Memory

There are two types of memories that are used in
digital systems

Used to store binary information.

Two Types
1. Random Access Memory (RAM)
Can perform read and write operations
2. Read-Only Memory (ROM)
Can perform only read operations.
7
Random Access Memory (RAM)
8
Random Access Memory (RAM)

RAM (Random Access Memory) is the hardware in a computing
device where the operating system (OS), application programs
and data in current use are kept so they can be quickly reached
by the device's processor.

RAM is the main memory in a computer.


It is much faster to read from and write to than other kinds of storage, such as a
hard disk drive (HDD), solid-state drive (SSD) or optical drive.
Random Access Memory is volatile.

That means data is retained in RAM as long as the computer is on, but it is lost
when the computer is turned off. When the computer is rebooted, the OS and
other files are reloaded into RAM, usually from an HDD or SSD (Static Random
Access Memory )
9
Function of RAM

Because of its volatility, RAM can't
store permanent data.


Short-term memory is focused on
immediate work, but it can only keep a
limited number of facts in view at any one
time. When a person's short-term
memory fills up, it can be refreshed with
facts stored in the brain's long-term
memory.
A computer also works this way.

If RAM fills up, the computer's processor
must repeatedly go to the hard disk to
overlay the old data in RAM with new
data. This process slows the computer's
operation
10
RAM Types

Static Random Access Memory (SRAM)


SRAM (static RAM) is a type of random access memory (RAM) that
retains data bits in its memory as long as power is being supplied.
Unlike dynamic RAM (DRAM), which must be continuously refreshed,
SRAM does not have this requirement, resulting in better performance
and lower power usage. However, SRAM is also more expensive than
DRAM, and it requires a lot more space
Dynamic Random Access Memory (DRAM)





DRAM, or Dynamic Random Access Memory, is a temporary memory bank for
your computer where data is stored for quick, short-term access.
When you perform any task on your PC, such as launching an application, the
CPU on your motherboard pulls program data from your storage device (SSD/
HDD) and loads it onto the DRAM.
Since DRAM is significantly faster than your storage devices (even SSDs), the
CPU can read this data quicker, resulting in better performance.
The speed and capacity of your DRAM help determine how fast applications
can run and how efficiently your PC can multitask. Hence, having faster and
higher capacity DRAM is always beneficial.
DRAM is the most common type of RAM we use today.
11
Block Diagram of RAM
K-bit address
lines
N
N-bit Data Input
(for Write)
Memory Unit
K
Read/Write
Chip Enable
Or Mem Sel
2k words
N-bit per word
N
N-bit Data Output
(for Read)
12
Memory Description

Capacity of a memory is described as

Memory device Capacity =MxN bits
 M = Number of Locations
 N =Each location is capable of storing number of Bits of data
Memory
# of addr
# of data lines
# of addr lines
# of total bytes
1M x 8
1,048,576
8
20
1 MB
2M x 4
2,097,152
4
21
1 MB
1K x 4
1024
4
10
512 B
4M x 32
4,194,304
32
22
16 MB
16K x 64
16,384
64
14
128 KB
The location of a unit of data is called
the address
220 B
13
Memory Description



Address Lines
Control Lines (Read lines, Write Lines, Chip select lines)
Data Lines are Bidirectional
14
Memory Read Operation

Address
Bus
(memory will be
decoded
and
activate
the
location).

Control Signal
will be activated
and memory will
come to know
about
read
operation.

Data bus will
sent
that
memory stored
15
Memory Read Operation
Address
Buffer
100
Memory
Select
00110001
Address
Decoder
1 1 0 1
0 0 0 1
0 1 1 0
1 0 0 1
0 0 1 1
Address
Bus
Data
Buffer
0
1
1
0
0
0 1 0 0 1
1 0 0 1 0
0 0 1 0 0
Read
1
0
1
0
0
1
0
1
0 0
0 1
0 0
1 0
0 1
0 0
1 0
0 0
Write
Data Bus
Decoder is a
combinational
circuit that has ‘n’
input lines and
maximum
of
2n output lines.
One
of
these
outputs will be
active High based
on
the
combination
of
inputs
present,
when the decoder
is enabled
Memory Write Operation
17
Memory Write Operation
Address
Buffer
011
Memory
Select
10110010
Address
Decoder
1 1 0 1
0 0 0 1
0 1 1 0
1 0 1 1
0 0 1 1
Address
Bus
Data
Buffer
0
1
1
0
0
0 1 0 0 1
1 0 0 1 0
0 0 1 0 0
Read
1
0
1
0
0
1
0
1
0 0
0 1
0 0
1 0
0 1
0 0
1 0
0 0
Write
Data Bus

1024x4= 2 raised to power 10x4
Data
Lines
Address
lines
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Three Examples of Building Memory in Hierarchy
Example1. Building Memory in Hierarchy

Design a 1Mx8 using 1Mx4 memory chips
Memory device
Capacity =MxN bits
M = Locations
N =Each location
is capable of
storing number of
Bits of data
1Mx8
means =1
MBytes
CS
A19
A18
A17
1Mx4
CS
R/W
A19
A18
A17
A0
•
D6
•
D5
D4
•
D3
D2
1Mx4
A0
D7
CS
D1
R/W
•
In SI, one megabyte is
equal to 1,000,000
bytes.
At the same time,
practically 1
megabyte is used as
220 B, which means
1,048,576 bytes.
For programmers, the
term "mega" rose out of
convenience, as
1,048,576 bytes
is close to 1,000,000
The chip select is an
active low signal that
enables and disables
the memory device
D0
A=Address Lines
D= Data Lines
CS=Chip Select
Example 2.Building Memory in Hierarchy

Design a 2Mx4 using 1Mx4 memory chips
Note that 1-to-2
decoder is the wire
itself (or use
an inverter)
A19
A18
A17
1-to-2
Decoder
CS
CS
D1
R/W
1
0
A19
A18
A17
1Mx4
A0
Access address
D2
1Mx4
A0
A20
D3
CS
R/W
D0
Example3. Building Memory in Hierarchy

Design a 2Mx8 using 1Mx4 memory chips
A19
A18
A17
A0
A20
1-to-2
Decoder
1
A19
A18
A17
A0
A19
A18
A17
A19
A18
A17
A0
A19
A18
A17
23
D6
1Mx4
CS
D5
R/W
A0
D4
D3
D2
1Mx4
D1
0
A0
CS
D7
CS
R/W
1Mx4
CS
R/W
1Mx4
CS
R/W
D0
2.
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Read Only Memory (ROM)
Read Only Memory (ROM)

Read-only memory, or ROM, is computer memory containing data that can
only be read, not written to.

ROM contains boot-up programming that is used each time a computer is
turned on.

It generally can't be altered or reprogrammed.

The data in ROM is nonvolatile and isn't lost when the computer power is
turned off. As a result, read-only memory is used for permanent data
storage.


Random Access Memory, on the other hand, can only hold data temporarily.
ROM is generally several megabytes of storage,

while RAM is several gigabytes
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Read Only Memory (ROM)


“Permanent” binary information is stored
Non-volatile memory

Power off does not erase information stored
K-bit address
lines
K
26
ROM
2k words
N-bit per work
N-bit Data Output
N
Programmable Logic Device (PLD)
ROM is a programmable logic device
(PLD).
27
Programmable Logic Device (PLD)

ROM is a programmable logic device (PLD).

The binary information that is stored within such a
device is specified in some fashion and then
embedded within the hardware in a process is referred
to as programming the device.

The word “programming” here refers to a
hardware procedure which specifies the bits that
are inserted into the hardware configuration of the
device.
28
Programmable Logic Device (PLD)


ROM is one example of a PLD.
Other such units are the



Programmable logic array (PLA)
Programmable array logic (PAL)
Field‐programmable gate array (FPGA).

A PLD is an integrated circuit with internal logic gates connected through
electronic paths that behave similarly to fuses.

In the original state of the device, all the fuses are intact.

Programming the device involves blowing those fuses along the paths that
must be removed in order to obtain the particular configuration of the desired
logic function.
29
Programmable Logic Device (PLD)


A typical PLD may have hundreds to millions of
gates interconnected through hundreds to
thousands of internal paths.
In order to show the internal logic diagram of such
a device in a concise form, it is necessary to
employ a special gate symbology applicable to
array logic.
30
Programmable Logic Device (PLD)





Figure 7.1 shows the conventional and array
logic symbols for a multiple input OR gate.
Instead of having multiple input lines into the
gate, we draw a single line entering the gate.
The input lines are drawn perpendicular to
this single line and are connected to the gate
through internal fuses.
In a similar fashion, we can draw the array
logic for an AND gate.
PLD consists of an array of AND and OR
gates, which can be programmed to
realize the required logic function
31
General Structure of PLD

Inputs to the PLD are applied to a set of buffer/inverters. These devices have both the true
value of the input as well as the complemented value of the input as its outputs.

Outputs from these devices are the inputs to an array of and-gates. The AND array generates
a set of p product terms.

The product terms are inputs to an array of or-gates to realize a set of m sum-of-product
expressions.
General Structure of PLD

One or both of the gate arrays are programmable.

The logic designer can specify the connections within an array.

PLDs serve as general circuits for the realization of a set of
Boolean functions.
Device
AND-array
OR-array
Programmable
ROM
Fixed
Programmable
PLA
Programmable
Programmable
PAL
Programmable
Fixed
Advantages of PLD
• PLD called a programmable logic device, it is a
semiconductor device that can be programmed to
obtain required logic devices.
• The advantage of PLD is re-programmability, they
have replaced special-purpose different types of logic
devices like logic gates, flip flop, counter, and
multiplexer in many semi-custom applications.
34
Advantages of PLD
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Low development cost
Less space requirement
Less power requirement
It is easy to troubleshoot
Less design time
High switching speed
High design security
Easy design modification
High reliability
Only the connection mask require to be custom made
Easy circuit testing
There is no need for the time-consuming logic design of some random logic
gate network device
Design checking easy
The design change is also easy
The layout is far simpler than that for random logic gate networks
Adoption of the new technology is quick and easy
35
Example 1: Internal Logic of a 32x8 ROM (32 Words stored in
memory and each word has 8 bits)
36
Example 1: Internal Logic of a 32x8 ROM (32 Words stored in
memory and each word has 8 bits)
•
•
ROM=A decoder +OR
gates
Each output of the
decoder represents a
memory address
A4
A3
A2
A1
5-to-32
5
32x8 ROM
8
Each
represents
32 wires
0
1
2
3
Decoder
A0
Fuse can be
implemented as
a diode or a
pass
transistor
37
28
29
30
31
D7
D6
D5
D4
D3
D2
D1
D0
Example 1: Internal Logic of a 32x8 ROM (32 Words stored in
memory and each word has 8 bits)

Inputs of the decoder: A1to A4 =5

Out put of the decoder =2 raised to power 5=32

Parallel lines are memory addresses

Each OR gate has 32 number of input lines

Switch

At each junction one piece of information stored

x will show fuse or internal connection
Example 1: Internal Logic of a 32x8 ROM (32 Words stored in
memory and each word has 8 bits)
ROM Truth
Table (Partial)
and Arbitrary
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
1
1
0
0
0
1
0
1
0
0
0
0
1
1
0
0
0
1
0
1
1
0
0
0
1
0
1
0
1
1
0
0
0
0
…
…
…
…
…
…
…
…
…
…
…
…
…
1
1
1
0
1
0
0
0
1
0
0
0
0
1
1
1
1
0
0
1
0
1
0
1
1
0
1
1
1
1
1
1
1
1
0
0
0
0
1
A4
A3
A2
A1
A0
5-to-32
User
defined
data
0
1
2
Programmed
ROM according
to given T/T
Decoder
29
30
31
D7 D6 D5 D4 D3 D2 D1 D0
39
Example 2: Design a Lookup Table
40
Example 2: Design a Lookup Table

Design a square lookup table for F(X) = X2 using ROM
X
F(X)=X2
X
F(X)=X2
0
0
000
000000
1
1
001
000001
2
4
010
000100
3
9
011
001001
4
16
100
010000
5
25
101
011001
6
36
110
100100
7
49
111
110001
41
Example 2: Design a Lookup Table
0
1
X
F(X)=X2
000
000000
001
000001
X1
010
000100
X0
011
001001
6
100
010000
7
101
011001
110
100100
111
110001
X2
3-to-8
2
3
Decoder
4
5
F5
F4
F3
F2
F1
F0
Square Lookup Table using ROM
42
Example 2: Design a Lookup Table
0
1
X
F(X)=X2
000
000000
001
000001
X1
010
000100
X0
011
001001
6
100
010000
7
101
011001
110
100100
111
110001
X2
3-to-8
2
3
Decoder
4
5
F5
F4
F3
F2
F1
F0
Not Used
Square Lookup Table using ROM
= X0
43
Example 2: Design a Lookup Table
0
1
X
F(X)=X2
000
000000
001
000001
X1
010
000100
X0
011
001001
6
100
010000
7
101
011001
110
100100
111
110001
X2
3-to-8
2
3
Decoder
4
5
F5
F4
F3
Square Lookup Table using ROM
F2
F1
F0
44
Thanks
45