Al-Quds University
Faculty of Engineering
Electronic & Communication Engineering Department
Electronics I Laboratory
(0701224)
EXP. (#5): Clamping Circuits
Name: Joseph Dukmak (21720049)
Abdelrahman Al-Manassra (21711978)
Dr. Asal Sarhan
02.03.2019
Table of Contents
Objectives ............................................................................................................... 3
Equipment required ................................................................................................ 3
Theoretical Background ...................................................................................... 3-4
Procedure + Results .......................................................................................... 4-13
Conclusion ............................................................................................................ 14
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Objectives:
To calculate, draw, and measure the output voltage of clampers
Equipment Required:
• Instruments:
1. Oscilloscope.
2. DMM.
• Components:
1. Resistors (100 Ω, 1 k Ω, 100 k Ω).
2. Diode (Silicon).
3. Capacitor (1-µF).
Theoretical Background:
A Clamper Circuit is a circuit that adds a DC level to an AC signal. The positive and
negative peaks of the signals can be placed at desired levels using the clamping circuits.
As the DC level gets shifted, a clamper circuit is called as a Level Shifter.
Clamper circuits consist of energy storage elements like capacitors. A simple clamper
circuit comprises of a capacitor, a diode, a resistor and a dc battery if required.
Clamper Circuit
A Clamper circuit can be defined as the circuit that consists of a diode, a resistor and a capacitor
that shifts the waveform to a desired DC level without changing the actual appearance of the
applied signal.
In order to maintain the time period of the wave form, the tau must be greater than, half the
time period (discharging time of the capacitor should be slow.)
τ = R.C
Where
•
R is the resistance of the resistor employed
•
C is the capacitance of the capacitor used
The time constant of charge and discharge of the capacitor determines the output of a
clamper circuit.
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•
In a clamper circuit, a vertical shift of upward or downward takes place in the
output waveform with respect to the input signal.
•
The load resistor and the capacitor affect the waveform. So, the discharging time
of the capacitor should be large enough.
The DC component present in the input is rejected when a capacitor coupled network is
used (as a capacitor blocks dc). Hence when dc needs to be restored, clamping circuit is
used.
Procedure and Results:
Part 1: Threshold Voltage:
Determine the threshold voltage for the silicon diode using the DMM.
𝑉𝑉𝑇𝑇 = 0.58 𝑉𝑉.
Part 2: Clampers (R, C, Diode Combination):
R(meas) = 99k Ω
b. By KVL
VC (calculated) =
-4 +Vc + Vd = 0
-4 + Vc + 0.7 = 0 => VC = 3.3V.
VO = 0.7V.
c. VO (calculated)
-4 - VO - VC = 0
VO = -7.3
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d. VO from calculated results:
Vertical sensitivity = 2
Horizontal sensitivity = 0.2ms
Figure 5.2
e. VO from measured results:
Figure 5.3
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f. Reverse the diode in the previous circuit
VC (calculated) =
-4 +Vc + Vd = 0
-4 + Vc + 0.7 = 0 => VC = 3.3V.
VO = -0.7V.
g.
VO (calculated)
-4 - VO – 3.3 = 0
VO = 7.3V.
h. VO from calculated results:
Vertical sensitivity = 2
Horizontal sensitivity = 0.2ms
Figure 5.4
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i. VO from measured results:
Figure 5.5
The waveform of Fig 5.5 didn’t differ with the expected waveform in the Fig
5.4. The wave form in both Fig 5.2 and 5.3 was shifted downwards and in the
next two waveforms it was shifted upwards, because the diode was reversed.
Part 3: Clampers with a DC Battery:
a. E(meas) = 1.5 V.
f= 1000hz
b. VC (calculated) =
-4 +Vc + Vd +1.5 = 0
-4 + Vc + 0.7 + 1.5 = 0 => VC = 1.8V.
VO = 0.7 +1.5 = 2.2V.
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c. By KVL
-4 -VO -VC = 0
VO = -5.8V.
d. VO from calculated results:
Vertical sensitivity = 2
Horizontal sensitivity = 0.2ms
Figure 5.7
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e. VO from measured results:
Figure 5.8
f. Reverse the diode and calculate VC and VO
By KVL
 -4 - VC + 0.7 - 1.5 = 0
VC = - 4.8 V

VO = 0.7 - 1.5 = - 0.8V
g. -4 + VC – 0.8 = 0
VO = 4.8V
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h. VO from calculated results:
Vertical sensitivity = 5
Horizontal sensitivity = 0.2ms
Figure 5.9
i. VO from measured results:
Figure 5.10
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Part 4: Clampers (Sinusoidal Input):
Use the sinusoidal signal with same frequency and components as in part 2.
B + C.
Figure 5.11 + 5.12
Part 5: Clampers (Effect of R):
a.
τ = R.C
τ = 0.1 s
b. T(calculated) = 1/f = 1ms
T/2 = 0.5ms
c. The discharge period of an RC network is about 5 τ
5 τ = 0.5s which is 0.5s >> 0.5ms
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d. It is important for the time interval 5 τ to be much larger than T/2 so that the
discharge time doesn’t happen very quickly, and it might damage the device.
e. τ = 1ms
5 τ = 5ms
f. in part e, the discharge time is in the same time phase as T/2, which means that
it will be discharged very quickly.
g.
Vertical sensitivity = 2
Horizontal sensitivity = 0.2ms
Figure 5.13
h. The distortion happened due to the very close range between 5 τ and T/2.
i. Change R to 100ohms.
5 τ = 0.5ms
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j. The discharging time is the same as T/2. The discharge time will happen very
quickly.
So, whenever we lower the value of R, the discharge time decreases.
k. R = 100 ohms
Vertical sensitivity = 2
Horizontal sensitivity = 0.2ms
Figure 5.14
l. The lower value of R is, the more distorted the waveform will be.
m. 5τ >> T/2
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Conclusion:
For a clamping circuit at least three components — a diode, a capacitor and a resistor are
required. Sometimes an independent dc supply is also required to cause an additional
shift. The important points regarding clamping circuits are:
•
•
The shape of the waveform will be the same, but its level is shifted either upward
or downward.
There will be no change in the peak-to-peak or rms value of the waveform due to
the clamping circuit. Thus, the input waveform and output waveform will have the
same peak-to-peak value that is, 2Vmax. This is shown in the figure above. It must
also be noted that same reading will be obtained in the ac voltmeter for the input
voltage and the clamped output voltage.
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