A smart wind sensor using thermal sigma-delta modulation

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Sensors and Actuators A 97±98 (2002) 15±20
A smart wind sensor using thermal sigma-delta
modulation techniques
Ko® A.A. Makinwa*, Johan H. Huijsing
Electronic Instrumentation Laboratory, DIMES, Delft University of Technology,
Mekelweg 4, 2628 CD Delft, The Netherlands
Received 28 June 2001; received in revised form 11 December 2001; accepted 11 December 2001
Abstract
A smart wind sensor realized in a standard CMOS process combines a two-dimensional thermal ¯ow sensor and three auto-zeroed
comparators on a single chip. The comparators form the basis of three thermal sigma-delta modulators that control and digitize the heat
distribution in the chip. One modulator maintains the chip at a constant temperature above that of the ¯ow, while the other two cancel
orthogonal components of a ¯ow-induced temperature gradient. The bit-stream outputs of the modulators are decimated off-chip and used to
determine wind speed and direction. Wind tunnel tests show that the sensor is capable of measuring wind speed and direction with an accuracy
of 4% and 28, respectively, over the range 2±18 m/s. # 2002 Elsevier Science B.V. All rights reserved.
Keywords: Flow sensor; Thermal sensor; Sigma-delta modulation
1. Introduction
Wind speed and direction can be measured by two-dimensional (2-D) thermal ¯ow sensors realized in silicon. Such
``wind sensors'' typically consist of a heated chip [1] or
membrane [2,3], which is non-uniformly cooled by the wind.
The resulting ¯ow-induced temperature gradient in the sensor
is measured by on-chip thermopiles and from this information both wind speed and direction can be determined.
In typical wind sensors, the output of the thermopiles is
small (in the millivolt range), which requires the use of
precision (low-offset) interface circuitry. When implemented off-chip, however, such circuitry adds signi®cantly to the
cost and complexity of the total sensor system. Furthermore,
transporting such small signals off-chip signi®cantly
increases their susceptibility to external interference, e.g.
from mains and RF sources. For these reasons, efforts have
been made to realize ``smart'' thermal ¯ow sensors with cointegrated interface electronics [4±6]. In these designs, a
precision ampli®er boosts the thermopile signals to levels
compatible with the input range of an analog-to-digital
converter (ADC). Since, both a precision ampli®er and an
ADC are required, however, this interface architecture
requires considerable chip area to implement.
*
Corresponding author. Tel.: ‡31-15-278-5747; fax: ‡31-15-278-5755.
E-mail address: k.makinwa@ieee.org (K.A.A. Makinwa).
Alternatively, the heat distribution in the sensor can be
controlled such that ¯ow-induced temperature differences
are cancelled [7]. This technique has the added advantage
that the heat distribution in the sensor will always be
centered, even in the presence of possible thermal asymmetry introduced during the sensor's fabrication [8]. As
described in [7], the heat distribution in the sensor can be
controlled using thermal sigma-delta (TSD) modulation
techniques. From the resulting heat distribution, both wind
speed and direction could be accurately determined. Only
three low-offset comparators and some control logic were
required to implement the off-chip interface circuitry, resulting in an area-ef®cient architecture. Furthermore, the interface outputs are digital signals (bit-streams) which
eliminates the need for an explicit ADC.
In this paper, a smart wind sensor is described which
consists of a wind sensor and three low-offset comparators
realized on a single CMOS chip. The on-chip comparators,
together with a few external components, are used to realize
the TSD architecture proposed in [7]. The ®rst section of the
paper describes the CMOS realization of the wind sensor.
This is followed by a description of the interface electronics.
Next, the design of the on-chip comparators is described: an
auto-zeroed topology was used to achieve suf®ciently low
offset in a CMOS process. Finally, the results of electrical
measurements and wind tunnel tests on the sensor are
presented.
0924-4247/02/$ ± see front matter # 2002 Elsevier Science B.V. All rights reserved.
PII: S 0 9 2 4 - 4 2 4 7 ( 0 2 ) 0 0 0 3 4 - 1
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K.A.A. Makinwa, J.H. Huijsing / Sensors and Actuators A 97±98 (2002) 15±20
2. The CMOS wind sensor
The wind sensor chip consists of a square silicon substrate on which four heaters, four thermopiles and a central
diode have been integrated, as shown in Fig. 1. The interface electronics is located in the unused space in the middle
of the chip. For full CMOS compatibility, mechanical
robustness and low cost, the chip is not micromachined,
i.e. it is wafer thick. Although extra sensitivity may be
obtained by etching away part of the substrate, as for
example in [2,3], experience with a commercial wind sensor
shows that this is not required for meteorological applications [9].
The wind sensor chip is protected from direct contact with
the air¯ow to be measured by gluing it to a thin (0.25 mm)
ceramic disk, as shown in Fig. 2. The air¯ow is then passed
over the opposite side of the disk. Since, ceramic is a good
thermal conductor, a measurable temperature gradient will
still be induced in the heated chip. Wire-bonded leads
connect the chip to a ¯ex foil, which in turn is connected
to external circuitry. An opaque encapsulant (glob top)
shields the chip from light and protects the sensor and the
fragile leads from moisture ingress and oxidation.
The thermopiles sense orthogonal components of the
¯ow-induced temperature gradient. For increased sensitivity, thermopiles on opposite sides of the chip are connected
in series since they measure the same component of the
temperature gradient. Each thermopile consists of 12 p‡diffusion/Al thermocouples and has an estimated sensitivity
of 6 mV/K and a nominal resistance of 60 KO. The p‡ arms
of each thermopile are realized in a common n-well,
the resulting pn junctions are then reverse-biased to electrically isolate the thermopiles from the other on-chip
circuitry.
The wind sensor chip is heated by four polysilicon
resistors, each with a nominal resistance of 200 O. Since,
the heaters are large (0.4 mm2) the mismatch in heater
resistance is small, in the CMOS process the mismatch used
was less than 0.5%.
The central diode (implemented as a diode-connected
substrate PNP transistor) is used to measure the average
absolute temperature of the chip. When forward biased, its
base-emitter voltage has a temperature coef®cient of
approximately 2 mV/K.
3. Interface electronics
3.1. Operating principle
Each component (dTns or dTew) of the ¯ow-induced
temperature gradient may be accurately cancelled (and, thus
measured) by a differential TSD modulator. The topology of
one of these modulators is shown in Fig. 3. Here, Rs is the
thermal resistance between the heaters, and R¯ow,n and R¯ow,s
are ¯ow-dependent resistors that model the sensor's heat loss
to the ¯ow.
Intuitively viewed, the modulator attempts to drive dTns
towards zero by applying heat pulses to either the north or
south heaters. These pulses will be low-pass ®ltered by the
various thermal resistances and the sensor's thermal capacitance Cth. Then dT ns  0, since the clock frequency
greatly exceeds the ®lter's cut-off frequency and the differential heating power dPns ˆ Pn Ps balances the sensor's
asymmetric heat loss to the ¯ow. The modulator's bit-stream
output bns then represents the normalized differential power
dPns/Pref, where Pref is the power dissipated during a heat
pulse.
In a similar manner, the east±west temperature difference
is cancelled by a second TSD modulator which applies heat
pulses to either the east or west heaters.
Fig. 1. Schematic layout of a CMOS wind-sensor.
Fig. 2. Schematic cross-section of the packaged wind-sensor chip.
Fig. 3. Block diagram of the north±south differential TSD modulator.
K.A.A. Makinwa, J.H. Huijsing / Sensors and Actuators A 97±98 (2002) 15±20
17
Fig. 5. Block diagram of the comparator.
Fig. 4. Block diagram of the wind-sensor system.
3.2. System architecture
A block diagram of the wind-sensor system is shown in
Fig. 4. Each differential modulator consists of a latched
comparator, connected to each thermopile pair, which drives
the appropriate heaters via external switches (S2 or S3) from
a reference voltage Vref. The resistors Rnom (with a resistance
equal to the nominal heater resistance) stabilize heater
power dissipation against variations in heater resistance
due to temperature and process spread [5]. With S1 closed,
two of the four heaters will always be ``on'' at any given time
and, therefore, the total heat dissipated in the sensor will be
constant. The differential modulators thus operate the sensor
in a constant power (CP) mode.
The sensor may also be operated in a constant temperature
difference (CTD) mode, where it is maintained at a constant
overheat with respect to the ¯ow. Compared to operation
in CP mode, this results in improved transient response,
since the sensor's temperature no longer has to change
(and settle) in response to sudden changes in wind speed.
To facilitate operation in CTD mode, a voltage proportional
to the ¯ow temperature Tamb plus a constant overheat DT,
is generated with the help of an off-chip diode. Comparator
C1 then compares this voltage with the output of the onchip diode. This comparator, together with the thermal
®lter constituted by the entire chip, forms a third, common-mode TSD modulator that (via S1) interrupts the
CP heating process in such a way as to maintain T chip 
T amb ‡ DT.
4. Low-offset comparator design
4.1. Design considerations
For the differential modulators to operate correctly, the
comparator's input offset must lie within the output range of
the thermopile pairs. Since, silicon is a good thermal con-
ductor, the on-chip temperature differences are small (milliKelvins) and so are the thermopile signals (microvolts).
Thermal asymmetries introduced by the sensor's packaging
also introduce offset, typically equivalent to a comparator
offset of 20 mV [1]. In order to reduce comparator offset
below this level, an auto-zero scheme was used. As an added
bene®t, this scheme also eliminates 1/f noise.
4.2. Comparator architecture
The block diagram of the low-offset comparator is shown
in Fig. 5. It uses a classic architecture [10,11] in which the
output-referred offset of the ®rst stage and the input-referred
offset of the second stage are stored on the capacitors in an
auto-zero phase. The main source of residual offset is then
the mismatch in charge injection from the switches around
the second stage. A fully differential topology was used to
cope with the expected ground ``bounce'' produced by the
large heater currents. The input stage of the comparators
consists of large PMOS devices for low noise and low initial
offset. An output latch generates TTL-compatible levels and
holds the comparator's previous state during the auto-zero
phase.
5. Results
The wind sensor was implemented in a 1.6 mm CMOS
process, Fig. 6. The interface electronics dissipates about
1 mW from a 5 V supply. In contrast, the heaters dissipate
0.6 W when the sensor is operated in CP mode and between
0.4 and 0.6 W (depending on wind speed) when the sensor is
operated in CTD mode. Therefore, the heat produced by the
on-chip electronics does not interfere signi®cantly with the
sensor's operation.
A power spectrum of the output of a differential modulator (CP mode, zero ¯ow) is shown in Fig. 7. The
modulator clock frequency is 8192 Hz. The noise shaping
produced by the thermal low-pass ®lter is clearly visible. At
low frequencies, the ®lter's ®nite gain causes the quantization noise spectrum to ¯atten. No 1/f noise is visible,
demonstrating the effectiveness of the auto-zero scheme.
The non-zero dc component is due to mainly thermal
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K.A.A. Makinwa, J.H. Huijsing / Sensors and Actuators A 97±98 (2002) 15±20
Fig. 6. Chip photo of the wind-sensor (4 mm 4 mm).
Fig. 7. Hann windowed, 16 averaged, 32,768 point, power spectrum of
the bit-stream bns.
asymmetry in the sensor (it varies linearly with Pref). A
resolution of 11-bits relative to Pref (300 mW) in a 1 Hz
bandwidth was obtained. In contrast, the sensor has a
bandwidth (for ¯ow variations) of about 0.1 Hz [1].
For the wind tunnel tests, the sensor was built into the
aerodynamic housing of a commercial wind sensor [9]. The
resulting assembly is shown in Fig. 8, the ceramic disk
bearing the chip is mounted ¯ush with the upper surface of
the small inner disk. The two larger outer disks guide the
air¯ow over the inner disk in a well-de®ned manner. The
output of the differential modulators was decimated externally by a 5000-tap sinc2 ®lter, followed by a 10-tap movingaverage ®lter.
In CTD mode, the decimated modulator outputs are
sinusoidal functions of wind direction, Fig. 9. The amplitude
and offset of these functions are proportional to the square
root of ¯ow speed, Fig. 10. Using these relationships, wind
speed and direction were computed from the output of the
differential modulators [7]. The results are shown in Fig. 11.
It may be seen that the errors are random and less than 4%
and 28 in wind speed and direction, respectively. These
results are similar to the performance of similar sensors
using external interface electronics [8,9]. This shows that the
presence of the on-chip electronics does not affect the
performance of the sensor.
The sensor was also tested in CP mode, i.e. with the
common-mode modulator disabled. In this mode, the decimated modulator outputs are also sinusoidal functions of
wind direction. However, the sensor's amplitude characteristic, while remaining well de®ned and monotonic, is a more
complex function of wind speed than it is in CTD mode [12].
However, the errors in the computed wind speed and direction are similar.
Fig. 8. (a) Cross-sectional view of the wind-sensor; (b) external view of the wind sensor.
K.A.A. Makinwa, J.H. Huijsing / Sensors and Actuators A 97±98 (2002) 15±20
19
6. Conclusions
A ``smart'' wind-sensor has been realized in standard
CMOS technology. The on-chip interface electronics uses
thermal sigma-delta modulation techniques to control, and
simultaneously digitize the two-dimensional ¯ow-dependent heat distribution in the sensor. This interface architecture is low power and area ef®cient, and does not interfere
thermally with the sensor's operation or increase its chip
area. The interface's bit-stream output is decimated off-chip
and used to determine wind speed and direction. The results
are accurate to within 4% and 28 in wind speed and
direction, respectively, over the range 2±18 m/s.
Fig. 9. Decimated modulator output dPns (*) and dPew (‡) vs. flow
direction at speeds of 2, 8 and 18 m/s.
Acknowledgements
The authors thank the Dutch Technology Foundation
(STW) for their ®nancial support and Mierij Meteo B.V.
for their assistance with the wind tunnel experiments.
References
Fig. 10. Amplitude and offset of dPns (*) and dPew (‡) vs. the square
root of flow speed.
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Biographies
Fig. 11. Errors in computed wind speed and direction at wind speeds of 2,
8 and 18 m/s.
Kofi A.A. Makinwa was born on 3 April 1964. He studied at the Obafemi
Awolowo University, Ile-Ife, Nigeria, where he received a BSc degree (first
class honours) in 1985 and an MSc degree in 1988, both in electronic
20
K.A.A. Makinwa, J.H. Huijsing / Sensors and Actuators A 97±98 (2002) 15±20
engineering. He then proceeded to the Philips International Institute,
Eindhoven, The Netherlands where he received an MEE degree (with
distinction) in 1989. He began his working career in 1989 as a research
scientist at Philips Research Laboratories in Eindhoven, a position he held
until 1999. During this period, he developed electronic systems for
interactive displays, and for optical and magnetic storage systems. He is
currently at Delft University of Technology, Delft, The Netherlands where
he is working towards a PhD on integrated smart wind sensors. He is
author and co-author of 12 papers and holds 9 patents.
Johan H. Huijsing was born on 21 May 1938. He received the MSc
degree in electrical engineering from the Delft University of Technology,
Delft, The Netherlands in 1969, and the PhD degree from this university
in 1981 for his thesis on operational amplifiers. He has been an assistant
and Associate Professor in electronic instrumentation at the Faculty of
Electrical Engineering of the Delft University of Technology since
1969, where he is a Professor in the chair of Electronic Instrumentation
since 1990. From 1982 to 1983, he was a Senior Scientist at Philips
Research Laboratories in Sunnyvale, CA, USA. Since 1983, he is a
consultant for Philips, Sunnyvale and since 1998 also a consultant for
Maxim, Sunnyvale. The research of Johan H. Huijsing is focussed on
the systematic analysis and design of operational amplifiers, analog-todigital converters and integrated smart sensors. He is author and co-author
of some 200 scientific papers, 20 US patents and 6 books, and co-editor
of 8 books. He is a fellow of the IEEE, for contributions to the design
and analysis of analog integrated circuits. He was awarded the title of
Simon Stevin Meester for applied Research by the Dutch Technology
Foundation.
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