ADSP-21161 32-Bit SHARC DSP

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ADSP-21161
®
32-Bit SHARC DSP
High Performance for Price-Sensitive Applications
KEY FEATURES:
■
100 MHz (10 ns) SIMD SHARC
DSP core
■
600 MFLOPS (32-bit floatingpoint data), 600 MOPS (32-bit
fixed-point data)
■
■
Code-compatible with
ADSP-21x6x SHARC DSPs
Supports IEEE-compatible
32-bit floating-point, 40-bit
floating-point, and 32-bit fixedpoint
■
1 Mbit on-chip dual-ported
SRAM
■
2.4 Gbyte/sec on-chip data
bandwidth
■
systems, speech recognition, finger
second member of the SHARC
print recognition, digital audio
DSP family of 32-bit floating-point
broadcast, wireless infrastructure,
programmable DSPs to be based on
motor control, global positioning
a SIMD core architecture that is
systems, medical equipment,
optimized for digital signal pro-
telephony, and test equipment.
cessing performance. Like all
SHARCs, the ADSP-21161 is code-
fixed- and floating-point data types.
14 zero-overhead DMA
channels
The ADSP-21161 lowers the price
■
Serial ports support 128-channel TDM frames with selection
of companding on a perchannel basis
for SIMD SHARC DSP perform-
■
Integrated support for
SDRAM and SBSRAM external
memories
■
Support for single-cycle,
100 MHz instruction execution
from x48-bit wide external
memories
ance and is an outstanding DSP
solution for many price-sensitive
applications including audio,
THE BEST VALUE
SHARC DSP
The ADSP-21161 offers the best
value of any 32-bit floating-point
DSP with its performance, ease
of use and low cost. With a
100 MHz SIMD core, the
ADSP-21161 offers 600 MFLOPs
of performance balanced with
1 Mbit of on-chip memory and
ADSP-21161 SHARC DSP BLOCK DIAGRAM
Packing logic supports data
access and instruction fetch
from x8-, x16-, and x32-bit
width external memories
TIMER
CACHE
6
DAG 1
DAG 2
JTAG
1 MBIT
DUAL-PORTED
MEMORY
PROGRAM
SEQUENCER
12
GPIO
8
Two methods of integrated
multiprocessing support (external logic not required for
either)
■
SPI-compatible interface
■
Supported by an optimizing C
and C++ compiler
■
The ADSP-21161 DSP is the
of the family, and supports both
Four synchronous serial ports
2
with I S support
■
automotive PCs, automatic car
compatible with all other members
■
■
OVERVIEW
PM ADDRESS BUS
32
DM ADDRESS BUS
32
PM DATA BUS
64
DM DATA BUS
64
IOP
DATA
BUS
64
IOP
ADDRESS
BUS
18
EXTERNAL
PORT
24
HOST PORT
MULTIPROCESSOR
INTERFACE
32
5
DMA CONTROL
PROCESSING
ELEMENT X
PROCESSING
ELEMENT Y
REGISTER FILE
REGISTER FILE
I/O PROCESSOR
®
Supported by ADI’s VisualDSP
Development Tools
SDRAM
CONTROLLER
ALU
MULT
SHIFTER
ALU
MULT
SHIFTER
14 ZERO-OVERHEAD
DMA CHANNELS
16
SERIAL PORTS (4)
20
LINK PORTS (2)
4
SPI (1)
®
ANALOG
DEVICES
14 channels of zero-overhead
both C and assembly debugging.
Industry leading price/performance
DMAs. Floating-point support
Emulation support is JTAG-based
will be the driver on the other path
eases the design task by eliminating
and ADI offers USB, PCI, and
of the roadmap. In the future, these
overflow problems and providing
Ethernet-based emulators.
SHARC DSPs will offer an increase
results that match workstation
simulations. The ADSP-21161
SHARC DSP ROADMAP
lowers overall system cost with a
There are two code-compatible
high level of peripheral integration.
paths that the SHARC DSP road-
This minimizes the need for
map will follow. One optimized for
external support circuitry.
high-performance multiprocessing
systems, and the other for price/
DEVELOPMENT TOOLS
performance. Performance is the
The ADSP-21161 is supported
key for multiprocessing applications
by a complete set of software and
and this is the reason that ADI will
hardware development tools.
offer 10 GFLOP SHARC DSPs in
The VisualDSP tool set offered
the future. On-chip memory sizes
by Analog Devices includes an opti-
will be balanced to match this per-
mizing C/C++ compiler, integrated
formance with memories increasing
development environment (IDE),
to unprecedented levels (64 Mbit)
assembler, linker, splitter, and cycle-
using newly developed technologies.
®
accurate simulator that supports
MP
HP SHARC
¤ 10 GFLOPs
¤ 64 Mbits
¤ New MP support
S
CE
TIP
UL
M
RO
ADSP-21160M
¤ 600 MFLOPs
¤ 4 Mbits
¤ Intergrated MP
ADSP-21060
¤ 120-198 MFLOPs
¤ 0.5 - 4 Mbits Memory
ADSP-21161N
ADSP-21065
ADSP-21061
CO
LOW
$5.00. This is required to support
new technologies that demand substantial signal processing performance at consumer price points.
DSP SUPPORT:
Email:
In the U.S.A.: dsp.support@analog.com
In Europe: dsp.europe@analog.com
Fax: In the U.S.A.: 1 781 461-3010
In Europe: +49-89-76903-307
Web Address: http://www.analog.com/dsp
WORLDWIDE HEADQUARTERS
One Technology Way P.O. Box 9106
Norwood, MA 02062-9106, U.S.A.
Tel: 1 781 329 4700
(1 800 262 5643 U.S.A. only)
Fax: 1 781 326 8703
Worldwide Web Site: http://www.analog.com
JAPAN HEADQUARTERS
New Pier Takeshiba, South Tower Building
1-16-1 Kaigan, Minato-ku, Tokyo 105, Japan
Tel: +3 5402 8210; Fax: +3 5402 1063
SOUTHEAST ASIA HEADQUARTERS
4501 Nat West Tower, Times Square
Causeway Bay, Hong Kong, PRC
Tel: +2 506 9336; Fax: +2 506 4755
Low Cost
HP SHARC
ADSP-21062
while decreasing price to as low as
EUROPE HEADQUARTERS
Am Westpark 1-3
D-81373 München, Germany
Tel: +89 76903-0; Fax +89 76903-557
SHARC® DSP Roadmap
G
SIN
in performance to 1200 MFLOPs
¤ 1200 MFLOPs
¤ $5 SHARC
¤ 600 MFLOPs
¤ Price/performance
ST
As the industry’s leading multiprocessing DSP platform, SHARC® DSPs offer a code-compatible
roadmap from $5 to 10 GFLOPS.
© 2000 Analog Devices, Inc.
The ADI logo, SHARC logo, and VisualDSP logo are all registered trademarks of Analog Devices, Inc.
Printed in the U.S.A
H02171-10-9/00
ANALOG
DEVICES
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