Rad Tolerant CMOS Image Sensor Based on Hole Collection 4T

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Eprints ID: 8320
To link to this article: DOI: 10.1109/TNS.2012.2223486
URL: http://dx.doi.org/10.1109/TNS.2012.2223486
To cite this version: Place, Sébastien and Carrere, Jean-Pierre and
Allegret, Stephane and Magnan, Pierre and Goiffon, Vincent and Roy,
François Rad Tolerant CMOS Image Sensor Based on Hole Collection 4T
Pixel Pinned Photodiode. (2012) IEEE Transactions on Nuclear Science,
vol. 59 (n° 6). pp. 2888-2893. ISSN 0018-9499
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Rad Tolerant CMOS Image Sensor Based on Hole
Collection 4T Pixel Pinned Photodiode
Sébastien Place, Student Member, IEEE, Jean-Pierre Carrere, Stephane Allegret, Pierre Magnan, Member, IEEE,
Vincent Goiffon, Member, IEEE, and Francois Roy
Abstract—
pixel pitch CMOS Image sensors based on
hole collection pinned photodiode (HPD) have been irradiated
source. The HPD sensors exhibit much lower dark
with
current degradation than equivalent commercial sensors using an
Electron collection Pinned Photodiode (EPD). This hardness improvement is mainly attributed to carrier accumulation near the
interfaces induced by the generated positive charges in dielectrics.
The pre-eminence of this image sensor based on hole collection
pinned photodiode architectures in ionizing environments is
demonstrated.
Index Terms—Active pixel sensors, APS, CIS, CMOS 4T image
sensor, CMOS image sensors, dark current, hole collection pinned
photodiode, hole-based detector, pinned photodiode.
I. INTRODUCTION
T
HE use of commercial image sensors is considered in
many harsh environments, especially for the medical, scientific or spatial imaging applications [1]. This implies new
requirements for imagers designed for such applications, including that the CMOS image sensors (CIS) should become ionizing radiation tolerant. Four transistors (4T) pinned photodiode
pixel [2]–[5] has been established as the standard architecture
for high volume imaging applications. Up to now, some studies
focused on hardening-by-design pinned photodiode pixels have
been disclosed [6], [7]. The improvement brought by these techniques has been demonstrated experimentally. Moreover, the
drawbacks coming from these proposed design rules for ionizing radiation hardening could be photodiode area reduction or
charge to voltage conversion gain degradation.
Considering hole devices advantages over electron ones
demonstrated for common application [8], [9], it is proposed
in this paper to go further by investigating how hole collection
based on 4T pixel pinned photodiode architecture could be
a promising candidate for ionizing radiation tolerant image
sensor.
As dark current has been highlighted as the limitation factor,
dark current evolution of electron pinned photodiode (EPD) and
hole pinned photodiode (HPD) pixels with total ionizing dose
Fig. 1. Schematic representation of 4T CMOS pixel based on electrons detection (EPD).
(TID) is proposed all along this paper. A comparative analysis
of the degradation on both sensors is then used to demonstrate
the benefit of HPD sensors in ionizing environment.
II. DESCRIPTION OF 4T EPD AND HPD PIXEL ARCHITECTURES
Nowadays, most of the CMOS image sensors are based on 4T
pinned photodiode organization [3], [10]–[12]. The specificity
of this pixel architecture resides in the photodiode itself. It is
called a pinned photodiode, which consists, in a shallow buried
N-type photodiode pinched by two opposite doping layers represented in Fig. 1. To allow charge transfer in a readout node
called the sense node (SN), a charge transfer gate (TG) transistor is used to manage the signal charge pass through. This
EPD device uses electrons as signal charges and embeds NMOS
transistors. This means that an in-pixel charge to voltage conversion is used and associated to an in-pixel source follower (SF)
MOSFET. The readout is selectively done all along the matrix
with a line access transistor, the readout transistor (RD). The
reset cycle of the sense node is done by another transistor called
reset transistor (RST).
Hole charge collection pinned photodiode coupled to dedicated PMOS transistors is also worth considering to achieve
image sensor. Such pixel has been called PMOS pixel or HPD,
and has been introduced in [8], [9] for its promising performances in dark current, cross-talk and temporal noise.
In HPD architecture, as described in Fig. 2, all doping types
have to be inverted in the pixel. For example, pinned photodiode doping species have to be switched from P to N-type for
pinning surface layer all along the Si/SiO interfaces, and from
N to P-type for photodiode charge storage zone. The transfer
gate works as PMOS transistor with P type doped sensing node.
Fig. 3. Cross-sections of PMDfets realized with (a) NMOS and (b) PMOS
pixels processes.
Fig. 2. Schematic representation of 4T CMOS pixel based on holes detection
(HPD).
In the same way, in —pixel MOS transistors type has been
switched from N-type to P-type by playing with implantation
species. The HPD pixel architecture can be declined as a process
option without any pixel design modifications.
Contrary to standard EPD sensors, transistor gate in HPD matrices have to be biased with high voltages to switch off and
low voltages to switch on. However, timing diagram remains
unchanged.
III. IONIZING IRRADIATION CONDITIONS
Fig. 4. PMOS-type PMDfets characteristics with TID.
The tested sensors and evaluation devices (described in each
corresponding section) have been exposed to
gamma ray
source at the Université Catholique de Louvain (UCL). The dose
rate used was
. For practical reasons, each device was exposed grounded and at room temperature to five different TID: 3, 10, 30, 100, and
. The influence
of pixel operating condition has not been taken into account in
this study.
IV. ESTIMATION OF HPD PIXEL INTEREST
RADIATION HARDENING
FOR IONIZING
A preliminary study is proposed through elementary test
structures to point out the different advantages under irradiation
of hole collection pinned photodiodes. TID degradations in
CMOS integrated circuits are known to be located in the sensor
dielectrics [13]. Considering our pixel, two major dielectrics
have been identified: the pre metal dielectric (PMD) located directly on the top of the photodiode and the deep trench isolation
(DTI) used to isolate physically the neighboring pixels [14].
Several studies ([15], [16]) make use of dedicated structures to
characterize these material properties under irradiation. To do
so, thick dielectrics such as PMD can be used as gate oxide on
specific transistors, called PMDFETs and described for NMOS
and PMOS processes in Fig. 3.
Such evaluation structures were designed with large
aspect ratio to compensate the low
values because of the important thickness of Pre Metal
Dielectrics (PMD). Each transistor was irradiated according to
the same conditions of doses specified in part III. During the
Fig. 5. NMOS-type PMDfets characteristics with TID.
irradiation, the devices were grounded since the PMD stack
above the pinned photodiode is not biased in an operated 4T
CIS pixel (Pinned photodiode (PPD) electric field lines do
not penetrate the PMD thanks to the pinning layer). Results
are presented for PMOS and NMOS-type PMDFETs in linear
regime
in Figs. 4 and 5.
Figs. 4 and 5 show that variations on threshold voltages can
be clearly seen on both devices. The subthreshold slopes are also
degraded but the variations are more difficult to notice directly
on these plots.
Oxide traps and interface traps densities (
and
) can be extracted from these variations thanks to
TABLE I
SUMMARY OF TRAP DENSITIES DEGRADATION WITH TID
well-known methodologies [17].
NMOS/PMOS transistors by:
and
TABLE II
SUMMARY OF PIXEL PHYSICAL DESCRIPTION
are given for
(1)
(2)
with
the sub threshold slope change and
the
threshold voltage change respectively for NMOS/PMOS transistors,
the Fermi potential for
type material,
the oxide capacitance, q the Coulomb charge, k the Boltzmann
constant and T the device temperature.
On one hand,
and
increases have a cumulative effects on
degradation on PMOS transistors whereas they
compensate each other in NMOS PMDFETs. However, both device degradations are dominated by the generation of positive
charges in PMD dielectric. The evaluation of traps densities is
presented in Table I for the last two TID.
These results illustrate that pre metal dielectrics store the
same quantities of charges during the irradiation for both transistors. A difference is observed on interface states densities
suggesting a larger degradation in PMOS PMD devices. It
should be emphasized that the behavior of the other dielectrics
surrounding the pinned photodiode (i.e., the DTI) are supposed
to be similar after irradiation (same trends and same conclusions, but possibly different defect density values).
V. IONIZING RADIATION INDUCED DARK CURRENT INCREASE:
COMPARISON BETWEEN HPD AND EPD SENSORS
Fig. 6. Normalized dark current degradation between (a) EPD and (b) HPD
sensors. (The same normalization factor has been used for all the plots).
A. Tested Image Sensor Details
B. Ionizing Radiation Induced Dark Current Degradation
Both types of three megapixel sensors have been manufactured with the same masks (i.e., identical sensor design)
but with dedicated 90 nm CMOS imaging technology node
processes: one for EPD and the other for HPD. The N-type
pixel image sensor is based on standard STMicroelectronics
CIS processes while the P-type pixel image sensor have been
processed thanks to modified pixel doping implantation by
switching doping species and reengineering net doping profile.
Technological choices, summarized in Table II, include specific
process dedicated to image quality improvement for a
pixel pitch, such as DTI [14] or optical stack reduction. DTI are
needed to minimize electrical crosstalk which becomes more
and more important as the pixel pitch is scaling down.
The evolution of dark current distribution with TID is presented respectively on Fig. 6(a) for the N-type pinned photodiode and Fig. 6(b) for the P-type.
Measurements were performed in a dark test chamber at a
regulated temperature of
. All dark current values have
been normalized with the same factor, so both behaviors appear
on the same scale. Moreover, the electron collection and hole
collection pinned photodiode sensor have a dark current unbalanced of less than 10% before irradiation. A statistical analysis
of dark current is performed on 400 kpixels subsamples.
As expected from previous results on a similar EPD CIS [18],
the EPD dark current distribution shifts toward large dark current values after each TID step [Fig. 6(a)].
Fig. 8. Evolution of TG dark current amplitude modulation with TID on EPD.
Fig. 7. Image on hole-based CMOS image sensors after
.
As regards the HPD sensor [Fig. 6(b)], unlike the EPD behavior, the HPD dark current distribution does not change significantly from 0 to
. Beyond
,
the average dark current value increases slightly with TID. The
most striking result is much lower degradation of the P type
pinned photodiode at highest doses with a dark current ratio of
40 for
and 20 to
between HPD
and EPD.
The same conclusion has been observed for the dark signal
non uniformity (DSNU) parameter. Even though HPD DSNU is
slightly larger than the EPD before irradiation, the DSNU degradation rate due to ionizing radiation is also in favor of HPD and
as from
the HPD dark current standard deviation is lower than EPD one. Finally, the complete functionality
of HPD after
irradiation is shown on image in
Fig. 7.
A. Silicon/Silicon Oxide Interface State Characterization
To compare HPD and EPD pixel dark current degradation due
to surface charge generation rate increase, the interface states
density degradation have to be characterized. Proposed method
is based on transfer gate interface charge generation rate modulated (from accumulation to depletion regime) by TG operating
voltage [21] for respective TID.
TG contribution on dark current value can be extracted by
suppressing, from total current, the photodiode component evaluated in strong accumulation as explained in [21]. TG is then
considered depleted when it reaches a peak value, as plotted in
Fig. 8. The methodology is described in [21], [22], TG contribution behaves as a Gated Diode with VloTG bias. VloTG is here
the low level value of the TG pulse. Its peak value is modeled
according to the law
(3)
with the surface recombination velocity
(4)
VI. DISCUSSION
Under ionizing environments, two main phenomena were
occurring in the dielectrics surrounding the silicon photodiode
[19]: positive fixed charges are generated in the dielectric
surrounding active devices, and Silicon/Silicon Oxide interface
states are increased.
To discuss the direct impact of positive fixed charges, an Arrhenius dark current analysis was first extracted for the both sensors at ionizing doses beyond
. Activation energies of 1.27 eV for EPD and 1.17 eV for HPD have been measured. These measures were extracted on four points from 25 to
. Thermal accuracy is guaranteed with more or less
.
This means that the main degradation scheme is still dominated
on both sensors by diffusion currents mechanism [20]. As a consequence,
interfaces around the diode are not electrically depleted, as explained in [18], because the activation energy in this case would be characteristic of the thermal generation, with activation energies around 0.65 eV.
On top of this preliminary evidence on thermal response,
more in depth sources of degradations than positive fixed
charges are investigated and, as mentioned before, investigation about interface state degradation should be performed.
and
(5)
is the surface state density per unit of energy,
the
depleted area beneath TG,
the intrinsic carrier density,
the thermal velocity and the capture cross-section.
Experimentally, the influence of the depleted TG on dark current at respective TID step is extracted by computing the difference between the maximum and minimum values of the curve,
and is illustrated in Fig. 8. The ratios of TG dark current amplitudes between irradiated samples and preirradiated value provide the trend of Silicon/Silicon oxide interface degradation in
respect with charge generation rate rising under TG channel.
B. Correlation Between TG Charge Generation Rate and
Mean Dark Current Values for EPD and HPD
The charge generation rate evolution (related to interface
states density increase) on EPD and HPD is finally plotted in
Fig. 9, as well as the normalized mean dark current values
for both sensors. Normalized charge generation rate related to
add up with the interface state degradation to cause a large
increase of mean dark current, especially after
.
Inversely, for HPD, the generated positive charges in
dielectrics will increase electrons density at the
interfaces. It is assumed that the effective electron density increase
for HPD at the
interface should partially compensate
the higher interface states density. It can be illustrated by the
Janesick’s model of dark current induced by P-doped interfaces
[20]:
(6)
Fig. 9. Evolution of normalized surface recombination velocity with TID comparatively with EPD and HPD behaviors.
with p the effective majority carrier density at the interface,
the doped interface area and the surface recombination velocity
defined this time by
(7)
Applied to HPD, adapted formula (7) for N-doped interface
describes how
increase will be balanced by its effective electron density (n) increase at the interface
(8)
Fig. 10. Cross-section of 4T pinned photodiode with depleted interfaces both
on top and lateral interfaces.
interface states density increase of TG gate oxide seems qualitatively well correlated with the major part of the degradation
beyond
for both sensors. This graph highlights
the dark current degradation factor versus respective interface
state density increase. This degradation factor is much more
important for the EPD compared to HPD. These deviations will
be discussed more in details in the following part.
C. Physical Mechanisms in the Improved Radiation Hardness
of HPD Sensors
This drastic difference in dark current trend could be explained by the photodiode pinning layer type choice. Based
on electrons collection, the EPD is built on N-type storage
charge layer pinned by surrounding P-type electrode. In a
complementary way the HPD is built on P-type storage charge
layer pinned by surrounding N-type electrode. The photodiode
pinning layers coupled to the storage layers are designed to
manage the photodiode as a fully depleted electrostatic well
and to contain the dark current generation rate at the
interface. Assuming that total ionizing dose defects like positive charge buildup in oxide and interface defect creation are in
the same order of magnitude, positive fixed charges build-up
in dielectrics surrounding the diode will have a beneficial
electrostatic effect on HPD through electrons concentration
increase at the interface. In the opposite way, same amount
of positive charges in dielectrics for EPD will decrease hole
concentration at the
interfaces, doped with
pinning
layer, leading to surface dark current generation containment
relaxation. Thus, as illustrated on Fig. 10, the resulting hole
effective density decrease along
interface should
This results in a much lower dark current increase, depicted
in Fig. 9.
Moreover, the hole capture cross-section should be weaker
than electron ones: Glunz reported a ratio of 100 between these
parameters [23]. It could also explain a similar gap on dark
current’s diffusion components between EPD and HPD pixels.
As well, some evidence on process conditions such as N-type
species segregation [8] strengthen dark current reduction induced by
interfaces for HPD.
VII. CONCLUSION
Hole based CMOS image sensors have been irradiated with
a
source related to space environment doses. First results
on elementary test structures demonstrated that positive charge
accumulation in Pre Metal Dielectrics induced a field effect
at the interface, which can be used as benefit in HPD CIS to
balance interface state degradation by improving electron accumulation surface density at the PMD interface. This mechanism can be generalized to all dielectrics surrounding the photodiode. TID induced dark current increases in HPD sensors are
reduced compared to its EPD equivalent. Both sensors report a
significant increase beyond
coming from interface states density increase. On HPD, this degradation is held
back thanks the increase of electrons carrier density at the interface induced by positive charge buildup in oxide. This mechanism, advantageous for hole collection pinned diode, is detrimental for electron collection pinned diode. Thus, hole collection pinned photodiode is revealed as an attractive way to improve ionizing radiation tolerance of CMOS image sensors. This
silicon manufacturing solution is also compatible with small
pixel, whereas design hardening solutions often need large pixel
sizes. Finally, positive charges accumulation in dielectrics could
be a key point for promoting hole collection pinned photodiode
pixel technology on applications in strong ionizing environments, releasing all dose constraints related to depletion phenomena at the interfaces. In future works, it would be interesting
to quantify the effect of HPD sensors biasing during irradiation
and also to check the stability of positive charge build up inside
dielectrics.
ACKNOWLEDGMENT
The authors would like to thank process integration and
imaging characterization teams for their support on technological aspects and characterization technics and G. Berger
from the Université Catholique de Louvain for irradiation
campaigns.
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