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Microelectronic Circuits 4/e
©1999 Oxford University Press.
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Fig. 1.13 An amplifier transfer characteristic that is linear except for output saturation.
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Fig. 1.14 (a) An amplifier transfer characteristic that shows considerable nonlinearity. (b) To obtain linear operation the amplifier is
biased as shown, and the signal amplitude is kept small.
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Fig. 1.23 (a) Magnitude and (b) phase response of STC networks of the low-pass type.
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Fig. 1.24 (a) Magnitude and (b) phase response of STC networks of the high-pass type.
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Fig. 2.4 The inverting closed-loop configuration.
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Fig. 2.5 Analysis of the inverting configuration
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Fig. 2.21 A difference amplifier.
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Fig. 2.22 Applications of superposition to the analysis of the current circuit of Fig.. 2.21.
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Fig. 2.23 Finding the input resistance of the difference amplifier.
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Fig. 2.24 Representation of the common-mode and differential components of the input signal to a difference amplifier. Note that v1 =
vCM - vd/2 and v2 = vCM + vd/2.
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Fig. 2.25 (a) A popular circuit for an instrumentation amplifier. (b) Analysis of the circuit in (a) assuming ideal op-amps. (c) To make
the gain variable, R1 is implemented as the series combination of a fixed resister R1f and a variable resistor R1v. Resistor R1f ensures that
the maximum available gain is limited.
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Fig. 2.26 Open-loop gain of a typical general-purpose internally compensated op amp.
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Fig. 2.29 (a) Unity-gain follower. (b) Input step waveform. (c) Linearly rising output waveform obtained when the amplifier is slewrate limited. (d) Exponentially rising output waveform obtained when V is sufficiently small so that the initial slope (wtV) is smaller
then or equal to SR.
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Fig. 2.30 Effect of slew-rate limiting on output sinusoidal waveforms.
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Fig. 3.1 The ideal diode: (a) diode circuit symbol; (b) i-v characteristic; (c) equivalent circuit in the reverse direction; (d) equivalent
circuit in the forward direction.
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Fig. 3.3 (a) Rectifier circuit. (b) Input waveform. (c) Equivalent circuit when (d) Equivalent circuit when v1  0 (e) Output
waveform.
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Fig. 3.7 The i-v characteristic of a silicon junction diode.
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Fig. 3.8 The diode i-v relationship with some scales expanded and others compressed in order to reveal details.
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Fig. 3.10 Simplified physical structure of the junction diode. (Actual geometries are given on Appendix A.)
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Fig. 3.12 (a) The pn junction with no applied voltage (open-circuited terminals). (b) The potential distribution along an axis
perpendicular to the junction.
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Fig. 3.13 The pn junction excited by a constant-current source I in the reverse direction. To avoid breakdown, I is kept smaller than Is.
Note that the depletion layer widens and the barrier voltage increases by Vr volts, which appears between the terminals as a reverse
voltage.
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Fig. 3.14 The charge stored on either side of the depletion layer as a function of the reverse voltage Vr.
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Fig. 3.16 The pn junction excited by a constant-current source supplying a current I in the forward direction. The depletion layer
narrows and the barrier voltage decreases by V volts, which appears as an external voltage in the forward direction.
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Fig. 3.17 Minority-carrier distribution in a forward-biased pn junction. It is assumed that the p region is more heavily doped than the
n region; NA  ND.
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Fig. 3.18 A simple diode circuit.
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Fig. 3.19 Graphical analysis of the circuit in Fig. 3.18.
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Fig. 3.20 Approximating the diode forward characteristic with two straight lines.
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Fig. 3.21 Piecewise-linear model of the diode forward characteristic and its equivalent circuit representation.
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Fig. 3.23 Development of the constant-voltage-drop model of the diode forward characteristics. A vertical straight line (b) is used to
approximate the fast-rising exponential.
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Fig. 3.24 The constant-voltage-drop model of the diode forward characteristic and its equivalent circuit representation.
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Fig. 3.25 Development of the diode small-signal model. Note that the numerical values shown are for a diode with n = 2.
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Fig. 3.26 Equivalent circuit model for the diode for small changes around bias point Q. The incremental resistance rd is the inverse of
the slope of the tangent at Q, and VD0 is the intercept of the tangent on the vD axis (see Fig. 3.25).
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Fig. 3.27 The analysis of the circuit in (a), which contains both dc and signal quantities, can be performed by replacing the diode with
the model of Fig. 3.26, as shown in (b). This allows separating the dc analysis [the circuit in (c)] from the signal analysis [the circuit in
(d)].
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Fig. 3.30 Circuit symbol for a zener diode.
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Fig. 3.31 The diode i-v characteristic with the breakdown region shown in some detail.
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Fig. 3.32 Model for the zener diode.
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Fig. 3.36 Block diagram of a dc power supply.
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Fig. 3.37 (a) Half-wave rectifier. (b) Equivalent circuit of the half-wave rectifier with the diode replaced with its battery-plusresistance model. (c) transfer characteristic of the rectifier circuit. (d) Input and output waveforms, assuming that rD  R.
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Fig. 3.38 Full-wave rectifier utilizing a transformer with a center-tapped secondary winding. (a) Circuit. (b) Transfer characteristic
assuming a constant-voltage-drop model for the diodes. (c) Input and output waveforms.
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Fig. 3.39 The bridge rectifier: (a) circuit and (b) input and output waveforms.
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Fig. 3.41 Voltage and current waveforms in the peak rectifier circuit with CR  T. The diode is assumed ideal.
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Fig. 3.46 A variety of basic limiting circuits.
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