ENGG*4420 Real Time System Design Lab 4: Multi-core Real-Time Suspension Controller using LabVIEW RTOS TA: Aws Abu-Khudhair (aabukhud@uoguelph.ca) Due: Week of Nov. 30th Aws Abu-Khudhair ENGG*4420 1 Today’s Activities Lab 4 Introduction. Lab 3 Demos. Start work on Lab 4. Aws Abu-Khudhair ENGG*4420 2 Lab 4 Development Environment Host PC (HP) Target Quad-Core PC (Dell) NI PCI-6229 DAQ LabVIEW 2009 software Standard Module. Real-Time Development Module Trace Execution Toolkit Aws Abu-Khudhair ENGG*4420 3 Lab 4 Requirements The final goal of lab 4 is to implement a half-car vehicle suspension system model using the quarter-car suspension implemented in lab 2. The implementation is divided into two main components: RT Target PC: LQR control system Host PC: Half-Car suspension system plant model. Aws Abu-Khudhair ENGG*4420 4 Lab 4 Architecture Aws Abu-Khudhair ENGG*4420 5 Half-Car Suspension Model Host PC Implementation Road Disturbance Half-Car Suspension system System States Front Quarter-Car Suspension Rear Quarter-Car Suspension Communication and Synchronization Task Damping Coefficients DAQmx Host PC Implementation Two quarter-car models representing the front and rear suspension systems. Road profile input Generated using a time-delayed sine wave. Assume that the rear suspension is 2 samples behind the front suspension. The ride quality of the half-car body must be calculated using equation 2.27 in the lab manual. Real-Time Target PC Implementation Real-Time Target PC Implementation Implement two separate LQR controllers using the equation 2.14 of the manual. Each of the LQR controller must execute on a dedicated CPU. The communication and synchronization task must have it’s own dedicated CPU. Communication between the various tasks must be implemented using Real-Time FIFOs. Host/Target Communication You have the following channels for use in your implementation: Host PC: 2 Analog Outputs 2 Analog Inputs 1 Digital Output Target PC: 2 Analog Outputs 2 Analog Inputs 1 Digital Input Note: You’ll need to handle timing to try and make sure your transmissions are not delayed and data sets are not separated. ENGG*4420 Lab 4 11 Lab 4 – Requirements/Steps Step 1: Configure your target computer in NIMax (slide 22) Step 2: Setup your project file (slide 25) Step 3: On the Host PC implement the halfcar suspension system by duplicating your quarter-car suspension model from Lab 2. Lab 4 – Requirements/Steps cont. Step 4: Review the DAQmx examples in LabVIEW. Step 5: Build the synchronization and communication process between the plant system and controller using the DAQmx interface. Communication must be implemented using the two connection blocks. Task communication must be performed using queues on the host PC, and Real-Time FIFOs on the RT target PC Step 6: On the target PC implement two LQR controllers each occupying a dedicated CPU (one for each suspension system) Lab 4 – Requirements/Steps cont. Step 7: Test the correctness of your designs operation using: Expected SASS response. The Performance Profiler (slide 42). RT System Manager (slide 44). The Execution Trace Toolkit (slide 48). Step 8: Experiment with changing parameters such as: Loop priority, Timing, processor allocation, and SubVI priority, and observe the behavior of your design using the RTSM and the RTETT. ENGG*4420 Lab 4 14 Lab 4 Demo Requirements For the demo the following are some of the aspects that will be examined: Model Response (both with and without semiactive control) Communication between the host and target Understanding of the implementation layout in LabVIEW. Understanding of the Execution Trace Toolkit figures. LabVIEW RT Concepts ENGG*4420 Lab 4 15 Lab 4 Report Requirements 1. Introduction: 2. Briefly describe the problem (i.e. what system are you implementing, why is control required, difference from implementation in lab 2, etc…) System Requirements. Implementation: Equipment used. Short overview of the benefits of using the LV RTOS. Present your designed control strategy, discuss the number of cores used, and which tasks will be allocated on which core. Also, present your proposed communication method. ENGG*4420 Lab 4 16 Lab 4 Report Requirements cont. 2. Implementation Cont. Present your LabVIEW implementation of the system. Similar to the lab three report, you do not need to document the theory behind your implementation. You should, however, note where each major component is in your implementation (i.e. what’s located on the host, what’s on the target, etc.). Make sure you document how communication is being performed. Fully document your LabVIEW code, include screen shots of the implementation when explaining the various components. ENGG*4420 Lab 4 17 Lab 4 Report Requirements cont. 3. Simulation/Results Simulation results – document your system’s performance under various configurations. Timing and CPU usage can be obtained using the performance analyzer, the RTSM and the RTETT. Experiment with changing the periods of the loops, processor allocation, and assigned VI and loop priorities. Use figures where appropriate to document the results (e.g. RTSM usage graph, and VI/Thread execution graphs from the RTETT). ENGG*4420 Lab 4 18 Lab 4 Report Requirements cont. 3. Simulation/Results cont. Discuss any changes that need to be made to your design to obtain a better system performance in terms of the memory consumption, CPU performance, Core allocation, etc. Replace the Timed loops in the implementation with standard while loops and comment of any change in performance (use figures from the RTETT). ENGG*4420 Lab 4 19 Lab 4 Report Requirements cont. 4. Conclusion: Provide a brief concluding statements on the lab based upon your implementation and the observed effects of varying parameters. This section should be clear and concise. ENGG*4420 Lab 4 20 Deadlines and Marking Lab 2 is worth 12%. 6% for the report, and 6% for the demo The Demo is due Nov. 30th, 2010 in the Lab. The Report is due Nov. 30th, 2010 in the Lab. A signed group evaluation sheet must be submitted with the lab report QUESTIONS? Aws Abu-Khudhair ENGG*4420 21 Target Configuration Step 1: Open NI- Measurement and Automation (NIMax) on the host computer and expand the remote systems tab. Find your un-configured target. Step 2: Go to the network settings to configure the target name and IP address. Step 3: Enter a valid Target Name under the target identification. Step 4: Choose ‘Obtain an IP address automatically’ under the IP settings. ENGG*4420 Lab 4 22 Target Configuration cont. ENGG*4420 Lab 4 23 Target Configuration cont. Step 5: Click “Apply” and choose to restart the target. Step 6: After allowing the target to reboot, look for the name you chose for your target under ‘Remote Systems’ in NIMax. At this point your target PC should have rebooted into LabVIEW RT and is ready to be added as a target PC to your project. ENGG*4420 Lab 4 24 Creating a LabVIEW RT Project Step 1: Create a Real-Time Project. Step 2: Select the ‘Continuous communication architecture’ ENGG*4420 Lab 4 25 Creating a LabVIEW RT Project cont. Step 3: Add your configured target PC to your project. ENGG*4420 Lab 4 26 Project Organization You can experiment with the organization of your project to find what you feel works best. Note that priorities can be set at the VI level (I.E. “Time-Critical”, “Normal”, etc..) and in timed loops running within a VI. Group similar tasks together. Start off making use of three cores and change the allocations later as you see fit. ENGG*4420 Lab 4 27 Useful Tools SubVIs: used to build frequently used functions that can later be added to the main VI. Global and Shared Variables: used to move data between loops and VIs. DAQmx channels and tasks for connected devices: used to move data between the host and target PCs. ENGG*4420 Lab 4 28 Useful Tools ENGG*4420 Lab 4 29 Creating SubVI SubVIs can be created as functions to be used in the main VI. These subVIs can have their own priorities predefined (default priority is ‘Normal’). To create your own VI: Build you function on the block diagram. Right click the VI icon on the top left corner of the front panel. From here you can define the terminal the VI needs, and the shape of the icon. Drag your newly created subVI onto your main block diagram. Remember that by default the VIs are not set for reentrant execution. ENGG*4420 Lab 4 30 Creating SubVI cont. ENGG*4420 Lab 4 Right click icon to get VI related options 31 VI Properties VI properties can be set by going to “File””VI Properties”. You can set then enable debugging (active by default) and set them as normal or time-critical. Most needed options can be found under “execution” ENGG*4420 Lab 4 32 Useful Structures - Communication In order to send and receive data, you’ll need to setup NI-DAQmx tasks. To do this, right click on the desired PC (host or target) and go to “New DAQmx task”. Configuration is then performed in the same fashion as using a DAQ assistant. You can then drag the configured channel or task on to the block diagram. ENGG*4420 Lab 4 33 Useful Structures - Communication Right-clicking on the channel or task will give you the option to access the DAQmx pallet where you can find the blocks for both reading and writing. The configured channel/task can then be connected as shown below. ENGG*4420 Lab 4 34 Useful Structures – Timed Loops Within a VI, timed loops can be placed. The loops can be configured to have different priorities, execution periods, and processor allocations. Double click the left terminal to get the configuration window ENGG*4420 Lab 4 35 Useful Structures – Timed Loops Useful Link: http://www.ni.com/swf/presentation/us/labview/timeloop/ ENGG*4420 Lab 4 36 Passing Data Between Threads Data should be passed between tasks and timed loops using one of the following methods: Global Variables Good Functional global Variables Better RT FIFO VIs Best method. **See the LabVIEW RT Manual pg. 3-34** ENGG*4420 Lab 4 37 Global Variables (GVs) Shared resource can cause jitter Global variables may be written to many times before being read. Using GVs in time-critical tasks can compromise determinism. If one task accesses the variable, no other task can access it until the first task releases the variable, hence the second task will be forced to wait, therefore introducing jitter. ENGG*4420 Lab 4 38 Functional Global Variables (FGVs) Avoid shared resource problems by using FGVs. Can have several inputs and outputs. Allows for a ‘skip if busy’ function. Functional global variables can be a lossy form of communication, if a VI overwrites the shift register data before another VI reads the data. ENGG*4420 Lab 4 39 Real-Time FIFO (RT-FIFO) Best method of communication. Ensures determinism of time-critical tasks. Uses fixed buffer size. An RT-FIFO can be a lossy communication method. When the FIFO gets full, the system starts to overwrite the old data. ENGG*4420 Lab 4 40 Performance Analysis LabVIEW Real-Time has several tools that can be used to evaluate the performance and response of your system. Performance Profiler Real-Time Systems Manager Real-Time Execution Trace Toolkit Note that your application needs to be running on the target for any performance metrics to be recorded. ENGG*4420 Lab 4 41 Performance Profiler Can be used to track the timing statistics of both main and sub VIs. The performance profiler can also be used to track the memory usage of a given part of the application. It can be opened by going to “Tools Profile Performance and Memory” ENGG*4420 Lab 4 42 Performance Profiler ENGG*4420 Lab 4 43 Real-Time Systems Manager (RTSM) The RTSM can be used to track the proportional CPU usage of each processor. It can also be used to start and stop toplevel VIs during execution on the target to evaluate the effects on CPU load. The RTSM runs on the host computer and receives information from the target during operation. ENGG*4420 Lab 4 44 Real-Time Systems Manager (RTSM) cont. The RTSM can be found under “Tools Real-Time Module System Manager”. ENGG*4420 Lab 4 45 RTSM configuration In order to use the RTSM, you need to configure TCP/IP communication between the target and host computers. Under the properties of the target computer, make sure that TCP/IP is enabled in the “VI Server: Configuration” menu. Add the host’s IP address (this can be checked using “ipconfig/all”) to the list of permitted machines under the “VI Server: Machine Access” menu. ENGG*4420 Lab 4 46 RTSM configuration ENGG*4420 Lab 4 47 Real-Time Execution Toolkit Use the Execution Trace Toolkit to capture the timing and execution data of VIs and thread events for your implementation. In LabVIEW select “Tools Real-Time Execution Trace Toolkit”. Before you use the toolkit to observe your application performance, go through the toolkit examples in “Help Open Example Session” in the RTETT window. For examples on how to use the toolkit see the context help of the toolkit Vis (search Execution Trace in the LabVIEW function pallet) ENGG*4420 Lab 4 48 Real-Time Execution Toolkit ENGG*4420 Lab 4 49