SystemC: Introduction SystemC A C++ based class library and design environment for system-level design. Suitable for functional description that might eventually be implemented as either HW or SW. Open standard www.systemc.org Language Architecture Channels for MoCs Methodology-specific Channels Kahn process networks, SDF, etc Master/Slave library Elementary Channels Signal, Timer, Mutex, Semaphore, FIFO, etc Core Language Data types Module Ports Processes Events Interfaces Channels Event-driven simulation kernel Bits and bit-vectors Arbitrary precision integers Fixed-point numbers 4-valued logic types, logic-vectors C++ user defined types C++ Language Standard Glossary Module Basic building block for structural partitioning Contains ports, processes, data Other modules Process Basic specification mechanism for functional description Three types • sc_method : sensitive to some ports/signals, no wait statements • sc_thread: sensitive to some ports/signals with wait statements • sc_cthread: sensitive to only clock Glossary Interface Port A set of operations for communication No specification about the actual implementation For example, a signal supports read and write operations Explicit objects for inter-module communication Each port object specifies the interface for communication Channel An implementation of the interface operations Performs the actual data transfer Vary from signals to complex protocols. Module Module is the basic building block in SystemC SystemC has a macro for convenient module definition Macro name : SC_MODULE Macro implements C++ class inheritance SC_MODULE(adder) { // ports, processes, internal data }; struct adder: SC_MODULE { // ports, processes, internal data }; Module constructor Module constructor also defined with another macro Macro name : SC_CTOR SC_CTOR must have module name as an argument SC_MODULE(adder) { // ports, processes, internal data SC_CTOR(adder) { // body of constructor // process declaration, sensitivities etc } }; Module constructor User can also define own constructor Must include SC_HAS_PROCESS macro to define processes SC_MODULE(adder) { // ports, processes, internal data SC_HAS_PROCESS(adder); adder(sc_module_name name; int other_param): sc_module(name){ // body of constructor // process declaration, sensitivities etc } }; Interface Consists of a set of operations Specifies only the signature of an operation name, parameter, return value All SystemC interfaces derived from sc_interface Contains a virtual function called register_port() • Connects a port to a channel through the interface • Arguments: port object and type name of the interface that port accepts Interface HW signal interfaces sc_signal_in_if<T> • Contains virtual function read() • read() returns a constant reference to T such that value may be read sc_signal_inout_if<T> • Derived from sc_signal_in_if<T> • Contains virtual function write() • write() takes as input a constant reference to T HW signal interfaces provide the functions that are implemented by channel Port Ports provide the well-defined boundaries through which the module interacts Implicit interfaces such a global variable must be avoided Ports specify the interface that it uses through a template parameter All ports are derived from sc_port_base class Port SystemC provides a template class for creating ports template <class IF, int N = 1> class sc_port: ……// class derivation details omitted { public : IF* operator->(); // other member functions and member variables }; “IF” denotes the interface class N is the number of interfaces attached to the port Default value of 1 Port Most prominent member of sc_port is operator->() Returns a pointer to the interface Any interface method can be invoked through the port read() and write() below are interface method calls sc_port<sc_signal_inout_if<int> > p; …… x = p->read(); ….. p->write(y); Port User can derive specialized ports from sc_port class Signal ports are provided by SystemC template<class T> class sc_in : public sc_port<sc_signal_in_if<T> > …; template<class T> class sc_inout : public sc_port<sc_signal_inout_if<T> > …; Port and Module SC_MODULE(adder) { sc_in<int> a; sc_in<int> b; sc_out<int> c; // processes, etc SC_CTOR(adder) { // body of constructor // process declaration, sensitivities etc c.initialize(0); } }; Channel Port and Interface describe the functions available in the communication package Channel defines the implementation of the communication functions Channel is derived from the interface It implements the interface if it defines all the interface functions More than one Channel might implement that same interface in different ways A Channel might implement more than one interface Channel SystemC Primitive channels Hierarchical channels Primitive provides for channel Examples: sc_signal, sc_mutex, sc_fifo Hierarchical channel User defined channels Channel and Interface template <class T> class sc_signal_in_if : virtual public sc_interface { public: // get the value changed event virtual const sc_event& value_changed_event() const = 0; // read current value virtual const T& read const() = 0; }; template <class T> class sc_signal_inout_if : virtual public sc_signal_in_if { public: // write the new value virtual void write(const T&) = 0; }; Channel and Interface template <class T> class sc_signal :public sc_signal_inout_if<T>, public sc_prim_channel { public: //get the default event virtual const sc_event& default_event() const { return m_value_changed_event;} virtual const sc_event& value_changed_event() const { return m_value_changed_event;} virtual const T& read() const { return m_cur_val;} virtual void write(const T& value_) { m_new_value = value_; if ( ! (m_new_val == m_cur_val)) request_update(); } Channel and Interface protected: //get the default event virtual void update() { if ( ! (m_new_val == m_cur_value)) { m_cur_value = m_new_value; m_value_changed_event.notify(SC_ZERO_TIME); } } T m_cur_valu; T m_new_val; sc_event m_value_changed_event; }; Channel Writing process calls write(const &T) method of the channel write(const &) stores the value in m_new_value request_update() informs the SystemC scheduler Change the value of the signal once the current cycle is over. At the end of the simulation cycle Calls request_update() if new value different from previous Schedule calls update() to change the value of the signal update() calls m_value_changed_event.notify() if new value different from current Event notification causes the read process to be resumed in the following simulation cycle Process Basic unit of functionality in SystemC Process is contained in a module Described as a member function Not all member functions are processes Process member function should be registered with the simulation kernel Registration is via a declaration in the module constructor Process and Module SC_MODULE(adder) { sc_in<int> a; sc_in<int> b; sc_out<int> c; void compute() { c = a + b; } SC_CTOR(adder) { SC_METHOD(compute); sensitive << a << b; c.initialize(0); } }; Process Two basic kinds of processes SC_METHOD SC_THREAD • SC_CTHREAD SC_METHOD Always executes its body from beginning to end and returns Does not maintain an implicit execution state States if required is maintained via module variables