Radio Antenna Turntable System
(RATS)
Rhonda Blair
John Carroll
Cameron McKay
Pierce Ruggles
Turntable Illustration
Motor Driven Tire
Bearing
February 26, 2004
Radio Antenna Turntable System (RATS)
Critical Design Review
1
Turntable Illustration
February 26, 2004
Radio Antenna Turntable System (RATS)
Critical Design Review
2
Project Block Diagram
Ethernet-to-Serial
Interface
Master Controller
DAC (SPI)
and Buffer
Motor Controller
20x4 Character
LCD (Parallel)
Turntable Motor
Optical Encoder
(Parallel)
February 26, 2004
Radio Antenna Turntable System (RATS)
Critical Design Review
3
Project Block Diagram
Ethernet-to-Serial
Interface
Master Controller
DAC (SPI)
and Buffer
Motor Controller
20x4 Character
LCD (Parallel)
Turntable Motor
Optical Encoder
(Parallel)
February 26, 2004
Radio Antenna Turntable System (RATS)
Critical Design Review
4
Encoder Drama
• Original encoder was defective
– Incremental
– Pulse output
• New encoder on order
– Absolute
– Parallel output
(memory mapped)
February 26, 2004
Radio Antenna Turntable System (RATS)
Critical Design Review
5
Network Interface
•
•
•
•
Converts Ethernet to RS-232
Onboard 8051 Microcontroller
Built-in TCP/IP stack
Telnet protocol
– Username/password authentication
February 26, 2004
Radio Antenna Turntable System (RATS)
Critical Design Review
6
Master Controller
Features:
•HC11E0 MCU
•32K SRAM
•32K Flash
•2x RS-232
•8 MHz clock
February 26, 2004
Radio Antenna Turntable System (RATS)
Critical Design Review
7
Master Controller
VCC
U1
R7
4.7K
1
2
3
VSS
MODB/VSTDBY
VRH
VRL
MODA/LIR
STRA/AS
E
5
R/*W
6
EXTAL
7
8
*RST
17
18
19
20
21
DAC_SDI
DAC_CLK
22
23
24
25
E
STRB/R/W
EXTAL
XTAL
RESET
XIRQ/VPPE
PC0/ADDR0/DATA0
PC1/ADDR1/DATA1
PC2/ADDR2/DATA2
PC3/ADDR3/DATA3
PC4/ADDR4/DATA4
PC5/ADDR5/DATA5
PC6/ADDR6/DATA6
PC7/ADDR7/DATA7
IRQ
PD0/RxD
PD1/TxD
PD2/MISO
PD3/MOSI
PD4/SCK
PD5/SS
VCC
26
PE7/AN7
PE3/AN3
PE6/AN6
PE2/AN2
PE5/AN5
PE1/AN1
PE4/AN4
PE0/AN0
VDD
PB0/ADDR8
PB1/ADDR9
PB2/ADDR10
PB3/ADDR11
PB4/ADDR12
PB5/ADDR13
PB6/ADDR14
PB7/ADDR15
PA0/IC3
PA1/IC2
PA2/IC1
PA3/OC5/IC4/OC1
PA4/OC4/OC1
PA5/OC3/OC1
PA6/OC2/OC1
PA7/PAI/OC1
52
51
4
LE
50
49
48
47
46
45
44
43
DAC_LD_REG
ENC_INT
9
10
11
12
13
14
15
16
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
42
41
40
39
38
37
36
35
A8
A9
A10
A11
A12
A13
A14
A15
AD [0-7]
ADDR [8-14]
34
33
32
31
30
29
28
27
HC11E0
February 26, 2004
Radio Antenna Turntable System (RATS)
Critical Design Review
8
Master Controller
32K SRAM (MCM60L256)
32K Flash (AT29C256)
U5
U8
ADDR [0-7]
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
10
9
8
7
6
5
4
3
25
24
21
23
2
26
1
ADDR [8-14]
*OE
*WE
*CE ( SRAM)
22
27
20
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
OE
WE
CS
11
12
13
15
16
17
18
19
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD [0-7]
ADDR [0-7]
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
10
9
8
7
6
5
4
3
25
24
21
23
2
26
27
ADDR [8-14]
*OE
*CE ( FLASH)
22
1
20
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
11
12
13
15
16
17
18
19
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD [0-7]
OE
WE
CE
MCM60L256
AT29C256
February 26, 2004
Radio Antenna Turntable System (RATS)
Critical Design Review
9
Master Controller
Supervisor/Reset Circuit
LCD Enable Logic
VCC
VCC
U3A
1
R1
S W1
VREF
2
10K
*RST_IN SENSE
3
CT
4
*RST
GND
RST
7
5
U6A
U6A
1
R6
10K
1
31
*CE (LCD)
*RST
3
2
32
LCD_E
2
E
7400
7400
7400
6
TL7705
C2
0.1uF
VCC
U6A
R5
10K
C1
47uF
Chip Select Logic
Peripheral Chip Select Logic
VCC
VCC
R2
4.7K
R3
4.7K
R4
4.7K
U11
5
U4
2
1
A13
A14
A15
13
3
14
15
1G 1Y0
1C 1Y1
1Y2
A 1Y3
B 2Y0
2Y1
2G 2Y2
2C 2Y3
7
6
5
4
9
10
11
12
*CE ( PERIPH)
*CE ( FLASH)
*CE ( SRAM)
A10
A11
A12
*CE ( PERIPH)
1
2
3
6
4
G2B Y0
Y1
A Y2
B Y3
C Y4
Y5
G1 Y6
G2A Y7
15
14
13
12
11
10
9
7
*CE ( LCD)
*ENC_OEL
*ENC_OEH
74LS138
74LS156
February 26, 2004
Radio Antenna Turntable System (RATS)
Critical Design Review
10
Master Controller
DAC
Encoder
VCC
15V
U10
2
4
C3
8
1u
V+
VOUT
6
U5
VCC -15V 15V
11
12
GND
U9
NSE_RED
REF102
1
4
U10
2
4
C4
8
1u
V+
VOUT
VCC
VCC
6
5
8
GND
9
NSE_RED
REF102
12
*RST
15
16
DAC_LD_REG
14
13
11
DAC_CLK
10
DAC_SDI
VCC
VOUT_A
VREF_L
VOUT_B
VREF_H
VOUT_C
VSS
VOUT_D
7
R/*W
ENC_INT
*ENC_OEH
*ENC_OEL
10
22
9
6
INT
OEH
OEL
3
2
GND
CS
13
24
25
CASE
GND
GND
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
PAR
6
5
4
3
2
1
21
20
19
18
17
16
15
14
23
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD [0-7]
AD [0-7]
GURLEY A25S (ENCODER)
RST
RSTSEL
LDREG
LD_DACS
CLK
SDI
DAC7715
February 26, 2004
Radio Antenna Turntable System (RATS)
Critical Design Review
11
Master Controller
LCD Write Timing Diagram
February 26, 2004
Radio Antenna Turntable System (RATS)
Critical Design Review
12
Master Controller
Encoder Timing Diagram
February 26, 2004
Radio Antenna Turntable System (RATS)
Critical Design Review
13
Memory Map
February 26, 2004
Internal RAM (0.5 KB)
0x0000-0x01FF
External RAM [unused] (3.5 KB)
0x0200-0x0FFF
Register Block (64 B)
0x1000-0x103F
External RAM (27.9 KB)
0x1040-0x7FFF
Peripherals (8 KB)
0x8000-0x9FFF
Flash (24 KB)
0xA000-0xFFFF
Radio Antenna Turntable System (RATS)
Critical Design Review
14
Software Components
• Bootloader/Monitor
– Loads code through RS-232 into SRAM
– Displays SRAM, register contents
• RS-232 Driver
– Initialization, port selection, read/write text
• LCD Driver
– Simple interface to read/write from LCD
• Encoder Driver
– Reads and formats encoder position data
– Calculates turntable velocity
February 26, 2004
Radio Antenna Turntable System (RATS)
Critical Design Review
15
Software Components
• DAC Driver
– Simple interface to write data to the SPI DAC
• Ethernet Driver
– Telnet initialization, input/output
• User Interface
– Text menus/input handling
• Control System
– Acceleration/braking calculations
– Uses encoder data as input
– Writes to DAC as output
February 26, 2004
Radio Antenna Turntable System (RATS)
Critical Design Review
16
Current Status
• Hardware status:
– Basic functionality complete
– Encoder, DAC in progress
• Software status:
– LCD driver complete
– RS-232 driver in progress
February 26, 2004
Radio Antenna Turntable System (RATS)
Critical Design Review
17
Current Status
February 26, 2004
Radio Antenna Turntable System (RATS)
Critical Design Review
18
Current Status
February 26, 2004
Radio Antenna Turntable System (RATS)
Critical Design Review
19
Parts List
•
•
•
•
•
•
•
•
MC68HC11E0 (MCU)
AT29C256 (32K Flash)
MCM60L256 (32K SRAM)
MAX233EPP (RS-232)
ADG419 (RS-232 Switches)
ACM2004E (LCD)
A25S (Shaft Encoder)
DAC7715 (DAC)
February 26, 2004
Radio Antenna Turntable System (RATS)
Critical Design Review
$9
$7
$6
$9
$6 ($3x2)
$75
$1900
$18
20
Parts List
•
•
•
•
•
•
REF102 (10V reference)
TL7705 (Supervisor)
74LS373 (Latch)
74LS156, 74LS138 (CS)
74HC00 (NAND)
LS100M
• Total
February 26, 2004
$10 ($5x2)
$1
$.50
$1 ($.50 ea)
$.60 ($.30x2)
$69
$2112
Radio Antenna Turntable System (RATS)
Critical Design Review
21
Schedule
ID
1
Task Name
PDR Preparation
Duration
3 days
Start
Mon 1/26/04
Finish
Wed 1/28/04
2
PDR
0 days
Thu 1/29/04
Thu 1/29/04
3
Hardw are Design
8 days
Fri 1/30/04
Tue 2/10/04
4
Softw are Design
8 days
Fri 1/30/04
Tue 2/10/04
5
Watershed Decision
0 days
Mon 2/16/04
Mon 2/16/04
6
Wire-Wrap Prototype
8 days
Wed 2/11/04
Sun 2/22/04
7
CDR Preparation
3 days
Mon 2/23/04
Wed 2/25/04
8
CDR
9
Softw are Developm ent
10
Basic Bootloader
11
User Interface
12
0 days
Thu 2/26/04
Thu 2/26/04
20 days
Fri 2/27/04
Wed 3/24/04
2 days
Fri 2/27/04
Mon 3/1/04
1 day
Tue 3/2/04
Tue 3/2/04
DAC Interface
3 days
Wed 3/3/04
Fri 3/5/04
13
Ethernet Interface
5 days
Mon 3/8/04
Fri 3/12/04
14
Encoder Interface
2 days
Mon 3/15/04
Tue 3/16/04
15
Integration
16
Turntable Model
17
Acquire Motor
18
Assembly
19
Motor Driver
20
Milestone I
21
Control System
22
Milestone II
23
Final System Test/Debug
24
ECE Expo
25
Documentation
February 26, 2004
6 days
Wed 3/17/04
Wed 3/24/04
10 days
Mon 3/1/04
Thu 3/11/04
1 day
Mon 3/1/04
Mon 3/1/04
2 days
Thu 3/4/04
Fri 3/5/04
5 days
Sat 3/6/04
Thu 3/11/04
0 days
Thu 3/18/04
Thu 3/18/04
15 days
Thu 3/25/04
Wed 4/14/04
0 days
Wed 4/14/04
Wed 4/14/04
11 days
Thu 4/15/04
Thu 4/29/04
0 days
Thu 4/29/04
Thu 4/29/04
69 days
Mon 1/26/04
Wed 4/28/04
04
S
W
Feb 1, '04
S
T
M
Feb 15, '04
F
T
S
W
Feb 29, '04
S
T
M
F
Mar 14, '04
T
S
W
Mar 28, '04
S
T
M
F
Apr 11, '04
T
S
W
Apr 25, '04
S
T
M
1/29
2/16
2/26
Radio Antenna Turntable System (RATS)
Critical Design Review
3/18
4/14
4/29
22
Schedule
• M1 Deliverables:
– Physical turntable model
– Software modules
• M2 Deliverables:
– Module integration
– Control system
• Expo Deliverables:
– Functioning turntable model
– Position/Speed control
– Documentation
February 26, 2004
Radio Antenna Turntable System (RATS)
Critical Design Review
23
Schedule
• Division of Labor
– Programming tasks shared by two
people, will rotate
– Turntable model will be a group effort
February 26, 2004
Radio Antenna Turntable System (RATS)
Critical Design Review
24
Questions?
February 26, 2004
Radio Antenna Turntable System (RATS)
Critical Design Review
25