GS_EE221-02 - San Jose State University

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San José State University
Department of Electrical Engineering
EE 221, Semiconductor Devices I, Section-02, Fall 2012
Instructor:
Office Location:
Telephone:
Email:
Office Hours:
Class Days/Time:
Classroom:
Prerequisites:
M. Javad Zoroofchi
ENG 255
(408) 924-3919
Mohammad.Zoroofchi@sjsu.edu
MW/10:30-11:30, TR/15:30-16:30, or by an appointment
MW/16:30-17:45
CL 202
EE 128 or Consent of instructor
Course Description
This course is a prerequisite for all electronics area courses and reviews semiconductor
device physics and technology. The students are expected to have some background in
atomic physics and solid state physics for this course. The course is divided into four
parts- semiconductor fundamentals, p-n junctions, bipolar junction transistors (BJT), and
field effect transistors (FET).
Course Goals and Student Learning Objectives
Upon successful completion of this course, students will be able to:
LO1 Describe fundamental concepts of solid-state physics applied to the semiconductor
devices by silicon and compound semiconductor materials.
LO2 Explain general electrical behavior of semiconductor Si and GaAs, construct
appropriate physical models.
LO3 Illustrate structural details and current-voltage characteristics of p-n junction diode,
BJT, MOSFET, Metal/semiconductor diode, and MESFET.
Semiconductor Devices I, EE 221, Fall 2012
Page 1 of 5
LO4 Apply the fundamental understanding of semiconductor devices with knowledge on
the limitations of physical models.
Required Texts/Readings
Textbook
Semiconductor Devices: Physics and Technology, 3rd Edition, by S.M. Sze and M.K.
Lee, Wiley 2012, ISBN 978-0470-53794-7
Other Readings
1. Semiconductor Device Fundamentals, by R. F. Pierret, Addison Wesley 1996
(reference only)
2. Device Electronics for Integrated Circuits, 3rd Edition, by Muller and Kamins, Wiley
2003 (reference only)
3. Physics and Technology of Semiconductor Devices, by A. S. Grove Wiley 1967
(reference only)
Classroom Protocol
Students are expected to participate actively in class. Students will turn their cell phones
off or put them on vibrate mode while in class. They will not answer their phones in
class.
Dropping and Adding
Students are responsible for understanding the policies and procedures about add/drop,
grade forgiveness, etc. Refer to the current semester’s Catalog Policies section at
http://info.sjsu.edu/static/catalog/policies.html. Add/drop deadlines can be found on the
current academic calendar web page located at
http://www.sjsu.edu/academic_programs/calendars/academic_calendar/. The Late Drop
Policy is available at http://www.sjsu.edu/aars/policies/latedrops/policy/. Students should
be aware of the current deadlines and penalties for dropping classes.
Information about the latest changes and news is available at the Advising Hub at
http://www.sjsu.edu/advising/.
Assignments and Grading Policy
Homework will be assigned but will not be collected. Solutions to homework problems
will be provided periodically during the semester.
Exams:
There will be two midterm examinations, a few quizzes, and a final examination. All
examinations will be closed books and closed notes except for one sheet of formulae
for midterm examination and three sheets of formulae for the final examination.
Semiconductor Devices I, EE 221, Fall 2012
Page 2 of 5
Midterm Exam #1 (Ch 1,2,3) W Oct 03, 12
Midterm exam #2 (Ch 3,4,5) W Nov 07, 12
Final Exam (comprehensive) T Dec 18, 12 (14:45-17:00)
Grading:
Two midterm exams 50%
Quizzes
10%
Final exam
40%
University Policies
Academic integrity
Your commitment as a student to learning is evidenced by your enrollment at San Jose
State University. The University’s Academic Integrity policy, located at
http://www.sjsu.edu/senate/S07-2.htm, requires you to be honest in all your academic
course work. Faculty members are required to report all infractions to the office of
Student Conduct and Ethical Development. The Student Conduct and Ethical
Development website is available at http://www.sa.sjsu.edu/judicial_affairs/index.html.
Instances of academic dishonesty will not be tolerated. Cheating on exams or plagiarism
(presenting the work of another as your own, or the use of another person’s ideas without
giving proper credit) will result in a failing grade and sanctions by the University. For
this class, all assignments are to be completed by the individual student unless otherwise
specified. If you would like to include your assignment or any material you have
submitted, or plan to submit for another class, please note that SJSU’s Academic Policy
S07-2 requires approval of instructors.
Campus Policy in Compliance with the American Disabilities Act
If you need course adaptations or accommodations because of a disability, or if you need
to make special arrangements in case the building must be evacuated, please make an
appointment with me as soon as possible, or see me during office hours. Presidential
Directive 97-03 requires that students with disabilities requesting accommodations must
register with the Disability Resource Center (DRC) at http://www.drc.sjsu.edu/ to
establish a record of their disability.
Semiconductor Devices I, EE 221, Fall 2012
Page 3 of 5
EE 221 / Semiconductor Devices I , Fall 2012, Course
Schedule
Table 1 Course Schedule
Week
Date
Topics, Readings, Assignments, Deadlines
1
Aug 22-24
Valence bonds, energy bands, electrons and holes
Ch 1, Sec 1-3
2
Aug 27-31
Donors and acceptors, Fermi level
Ch 1, Sec 4-6
3
Sep 03-07
Mobility, drift and diffusion currents, conductivity
Ch 2, Sec 1-4
4
Sep 10-14
Recombination, continuity equation, high field effect Ch 2, Sec 5-8
5
Sep 17-21
6
Sep 24-28
7
Oct 01-05
8
Oct 08-12
9
Oct 15-19
10
Oct 22-26
11
12
Oct 29Nov 02
Nov 05-09
13
Nov 12-16
14
Nov 19-21
15
Nov 26-30
Thermal oxidation, dopant diffusion, ion implantation, Ch 3, Sec 1
photolithography, etching and deposition
Electric field and potential in abrupt junction,
Ch 3, Sec 2-4
ideal current-voltage relationship
Space-charge-region recombination and generation Ch 3, Sec 5,6
currents, junction and diffusion capacitances, device models
Transient response, junction breakdown,
Ch 3, Sec 7
heterojunctions
Basic structure and operation of BJT, current gain,
Ch 4, Sec 1
emitter efficiency, base transport factor
Ideal transistor currents, modes of operation,
Ch 4, Sec 2,3
base resistance, base width modulation, voltage breakdowns
Frequency response, device models, switching
Ch 4, Sec 4,5
transistors, IC transistors and fabrication, heterojunction BJT
Energy band diagram of ideal MOS structures,
Ch 5, Sec 1
effect of bias voltage
Capacitance-voltage characteristics, metalCh 5, Sec 2,3
semiconductor work function difference, oxide charges
MOSFET current-voltage characteristics,
Ch 5, Sec 5
threshold voltage and its control
Short-channel effects, device models,
Ch 6, Sec 1-5
cutoff frequency, MOS technology, CMOS
Semiconductor Devices I, EE 221, Fall 2012
Page 4 of 5
Week
Date
16
Dec 03-07
Final
Exam
Dec 18, 12
Topics, Readings, Assignments, Deadlines
Metal-semiconductor contacts, Schottky diodes,
ohmic contacts, MESFET
CL 202, 14:45-17:00
Semiconductor Devices I, EE 221, Fall 2012
Ch 7, Sec 1-3
Page 5 of 5
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