Apr 17, 2008
Adding Framebuffer support to
Freescale SoCs
Embedded Linux Conference 2008
York Sun, Ben Eckermann
Freescale Semiconductor
TM
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. © Freescale Semiconductor, Inc. 2006. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are
trademarks and service marks licensed by Power.org.
Video to the Power of 5
►3
Planes of images
•
Bottom plane: PowerPoint presentation
• Middle plane: 2 AOI (Areas of Interest) decoding video
• Top plane: 2 more AOI with 2 more videos
• Total of 5 AOI, all operating independently
►All
running under Linux®
•
Mplayer for video decode (utilizing AltiVec™ technology)
• Separate Linux Framebuffer per AOI
►DIU hardware acceleration
• Per-pixel alpha blending handled by DIU (hardware)
• AOI Framebuffers have no concept of physical screen location or blending
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. © Freescale Semiconductor, Inc. 2006. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are
trademarks and service marks licensed by Power.org.
TM
2
MPC8610 Integrated Host Processor
LCD
Controller
DDR/DDR2
Memory
Controller
256 KB L2
e600 Core
32 KB
I-Cache
Enhanced
Local Bus
32 KB
D-Cache
2 x DUART
2 x I2C,
32 x GPIO
SPI
Timers
Ext Interrupt
MPX Coherency Module
MPX Bus
2x
2 x SSI
FIR/SIR I2S/AC97
IrDA
Audio






On-chip Switch
x8 PCI
Express®
4 ch
DMA
On-chip Switch
x4 PCI
PCI
Express®
4 ch
DMA
Target Applications:
Robotic vision and navigation
Aerospace/defense display, control and image processing
Kiosks with image processing
Multi-function printers and scanners
Single-board computers





e600 Power Architecture™ CPU
667 MHz – 1.33 GHz e600 core
256 KB on-chip backside L2 Cache with ECC
AltiVec® vector processor for image processing
Double precision FPU, 4 x integer units
 Interfaces and Features
 DDR/DDR2 controller, 64/32-bit, 333-533 MHz (ECC)
 LCD controller, 24 bit/pixel, 60 Hz refresh
 Up to SXGA (1280 x 1024) resolution
 3 planes (XGA) + 1 cursor plane











2-I2S/AC97 audio ports
2-PCI-Express® (x1/x2/x4/x8; x1/x2/x4)
PCI 2.2, 32-bit, 33/66 MHz
Enhanced local bus, 32-bit, to 133 MHz (ROM, NAND, NOR)
2-I2C, 2-DUART, 4 channels each, 115 kb/s
2- Fast/Serial IrDA channels, 4 Mb/s
2-DMA, 4 channels each
Serial peripheral interface (SPI), 4 to 16/32-bit characters
32-GPIO, 16 dedicated, 16 multiplexed
Machine check external interrupt
Watchdog and 2-global timers






Power, Package, Technology, Schedule
15 W max at 1066 MHz, Tj=105C, 0.95V
11.5 W max at 667 MHz, Tj=105C, 0.95V
783 FC-PBGA, 90 nm SOI, RoHS compliant
Rev 1.0 Samples 4Q-07, Production 1H-08
No known Export Restrictions for MPC8610, evaluation
board or Linux® BSP
freescale.com/imageprocessor
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. © Freescale Semiconductor, Inc. 2006. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are
trademarks and service marks licensed by Power.org.
TM
3
PCEVALHPCD-8610E Evaluation Platform
Shipping Now!
► In the box
► MPC8610 development board
board in chassis
•
•
Preloaded latest Linux BSP
Default settings


CPU at 1066 MHz
System at 533 MHz
► Cables
•
•
•
3-conductor power cord
DB-9 RS-232 cable
USB TAP

CWH-UTP-PPCC-HE
► CD
►On the web: freescale.com/imageprocessor
►More documentation
with Hardware Design
Workbook (131 pages)
► Packing
List
►Linux® BSPs downloadable now
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. © Freescale Semiconductor, Inc. 2006. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are
trademarks and service marks licensed by Power.org.
TM
4
MPC8610 Key Features
►Image Processing
• e600 Power Architecture™ core with
AltiVec™ Vector Processor
►2D/3D Graphics Handling
• AltiVec™ Vector Processor
• Interface with external Graphics
Processing Units (GPU)
►Graphics Display
• Display Interface Unit
►Audio Inputs/Outputs
• Synchronous Serial Interface (SSI) for
I2S/AC97
►Memory
• IMEM/DMEM, L2 Cache, DDR1/DDR2,
NAND, NOR, etc.
• DMA Controllers
►Additional Connectivity
• PCI and PCI Express® Interfaces
• Enhanced Local Bus Controller
• I2C Interfaces
• DUART
• Fast/Serial Infrared Interfaces
(FIRI/SIRI)
• Serial Peripheral Interface (SPI)
• General Purpose I/O
►Interrupts and Timers
• Programmable Interrupt Controller (PIC)
• Global Timer Module
• Watchdog Timer
►Low
Power Consumption
►High
Performance
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. © Freescale Semiconductor, Inc. 2006. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are
trademarks and service marks licensed by Power.org.
TM
5
MPC8610 Display Interface Unit (DIU)
LCD Controller
TM
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. © Freescale Semiconductor, Inc. 2006. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are
trademarks and service marks licensed by Power.org.
Multiple Graphics Layers
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. © Freescale Semiconductor, Inc. 2006. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are
trademarks and service marks licensed by Power.org.
TM
7
Graphics Subsystem
DDR2 Memory
LCD Display
LCD
Controller
256 KB L2
DDR/DDR2
Memory
Controller
e600 Core
32 KB
I-Cache
32 KB
D-Cache
MPX Coherency Module
MPX Bus
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. © Freescale Semiconductor, Inc. 2006. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are
trademarks and service marks licensed by Power.org.
TM
8
DIU Modes of Operation- Mode 0
► Mode
0: No Output
Video and/or graphic planes
2D/3D
Graphics
(CPU or GPU)
Plane 1
Plane 2
Plane 3
No Output
Display
Interface
DIU
Unit
(DIU)
Graphics
Memory
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. © Freescale Semiconductor, Inc. 2006. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are
trademarks and service marks licensed by Power.org.
TM
9
DIU Modes of Operation- Mode 1
► Mode
1: All Planes Output to Display Panel
Video and/or graphic planes
2D/3D
Graphics
(CPU or GPU)
Plane 1
Plane 2
Plane 3
Plane 1
Display
Interface
DIU
Unit
(DIU)
Plane 2
Plane 3
Graphics
Memory
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. © Freescale Semiconductor, Inc. 2006. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are
trademarks and service marks licensed by Power.org.
TM
10
DIU Modes of Operation- Mode 2
► Mode
2: Only Plane 1 Output to Display Panel
Video and/or graphic planes
2D/3D
Graphics
(CPU or GPU)
Plane 1
Plane 2
Plane 3
Plane 1
Display
Interface
DIU
Unit
(DIU)
Plane 2
Plane 3
Graphics
Memory
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. © Freescale Semiconductor, Inc. 2006. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are
trademarks and service marks licensed by Power.org.
TM
11
DIU Modes of Operation – Mode 3
► Mode
3: Output All Planes to Memory
Video and/or graphic planes
2D/3D
Graphics
(CPU or GPU)
Plane 1
Plane 2
Plane 3
Display
Interface
DIU
Unit
(DIU)
Plane 1
Plane 2
Plane 3
Graphics
Memory
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. © Freescale Semiconductor, Inc. 2006. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are
trademarks and service marks licensed by Power.org.
TM
12
DIU Modes of Operation – Mode 4
► Mode
4: Output Colorbar
Video and/or graphic planes
2D/3D
Graphics
(CPU or GPU)
Plane 1
Plane 2
Plane 3
Display
Interface
DIU
Unit
(DIU)
Graphics
Memory
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. © Freescale Semiconductor, Inc. 2006. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are
trademarks and service marks licensed by Power.org.
TM
13
DIU: Pixel Structure
Each pixel contains four elements: alpha, red (R), green (G) and blue (B)
Alpha
8 bits
LSB
MSB LSB
Red
Green
Blue
8 bits
8 bits
8 bits
MSB LSB
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. © Freescale Semiconductor, Inc. 2006. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are
trademarks and service marks licensed by Power.org.
MSB LSB
MSB
TM
14
Hardware Cursor
► A 32
x 32 pixel hardware cursor is stored in memory
► The cursor is laid on top of all three planes
► Each pixel in the cursor has the following 16-bit format:
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. © Freescale Semiconductor, Inc. 2006. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are
trademarks and service marks licensed by Power.org.
TM
15
Area Descriptors
► An
area descriptor defines the
specific region on a plane that will
be displayed on the LCD panel
Area Descriptors Specify:
Pixel format
Bitmap source size
Area of interest size
Bitmap source location
Byte flip
Image flip
Chroma key
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. © Freescale Semiconductor, Inc. 2006. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are
trademarks and service marks licensed by Power.org.
TM
16
Software Components used on MPC8610HPCD
Linux® OS
Application
(MPlayer, etc.)
LVDS
Encoder
OS Framebuffer
Driver
DIU
(OR)
DVI
Encoder
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. © Freescale Semiconductor, Inc. 2006. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are
trademarks and service marks licensed by Power.org.
TM
17
Software Components
►U-boot
•
Initialize DVI encoder
►Linux®
•
•
Framebuffer
Driver initializes device and associates with the kernel framebuffer

•
File system

•
Sets AOIs, clock rates, memory addresses, area descriptor fields
/dev/fb
Application
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. © Freescale Semiconductor, Inc. 2006. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are
trademarks and service marks licensed by Power.org.
TM
18
Initialization and Use
Build components
►
►
Enable the framebuffer code in the Linux® kernel
Enable DIU driver code in Linux kernel
Boot and Use
►
►
Probe for the device driver
Initialize device
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
►
►
Register with Linux framebuffer
Change resolution (and corresponding timing parameters) using “fbset”
•
•
►
►
Allocate memory corresponding to the resolution chosen
Pixel format (size, position)
AOI size and offset
Chroma keying
Gamma table
Cursor bitmap address and position
Background
Horizontal and vertical timing parameters
Interrupts
Pixel clock
Enable DIU
fbset –a <XRES>x<YRES> -depth <bits/pixel>
Picks up parameters from /etc/fb.modes
Initial tests using fbv and MPlayer
Custom applications to demonstrate AOIs and blending of planes
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. © Freescale Semiconductor, Inc. 2006. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are
trademarks and service marks licensed by Power.org.
TM
19
Initialization and Use
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. © Freescale Semiconductor, Inc. 2006. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are
trademarks and service marks licensed by Power.org.
TM
20
Initialization and Use
► For
•
activity in multiple planes, create a minimum of 3 ADs
For more, chain the ADs
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. © Freescale Semiconductor, Inc. 2006. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are
trademarks and service marks licensed by Power.org.
TM
21
Initialization and Use
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. © Freescale Semiconductor, Inc. 2006. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are
trademarks and service marks licensed by Power.org.
TM
22
Initialization and Use
► Supports
•
2 AOIs per plane
Non-zero value for Next AD only for 1st of the 2 AOIs
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. © Freescale Semiconductor, Inc. 2006. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are
trademarks and service marks licensed by Power.org.
TM
23
Display Interface Unit Capabilities
Display typeResolution m ax
SXGA
1280x1024
XGA
1024x768
WVGA
854x480
SVGA
800x600
VGA
640x480
QVGA
320x240
planes
1
3
3
3
3
3
►
Parallel TTL display interfaces
►
Red/Green/Blue (RGB) and 256-level
grayscale input pixel format
•
►
Programmable bit order definition
•
►
24 bits/pixel (bpp)
up to 8 bits per component
Hardware cursor
•
32 x 32 pixels, 16 bits/pixel
►
Up to 256 levels α-blending
►
Chroma keying selectable by range
►
Independent programmable Gamma
adjustments for each color component
►
Memory write-back mode to store
intermediate results, virtually
extending the number of graphics
planes
►
5 operating modes
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. © Freescale Semiconductor, Inc. 2006. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are
trademarks and service marks licensed by Power.org.
TM
24
Showtime!
Demo on MPC8610HPCD
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. © Freescale Semiconductor, Inc. 2006. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are
trademarks and service marks licensed by Power.org.
TM
25
TM
Contact
YorkSun@Freescale.com
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. © Freescale Semiconductor, Inc. 2006. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are
trademarks and service marks licensed by Power.org.
TM
27