Venn Diagram – the visual aid in
verifying theorems and properties
• Provides a graphical illustration of operations
and relations in the algebra of sets.
– The elements of a set are represented by the area
enclosed by a contour.
– Given a universe N of integers from 1 to 10;
• Even numbers E = { 2, 4, 6, 8, 10 };
• Odd numbers form E’s complement, 𝐸 = { 1, 3, 5, 7, 9 };
N = { E, 𝐸 }
E
𝐸
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Venn Diagram in Boolean algebra
Represent the universe
B = {0, 1} by a square.
• {1} using shaded area
(a) Constant 1
(b) Constant 0
x
x
𝑥
(c) Variable x
𝑥
(d) 𝑥
Represent a Boolean
variable x by a circle.
• Area inside the circle
-> x = 1;
• Area outside the circle
-> x = 0;
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Venn Diagram – for two or more
Boolean variables
Represent x, y by drawing
two overlapping circles
x
y
(e) x×y
x
y
(f) x+y
x
x
y
y
z
(g) x × y
(h) x×y+z
• AND operation x ∙ y
-> shade overlapping area of
both circles.
-> also referred to as the
intersection of x and y.
• OR operation x + y
-> shade total area within
both circles
-> also called the union of x
and y
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App: Verifying the equivalence of
two expressions
x
y
x
y
x
y
z
z
z
(a)x
(b) y+z
(c)x× (y+z)
x
x
x
y
y
y
z
z
z
(d)x×y
(e) x× z
(f) x×y+x ×z
Verification of distributive property x ∙ (y + z) = x ∙ y + x ∙ z
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Another verification example
x
y
x
y
x
y
x
y
z
z
z
z
x× y
𝑥 ×z
y ×z
𝑥×𝑦+𝑥×𝑧+𝑦×𝑧
x
y
x
y
x
y
z
z
z
x× y
𝑥 ×z
𝑥×𝑦+ 𝑥×𝑧
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2.6 Synthesis using AND, OR, NOT
gates
• Can express the required behavior using a
truth table
Figure 2.15. A function to be synthesized.
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Procedures for designing a logic
circuit
• Create a product term for each valuation whose
output function f is 1.
– Product term: all variables are ANDed.
• Take a logic sum (OR) of these product terms to
realize f.
f = x1x2 + 𝑥1 𝑥2 + 𝑥1 x2
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x1
x2
f = x1x2 + 𝑥1 𝑥2 + 𝑥1 x2
= (x1x2 + 𝑥1 x2)+(𝑥1 𝑥2 +𝑥1 x2)
= (x1+ 𝑥1 ) x2 + 𝑥1 (𝑥2 +x2)
= 1 ∙ x2 + 𝑥1 ∙ 1
= x2 + 𝑥1
f
(a) Canonical sum-of-products
x1
f
x2
(b) Minimal-cost realization
Figure 2.16. Two implementations of a function in Figure 2.15.
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Summary
• To implement a function,
– Use a product term (AND gate) for each row of the
truth table for which the function is equal to 1.
• If xi = 1 in the given row, xi is entered in the term;
• If xi = 0, 𝑥𝑖 is entered in the term.
– The sum of these product terms realizes the
desired function
• Different networks can realize a given function
– Use algebraic manipulation to derive simplified
logic expression, thus lower-cost networks.
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Minterms and Sum-of-products (SOP)
• Minterms: a product term in which each of the
n variables for a function appear once
– Variables may appear in either un-complemented
or complemented form,
– Use mi to denote the minterm for the row number i.
• Sum-of-products Form: a logic expression
consisting of product (AND) terms that are
summed (ORed)
– Canonical SOP: each term is a minterm
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Figure 2.17 Three-variable minterms and maxterms.
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Canonical SOP expression
f = 𝑥1 𝑥2 x3 + x1𝑥2 𝑥3 +
x1𝑥2 𝑥3+ x1x2𝑥3
Figure 2.18. A three-variable function.
Manipulate f as following
f = (x1+ 𝑥1 ) 𝑥2 x3 +
x1(x2+ 𝑥2 ) 𝑥3
= 1 𝑥2 x3 + x1 1 𝑥3
= 𝑥2 x3 + x1𝑥3
A more concise form to specify the given canonical SOP
expression (logical sum)
f = (𝑚1, 𝑚4, 𝑚5, 𝑚6) = 𝑚(1,4,5,6)
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Maxterms and Product-of-Sums
(POS)
• Maxterms: complements of minterms
– By applying the principle of duality, if we could
synthesize a function f by considering the rows
for which f = 1, it should also be possible to
synthesize f by considering the rows where f = 0
• Product-of-sums Form: a logic expression
consisting of sum (OR) terms that are the
factors of a logical product (AND)
– Canonical POS: each term is maxterm
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Figure 2.17 Three-variable minterms and maxterms.
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An example
• The complement of a
function 𝑓 can be
represented by a sum of
minterms for which f = 0.
• 𝑓 = 𝑚2 = 𝑥1 𝑥2
• Complement this expression
using DeMorgan’s theorem
𝑓 = 𝑓 = 𝑚2 = M2
= 𝑥1 𝑥2 = 𝑥1 + 𝑥2
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𝑓 = m0 + m2 + m3 + m7
∴ f = 𝑚0 + 𝑚2 + 𝑚3 + 𝑚7
= 𝑚0 ∙ 𝑚2 ∙ 𝑚3 ∙ 𝑚7
= M0 ∙ M2 ∙ M3 ∙ M7
= (x1+x2+x3) (x1+𝑥2 +x3)
(x1+𝑥2 +𝑥3 ) (𝑥1 +𝑥2 +𝑥3 )
f = (x1+x3) (𝑥2 +𝑥3 )
Figure 2.18. A three-variable function.
A more concise form to specify the given canonical POS
expression (logical product)
f=
(M0, M2, M3, M7) =
𝑀(0,2,3,7)
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• Cost of a logic circuit is
– the total number of gates plus
– the total number of inputs to all gates in the circuit.
x2
f = 𝑥2 x3 + x1𝑥3
f
x3
Cost = 13
x1
(a) A minimal sum-of-products realization
Figure 2.19. Two realizations of a function in Figure 2.18.
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x2
f
x3
x1
(a) A minimal sum-of-products realization
Cost = 13
x1
x3
f
x2
(b) A minimal product-of-sums realization
Figure 2.19. Two realizations of a function in Figure 2.18.
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Example 2.3
Consider the function
f(x1,x2,x3) = 𝑚(2, 3, 4, 6, 7)
1. Canonical SOP expression for the function
f = m2+m3+m4+m6+m7
= 𝑥1 𝑥2 𝑥3 + 𝑥1 𝑥2 𝑥3 + 𝑥1 𝑥2 𝑥3 + 𝑥1 𝑥2𝑥3 + 𝑥1𝑥2𝑥3
2. Simplify the expression
f = 𝑥1 𝑥2 + 𝑥1 𝑥3 + 𝑥1𝑥2
= 𝑥2 + 𝑥1 𝑥3
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Example 2.4
Consider the function in Example 2.3, Specify it
as a product of maxterms for which f = 0
f(x1,x2,x3) = 𝑀(0,1,5)
1. Canonical POS expression for the function
f = M0M1M5
= (x1+x2+x3)(x1+x2+𝑥3 )(𝑥1 +x2+𝑥3 )
2. Simplify the expression
f = (x1+x2)(x2+𝑥3 )
= x2+x1𝑥3
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Discussion (1)
Given a logic function f(x1,x2,x3),
1. What is the index of the maxterm 𝑥1 𝑥2 𝑥3 ?
Complemented entry -> 0
(𝑥1 𝑥2 𝑥3 ) ->
uncomplement entry -> 1
0 1 0
(010)2 = 2 (decimal number)
Therefore, 𝑥1 𝑥2 𝑥3 = m2
2. What is the logic expression of m5?
(5)10 = (1 0 1)2
=> m5 = (𝑥1𝑥2 𝑥3)
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Discussion (2)
Given a logic function f(x1,x2,x3),
1. What is the index of the maxterm (𝑥1 + 𝑥2 +
Complemented entry -> 1
𝑥3 ) ?
uncomplement entry -> 0
(𝑥1 + 𝑥2 + 𝑥3 ) ->
1
0
1
(101) = 5 (decimal)
Therefore, (𝑥1 + 𝑥2 + 𝑥3 ) = M5
2. What is the logic expression of M5?
(5)10 = (1
0 1)2
=> M5 = (𝑥1 + 𝑥2 + 𝑥3 )
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Venn Diagram for Boolean algebra
• Basic requirement for legal Venn diagram
– Must be able to represent all minterms of a
Boolean function
Three variables
Two variables
x1
m2 m3
x1
x2
m1
m4
m5
m6
m7
x2
m2
m3
m1
m0
m0
x3
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Venn Diagram for Boolean algebra
• Basic requirement for legal Venn diagram
– Must be able to represent all minterms of a
Boolean function
m5? m7?
Three variables
Two variables
x1
m2 m3
m0
x2
m1
x2
x1
m4
m6
x3
m3
m1
m2
m0
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