PARISUTHAM INSTITUTE OF TECHNOLOGY AND SCIENCE
Department of ECE
AY 2015-16
II Year ECE / III Sem.
EC6302 – DIGITAL ELECTRONICS
QUIZ -1
1. The output of an exclusive-NOR gate is 1. Which input combination is correct?
a. a = 1, b = 0
b. a = 0, b = 1
c. a = 0, b = 0
d. none of the above
2. Before an SOP implementation, the expression 𝑋 = 𝐴𝐵(𝐶𝐷 + 𝐸𝐹)would require a total
of how many gates?
a. 1
b. 2
c. 4
d. 5
3. A 4-variable AND-OR-Invert circuit produces a 0 at its Y output. Which combination of
inputs is correct?
a. 𝐴 𝐵 + 𝐶 𝐷
b. 𝐴 𝐵 + 𝐶 𝐷
c. 𝑨 𝑩 + 𝑪𝑫
d. none of the above
4. To implement the expression𝐴 𝐵𝐶𝐷 + 𝐴𝐵𝐶𝐷 + 𝐴𝐵𝐶𝐷, it takes one OR gate and how
many other gates along with that?
a. Three and gates and three inverters
b.Three and gates and
four inverters
c. Three and gates
d.One and gate
5. How many AND gates are required to implement the Boolean expression, 𝑋 = 𝐴𝐵𝐶 +
𝐴𝐵𝐶 + 𝐴𝐵𝐶?
a.1
b.2
c.3
d.4
6. How many NOT gates are required to implement the Boolean expression, 𝑋 = 𝐴𝐵𝐶 +
𝐴𝐵𝐶?
a.1
b.2
c.4
d.5
7. The inverter can be produced with how many NAND gates?
a.1
b.2
c.3
d.4
8. A 4-variable AND-OR circuit produces a 0 at its Y output. Which combination of inputs
is correct?
a.A = 0, b = 0, c = 1, d = 1
b.A = 1, b = 1, c = 0, d = 0
c.A = 1, b = 1, c = 1, d = 1
d.A = 1, b = 0, c = 1, d = 0
9. A 4-variable AND-OR circuit produces a 1 at its Y output. Which combination of inputs
is correct?
a.A = 0, b = 0, c = 0, d = 0
b.A = 0, b = 1, c = 1, d = 0
c.A = 1, b = 1, c = 0, d = 0
d.A = 1, b = 0, c = 0, d = 0
10. Implementation of the Boolean expression𝑋 = 𝐴𝐵𝐶 + 𝐴𝐵 + 𝐴𝐶 results in how many
basic gates?
a.Three and gates, one or gate
b.Three and gates, one not gate, one or gate
c.Three and gates, one not gate,
d.Three and gates, three or gates three or gates
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11. What is the possible output expression for an AND-OR-Invert circuit having one AND
gate with inputs A, B, and C and one AND gate with inputs D and E?
a.𝐴𝐵𝐶 + 𝐷𝐸
b.𝐴 + 𝐵 + 𝐶 + 𝐷 + 𝐸
c.( 𝑨 + 𝑩 + 𝑪)(𝑫 + 𝑬)
d.(𝐴 + 𝐵 + 𝐶)(𝐷 + 𝐸)
12. How many 2-input NOR gates does it take to produce a 2-input NAND gate?
a.1
b.2
c.3
d.4
13. How many numbers of gates that a logic circuit contains with an output𝑋 = 𝐴𝐵𝐶 + 𝐴𝐵?
a.2 and gates, 2 or gates, 2 inverters
b.3 and gates, 2 or gates, 1 inverter
c.2 and gates, 1 or gate, 2 inverters
d.2 and gates, 1 or gate
14. What may be the values of A, B, C, and D that make the sum term 𝐴 + 𝐵 + 𝐶 + 𝐷equal
to zero?
a.A = 1, b = 0, c = 0, d = 0
b.A = 1, b = 0, c = 1, d = 0
c.A = 0, b = 1, c = 0, d = 0
d.A = 1, b = 0, c = 1, d = 1
15. One of De Morgan's theorems states that𝑋 + 𝑌 = 𝑋𝑌. How can we state that logically
there is no difference between them?
a. a NOR and an AND gate with inverted inputs
b. a NAND and an OR gate with inverted inputs
c. an AND and a NOR gate with inverted inputs
d. a NOR and a NAND gate with inverted inputs
16. The commutative law of Boolean addition states that A + B = A × B.Is it true?
a.True
b.False
17. What will be the outcome, if we apply DeMorgan's theorem to the expression 𝐴𝐵𝐶?
a. 𝑨 + 𝑩 + 𝑪
b.𝐴 + 𝐵 + 𝐶
c. 𝐴 + 𝐵 + 𝐶𝐶
d.𝐴(𝐵 + 𝐶)
18. How the systematic reduction of logic circuits is accomplished?
a.Using boolean algebra
b.Symbolic reduction
c.TTL logic
d.Using a truth table
19. What will be the gate, if an AND gate with schematic "bubbles" on its inputs?
a.NOT
b.OR
c.NOR
d.NAND
20. For the SOP expression 𝑋 = 𝐴𝐵 𝐶 + 𝐴 𝐵𝐶 + 𝐴𝐵𝐶 , how many 1s are in the truth table's
output column?
a.1
b.2
c.3
d.5
21. A truth table for the SOP expression 𝑋 = 𝐴𝐵𝐶 + 𝐴 𝐵𝐶 + 𝐴 𝐵 𝐶 has how many input
combinations?
a.1
b.2
c.4
d.8
22. How many gates would be required to implement the following Boolean expression
before simplification? XY + X(X + Z) + Y(X + Z)
a.1
b.2
c.4
d.5
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23. Determine the values of A, B, C, and D that make the product term 𝐴 𝐵𝐶𝐷 equal to 1
A.A = 0, B = 1, C = 0, D = 1
B.A = 0, B = 0, C = 0, D = 1
C.A = 1, B = 1, C = 1, D = 1
D.A = 0, B = 0, C = 1, D = 0
24. What is the primary motivation for using Boolean algebra to simplify logic expressions?
a.It may make it easier to understand the overall function of the circuit.
b.It may reduce the number of gates.
c.It may reduce the number of inputs required.
d.All of the above
25. AC + ABC = AC. Is it true?
a.True
b.False
26. Which Boolean algebra property allows us to group operands in an expression in any
order without affecting the results of the operation [for example, A + B = B + A]?
a.Associative
b.Commutative
c.Boolean
d.Distributive
27. The output of an exclusive-NOR gate is 1. Which input combination is correct?
a.a = 1, b = 0
b.a = 0, b = 1
c.a = 0, b = 0
d.none of the above
28. When grouping cells within a K-map, how the cells must be combined in groups?
a.2s
b.1, 2, 4, 8, etc.
c.4s
d.3s
29. Why the NAND or NOR gates are referred to as "universal" gates?
a.Can be found in almost all digital circuits
b.Can be used to build all the other types of gates
c.Are used in all countries of the world
d.Were the first gates to be integrated
30. A Karnaugh map is a systematic way of reducing which type of expression?
a.Product-of-sums
b.Exclusive nor
c.Sum-of-products
d.Those with overbars
31. The Boolean expression
is logically equivalent to what single gate?
a.NAND
b.NOR
c.AND
d.OR
32. For the SOP expression
, how many 0s are in the truth table's output
column?
a.zero
b.1
c.4
d.5
33. Which statement below best describes a Karnaugh map?
a.A Karnaugh map can be used to replace Boolean rules.
b.The Karnaugh map eliminates the need for using NAND and NOR gates.
c.Variable complements can be eliminated by using Karnaugh maps.
d.Karnaugh maps provide a cookbook approach to simplifying Boolean expressions.
34. Which of the following is an important feature of the sum-of-products (SOP) form of
expression?
a.All logic circuits are reduced to nothing more than simple AND and OR gates.
b.The delay times are greatly reduced over other forms.
c.No signal must pass through more than two gates, not including inverters.
d.The maximum number of gates that any signal must pass through is reduced by a factor
of two.
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35. Which is the gate performs the same function if an OR gate with schematic "bubbles" on
its inputs?
a.NOR
b.OR
c.NOT
d.NAND
36. The expression W(X + YZ) can be converted to SOP form by applying which law?
a.Associative law
b.Commutative law
c.Distributive law
d.None of the above
37. What the commutative law of addition and multiplication indicates?
a.we can group variables in an AND or in an OR any way we want
b.an expression can be expanded by multiplying term by term just the same as in
ordinary algebra
c.the way we OR or AND two variables is unimportant because the result is the
same
d.the factoring of Boolean expressions requires the multiplication of product terms that
contain like variables
38. Which of the following combinations cannot be combined into K-map groups?
a.Corners in the same row
b.Corners in the same column
c.Diagonal
d.Overlapping combinations
39. Any number with an exponent of zero is equal to:
a.Zero
b.One
c.That number
d.Ten
40. In the decimal numbering system, what is the MSD?
a.The middle digit of a stream of numbers
b.The digit to the right of the decimal point
c.The last digit on the right
d.The digit with the most weight
41. What is the requirement of a full subtractor circuit?
a.Two inputs and two outputs
b.Two inputs and three outputs
c.Three inputs and one output
d.Three inputs and two outputs
42. When the output of an AND gate is LOW?
a.all the time
b.when any input is LOW
c.when any input is HIGH
d.when all inputs are HIGH
43. What is the decimal value of binary 100102?
a.610
b.910
c.1810
d.2010
44. When the output of a NOT gate is HIGH?
a.The input is low
b.The input is high
c.The input changes from low to high
d.Voltage is removed from the gate
45. When the output of an OR gate is LOW?
a.all inputs are LOW
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b.any input is LOW
c.any input is HIGH
d.all inputs are HIGH
46. A 4-variable AND-OR-Invert circuit produces a 0 at its Y output. Which combination of
inputs is correct?
A.
B.
C.
D.none of the above
47. The inverter can be produced with how many NAND gates?
A. 1
B.
2
C. 3
D.
4
48. How many 2-input NOR gates does it take to produce a 2-input NAND gate?
A.
1
B.
2
C.
3
D.
4
49. What is the major difference between half-adders and full-adders?
A. Nothing basically; full-adders are made up of two half-adders.
B. Full adders can handle double-digit numbers.
C. Full adders have a carry input capability.
D.Half adders can handle only single-digit numbers.
50. When performing subtraction by addition in the 2's-complement system:
A. the minuend and the subtrahend are both changed to the 2's-complement.
B. the minuend is changed to 2's-complement and the subtrahend is left in its original form.
C. the minuend is left in its original form and the subtrahend is changed to its 2's-complement.
D.the minuend and subtrahend are both left in their original form.
Reference: http://www.indiabix.com/ - http://www.indiabix.com/digitalelectronics/questions-and-answers/
Faculty Name: U.POORNIMA
Faculty Sign:
Signature of the HOD
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