Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Project: IEEE P802.15 Working Group for Wireless Personal Area Networks (WPANs)
Submission Title: STM_CEA-LETI_CWC_AETHERWIRE_MITSUBISHI_FTR&D 15.4aCFP response
Date Submitted: January 4th, 2005
Source: Ian Oppermann (1), Mark Jamtgaard (2), Laurent Ouvry (3), Philippe Rouzet (4), Andreas F. Molisch(5), Philip
Orlik(5), Zafer Sahinoglu (5), Rick Roberts (6), Vern Brethour (7), Adrian Jennings (7) , Patricia Martigne (8),
Benoit Miscopein (8), Jean Schwoerer (8)
Companies:
(1) CWC-University of Oulu, Tutkijantie 2 E, 90570 Oulu, FINLAND
(2) Æther Wire & Location, Inc., 520 E. Weddell Drive, Suite 5, Sunnyvale, CA 94089, USA
(3) CEA-LETI, 17 rue des Martyrs 38054, Grenoble Cedex, FRANCE
(4) STMicroelectronics, CH-1228, Geneva, Plan-les-Ouates, SWITZERLAND
(5) MERL, 201 Broadway, Boston, USA
(6) Harris, (7)Time Domain, Hansville, Alabama
(8) FT R&D, 28 Chemin des vieux chênes, BP98, 38243 Meylan Cedex
Voice: (1) +358 407 076 344, (2) 408 400 0785 (3) +33 4 38 78 93 88, (4) +41 22 929 58 66 (5) +1 617 621 7500
E-Mail: (1) ian@ee.oulu.fi, (2) mark@aetherwire.com(3) laurent.ouvry@cea.fr, (4) philippe.rouzet@st.com, (5)
{molisch, porlik, zafer}@merl.com, rrober14@harris.com, {vern.brethour, adrian.jennings}@timedomain.com,
(8) {patricia.martigne, benoit.miscopein, jean.schwoerer}@francetelecom.com
Abstract:
UWB proposal for 802.15.4a alt-PHY
Purpose: Proposal based on UWB impulse radio for the IEEE 802.15.4a CFP
Notice: This document has been prepared to assist the IEEE P802.15. It is offered as a basis for discussion and is not
binding on the contributing individual(s) or organization(s). The material in this document is subject to change in
form and content after further study. The contributor(s) reserve(s) the right to add, amend or withdraw material
contained herein.
Release: The contributors acknowledge and accept that this
contribution
becomes
the property of IEEE and may be
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Slide
1
made publicly available by P802.15
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
List of Authors
• CWC – Ian Oppermann, Alberto Rabbachin (1)
• AetherWire – Mark Jamtgaard, Patrick Houghton (2)
• CEA-LETI – Laurent Ouvry, Samuel Dubouloz,
Sébastien de Rivaz, Benoit Denis, Michael Pelissier,
Manuel Pezzin et al. (3)
• STMicroelectronics – Gian Mario Maggio, Chiara
Cattaneo, Philippe Rouzet & al. (4)
• MERL – Andreas F. Molisch, Philip Orlik, Zafer
Sahinoglu (5)
• Harris – Rick Roberts (6)
• Time Domain – Vern Brethour, Adrian Jennings (7)
• France Telecom R&D – Patricia Martigne, Benoit
Miscopein, Jean Schwoerer (8)
Slide 2
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Outline
•
•
•
•
•
•
•
•
•
•
•
•
•
Introduction
Background
Transmitted Signal
Receiver Architectures
Bandwidth Usage
Optional Aspects
System performances
Link budget
Framing, throughput
Power Saving
Ranging and Delay Estimation
Feasibility
Conclusions
Slide 3
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Proposal Main Features
1. Impulse-radio based (pulse-shape independent)
2. Support for different receiver architectures (coherent/noncoherent)
3. Flexible modulation format
4. Support for multiple rates
5. Enables accurate ranging/positioning
6. Support for multiple SOP
Slide 4
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Motivation for (2-4):
• Supports homogenous and heterogeneous network architectures
• Different classes of nodes, with different reliability requirements
(and cost) must inter-work
Slide 5
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
UWB Technology
• Impulse-Radio (IR) based:
– Very short pulses  Reduced ISI
– Robustness against fading
– Episodic transmission (for LDR) allowing
long sleep-mode periods and energy
saving
• Low-complexity implementation
Slide 6
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Modulation Features
•
Simple, scalable modulation format
•
Flexibility for system designer
•
Modulation compatible with multiple
coherent/non-coherent receiver schemes
•
Time hopping (TH) to achieve multiple
access
Slide 7
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Commonalities with Other Proposals
•
The present document is the result of preliminary
merging efforts among the new
CWC/STm/LETI/AetherWire/MERL/Harris/FTR&D/TDC
group. Work is still ongoing for refining and consolidation
of some of the parameters described in this proposal.
•
Discussions are under way for further collaborations and
merging in 802.15.4a.
Slide 8
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Outline
•
•
•
•
•
•
•
•
•
•
•
•
•
Introduction
Background
Transmitted Signal
Receiver Architectures
Bandwidth Usage
Optional Aspects
System performances
Link budget
Framing, throughput
Power Saving
Ranging and Delay Estimation
Feasibility
Conclusions
Slide 9
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Definitions
Coherent RX: The phase of the received carrier
waveform is known, and utilized for demodulation
Differentially-coherent RX: The carrier phase of the
previous signaling interval is used as phase
reference for demodulation
Non-coherent RX: The phase information (e.g. pulse
polarity) is unknown at the receiver
-operates as an energy collector
-or as an amplitude detector
Slide 10
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Pros (+) and cons (-) of RX architectures:
Coherent
•
•
•
•
•
+ : Sensitivity
+ : Use of polarity to carry data
+ : Optimal processing gain achievable
- : Complexity of channel estimation and RAKE receiver
- : Longer acquisition time
Differential (or using Transmitted Reference)
• + : Gives a reference for faster channel estimation (coherent approach)
• + : No channel estimation (non-coherent approach)
• - : Asymptotic loss of 3dB for transmitted reference (not for DPSK)
Non-coherent
• + : Low complexity
• + : Acquisition speed
• - : Sensitivity, robustness to SOP and interferers
Slide 11
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Time Hopping Impulse Radio (TH-IR) - Principle
+1
Tc
Tf
Ts
-1
• Each symbol represented by sequence of very short pulses (see
also Win & Scholtz 2000)
• Each user uses different sequence (Multiple access capability)
•Bandwidth mostly determined by pulse shape
Slide 12
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Transmitted Reference (TR)
• TR schemes simplify the channel estimation process
• Reference waveform available for synchronisation
• Potentially more robust (than non-coherent) under
SOP operation
• Supports both coherent/differentially-coherent
demodulation
• Implementation challenges:
– Analogue: Implementing delay value,
– delay mismatch, jitter
Slide 13
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Transmitted Reference
data
Td
+1
Tc
Tf
reference
Ts
-1
•First pulse serves as template for estimating channel
distortions
•Second pulse carries information
•Drawback: Waste of 3dB energy on reference pulses
Slide 14
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Outline
•
•
•
•
•
•
•
•
•
•
•
•
•
Introduction
Background
Transmitted Signal
Receiver Architectures
Bandwidth Usage
Optional Aspects
System performances
Link budget
Framing, throughput
Power Saving
Ranging and Delay Estimation
Feasibility
Conclusions
Slide 15
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Design Parameters (1)
•
Motivation:
–
–
–
•
Flexible waveform
Simple
Compatible with multiple coherent/non-coherent receiver schemes
Large Bandwidth
•
•
•
•

•
(+) Higher transmit power
(+) improved time resolution
(-) Increased design complexity
(-) Less stringent requirements on out of band interference filtering
Signal BW of 500 MHz - 2 GHz in Upper bands
Signal BW of 700 MHz in 0 to 960 MHz Lower band (low band)
Long Pulse Repetition Period
• (+) more energy per pulse (easier to detect single pulse)
• (+) Lower inter-pulse interference due to channel delay spread
• (-) Higher peak voltage requirements at transmitter
• (-) Longer acquisition time
 Frame duration between 40ns (first realization) and 125ns (second realizations). Higher values
for the frame duration have been mentioned. Further discussions are required to fix the values
Slide 16
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Design Parameters (2)
•
Simple modulation schemes:
• BPPM combined with Transmitted Reference
•
Channelization :
• Coherent schemes: Use of TH codes and polarity codes
• Non-coherent schemes: Use of TH codes (polarity codes for spectrum smoothing
only)
•
Long TH code length
• (+) higher processing gain, robustness to SOP operation
• (-) Lower bit-rate
• (-) Longer acquisition time, shorter frame size (synch. phase)
 TH code length 8 or 16
TH code : binary position (delay of 0 or τΔ ), bi-phase
For first realization, higher-order TH with shorter chip duration (multiples of
2ns) can be used. This is under discussion
Slide 17
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Transmission
• Basic idea: use modulation scheme that allows coherent,
differentially coherent, and incoherent reception
• Combine BPPM with more sophisticated TR scheme
– Non-coherent receiver sees BPPM with pulse stream per bit
– More sophisticated receiver sees BPPM (1 bit) plus bits carried in
more sophisticated modulation scheme (e.g. extended TR)
• Advantages:
– Coherent, differential and non-coherent receiver may coexist
– reference can be used for synch and threshold estimation
• Concept can be generalized to N-ary TR system
Slide 18
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Waveform Design
• Coexistence of coherent and non-coherent architectures
• Combine BPPM with BPSK
• Divide each symbol into two 125 ns BPPM slots (250 ns symbol)
• In either slot transmit a signal that can be received with a variety
of receivers: differentially coherent or coherent receivers.
• Non-coherent receivers just look for energy in the early or late
slots to decode the bit.
• Other receivers understand the fine structure of the signal.
Slide 19
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Waveform Design
• Two possible realizations:
– The whole symbol (consisting of N_f frames) is
BPPM-modulated.
– Have a 2-ary time hopping code, so that each
frame has BPPM according to TH code
Slide 20
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
First Realization
Slide 21
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Second Realization
Ts
« 11 »
2-PPM + TR base
M=2
(with two bits/symbol)
One bit/symbol also
Possible !!!
« 01 »
« 10 »
« 00 »
(coherent decoding possible)
2-PPM + 16 chips 2-ary TH code
This is a time-hopping that can be exploited by non-coherent receiver
Time hopping code is (2,2) code of length 8 or 16
Effectively 28 or 216 codes to select for channelization for non-coherent scheme
Slide 22
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mitigation of peak voltage through multi pulses
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Tf=PPI
ppV = peak-to-peak voltage
M=1
IS « EQUIVALENT » TO
Tf=PPI
M=4
ppV/2
Tf=PPI
M=2
ppV/sqrt(2)
Slide 23
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Coexistence of Different Receiver
Architectures
• Want waveform that allows TR reception
without penalizing coherent reception
• That is achieved by special encoding and
waveform shaping within each frame. Does
not affect the co-existence of coherent/noncoherent receivers
Slide 24
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Basic Properties
• Use of Doublets with memory from previous
bit. (Encoding of reference pulse with
previous bit)
– Agreed on 20ns separation between pulses
– Extensible to higher order TR for either reducing
the penalty in transmitting the reference pulse or
increasing the bit rate?
– Also allows the use of multi-DOUBLET
Slide 25
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Differential Encoding of Bits
b-1
0
b0
b1
b2
b3
b4
b5
0
1
1
0
0
1
-1
-1
+1
+1
-1
-1
+1
-1
+1
-1
+1
-1
Tx Bits
Reference Polarity
Ts
Note: This slide is meant to describe the encoding of data on the reference
pulse and data pulse in the basic modulation format. For simplicity we have
omitted the multipulse/multiframes per symbol structure.
Slide 26
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Total Modulation Scheme (First Realization)
THE KEY SLIDE OF THE PROPOSAL: this is the modulation format that allows
Coherent, differentially coherent, and non-coherent demodulation at once
Slide 27
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Higher-order modulation
D
D
D
τdelay +τΔ
«1»
Basic Mode
(as seen by non-coherent)
D
D
D
τdelay +τΔ
«11»
Enhanced Mode 1
«10»
Pulse Shift,
polarity invert
τΔ + τdelay
TH Code
Data
1,1
1,1
τΔ + τdelay
1,1
1,1
τΔ
τdelay
0,1
1,1
τΔ
τdelay
0,0
1,1
Slide 28
τΔ + τdelay
1,0
1,1
τΔ + τdelay
0,1
0,0
TH Pattern
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Comments on Transmitted Signal
• Frame period for solution 2 is Tframe = (Np * D) + τΔ + τdelay
– Τdelay is some allowance for channel delay spread
• Frame period could be dynamic modified dependant on
– the estimated channel delay spread or
– ability of receiver to cope with delay spread
• Symbol period is length of the TH code x Tframe
– Upper Band Nominally 250 ns x 16 = 4 µs
– Lower Band Nominally 500 ns x 8 = 4 µs
• Realistic Receiver structures exist for multi-pulse TR schemes
(see back-up slides)
Slide 29
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Outline
•
•
•
•
•
•
•
•
•
•
•
•
•
Introduction
Background
Transmitted Signal
Receiver Architectures
Bandwidth Usage
Optional Aspects
System performances
Link budget
Framing, throughput
Power Saving
Ranging and Delay Estimation
Feasibility
Conclusions
Slide 30
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Proposed RAKE -- Coherent Receiver
Channel Estimation
Rake Receiver
Finger 1
Demultiplexer
Rake Receiver
Finger 2
Summer
Sequence
Detector
Convolutional
Decoder
Data
Sink
Rake Receiver
Finger Np
• Addition of Sequence Detector – Proposed modulation may be viewed
as having memory of length 2
• Main component of Rake finger: pulse generator
• A/D converter: 3-bit, operating at symbol rate
• No adjustable delay elements required
Slide 31
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Proposed Transmitted Reference Receiver –
Differentially Coherent
•Addition of Matched Filter prior to delay and correlate operations
improves output signal to noise ratio and reduces noise-noise
cross terms

Matched
Filter
0

Convolutional
Decoder
Td
SNR of decision
statistic
Slide 32
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Differentially-Coherent/Non-Coherent Receiver Architecture
Basic Mode and Enhanced Mode 1
Controlled
Integrator
Band Matched
r(t)
x2
BPF
RAZ
LNA
BPPM Demodulation
branch
Dump
Latch
RAZ
DUMP
ADC
Tracking
Threshol
ds
setting
Ranging branch
ADC
Dump
Latch
Delay
Controlled
Integrator
TR Demodulation
branch
TR
BPPM
Synch
Trigger
Energy Analyzer
Block index for
acquisition
reference
Leading-edge
refinement search
Range info
Recyle this branch for Enhanced Data Rate Modes
Slide 33
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
De-spreading TH Codes
Band Matched
LNA
r(t)
BPF
TH
Sequence Matched
Filter
Bit Demodulation
ADC
Case I - Coherent TH despreading
Band Matched
LNA
r(t)
Bit Demodulation
BPF
b(t)
soft
info
TH
Sequence Matched
Filter
ADC
Case II – Non-coherent / differential TH despreading
Slide 34
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Outline
•
•
•
•
•
•
•
•
•
•
•
•
•
Introduction
Background
Transmitted Signal
Receiver Architectures
Bandwidth Usage
Optional Aspects
System performances
Link budget
Framing, throughput
Power Saving
Ranging and Delay Estimation
Feasibility
Conclusions
Slide 35
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Bandwidth Usage (1/4)
•
Flexible use of (multi-)bands
•
Signal bandwidth may be 500 MHz to 2 GHz
•
Bandwidth may change depending on application and regulatory
environment
•
Optional sub-GHz band 140 MHz to 800 MHz with a center frequency
of 470 MHz
•
Use of TH and/or polarity randomization for spectral smoothing
•
Different bandwidth use options being considered
Slide 36
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Bandwidth Usage – 2GHz option (2/4)
ISM
Band
Upper Band
1
Lower band
0.96
ISM
Band
3.1
Upper Band
3
Upper Band
2
5.1
6.0
Slide 37
8.0 8.1
10.1
GHz
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Bandwidth Usage -500 MHz Option (3/4)
ISM
Band
ISM
Band
Upper Bands
5 - 12
Upper Bands
1-4
Lower band
0.96
3.1
5.1 6.0
8.0 8.1
Slide 38
10.1
GHz
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Bandwidth Usage –Variable Option (4/4)
ISM
Band
ISM
Band
Upper Bands
5 - 12
Upper Bands
1-4
Lower band
0.96
3.1
5.1 6.0
8.0 8.1
Slide 39
10.1
GHz
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Outline
•
•
•
•
•
•
•
•
•
•
•
•
•
Introduction
Background
Transmitted Signal
Receiver Architectures
Bandwidth Usage
Optional Aspects
System performances
Link budget
Framing, throughput
Power Saving
Ranging and Delay Estimation
Feasibility
Conclusions
Slide 40
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Spectral Shaping & Interference Suppression
(Optional)
• Basis pulse: use simple pulse shape
gaussian, raised cosine, chaotic, etc.
Monocycle, 5th derivative of gaussian pulse
10log10|P(f)|2 dB
Power spectral density of the monocycle
• Drawbacks:
– Possible loss of power compared to FCCfrequency (Hz)
allowed power
– Strong radiation at 2.45 and 5.2 GHz
Slide 41
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Linear Pulse Combination
• Solution: linear combination of delayed, weighted pulses
– Adaptive determination of weight and delay
– Number of pulses and delay range restricted
– Can adjust to interferers at different distances
(required nulldepth) and frequencies
• Weight/delay adaptation in two-step procedure
• Initialization as solution to quadratic optimization problem
(closed-form)
• Refinement by back-propagating neural network
• Matched filter at receiver good spectrum helps coexistence
and interference suppression
Slide 42
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Spectral Shaping & Polarity Scrambling
Td = 10 ns
-120
-130
-140
-150
-160
-170
-180
Td = 20 ns
-190
-200
-210
-220
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
10
x 10
W/O Polarity Scrambling
Slide 43
W/ Polarity Scrambling
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Adaptive Frame Duration
• Advantage of large number of pulses per symbol:
– Smaller peak-to-average ratio
– Increased possible number of SOPs
• Disadvantage:
– Increased inter-frame interference
– In TR: also increased interference from reference pulse to
data pulse
• Solution: adaptive frame duration
– Feed back delay spread and interference to transmitter
– Depending on those parameters, TX chooses frame duration
Slide 44
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Outline
•
•
•
•
•
•
•
•
•
•
•
•
•
Introduction
Background
Transmitted Signal
Receiver Architectures
Bandwidth Usage
Optional Aspects
System performances
Link budget
Framing, throughput
Power Saving
Ranging and Delay Estimation
Feasibility
Conclusions
Slide 45
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
PER in 15.4a Channel Model
Non-Coherent (Energy Collection) BPPM
2PPM - PER vs. E b / N0 - 15.4a Channel Models
0
10
Packet Error Rate
X1-CM8:
X2-CM1:
X3-CM5:
X4-CM9:
Framing format:
industrial NLOS
Residential LOS
Outdoor LOS
Agricultural Areas
Preamble SFD
LEN
(32 bits) (8 bits) (8 bits)
MHR+MSDU
(240 bits)
CRC
(16 bits)
• Simulations over 1000 channel responses
• BW = 2GHz – Integration Time = 80ns
• Implementation loss + Noise figure margin : 11 dB
• Max range is determined from:
 Required Eb/N0,
 Implementation margin
 Path loss characteristics
-1
10
-2
10
16
17
18
19
Eb / N0 [dB]
20
21
22
X1 (CM8)
X2 (CM1)
X3 (CM5)
X4 (CM9)
Case I: 250 kbps – PRP 250 ns
with 16 pre-integrations = 4 µs
Required Eb/N0
19.5 dB
20 dB
21 dB
21.5 dB
Max Range (I)
10.78 m
84.61 m
86.72 m
58.67 m
Case II: 250 kbps – PRP 500 ns
with 8 post-integrations
Max Range (II)
7.33 m
53.25 m
54.15 m
34.72 m
Slide 46
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
PER/BER in 15.4a Channel Model
DBPSK (RAKE)
DBPSK – PER vs. Eb/N0 – 15.4a Channel Models
0
BER vs Eb/N0 for binary modulations - 100 equivalent uncorrelated samples
10
ideal MRC BPAM solution
Differentially coherent BPAM
X1
X2
X3
X4
-1
10
-2
-1
10
BER
10
-3
PER
10
-4
10
-2
10
-5
10
0
5
10
15
Eb/N0 (dB)
Theoretical BER Curves – Integration Time = 50 ns
-3
10
10
11
12
13
14
15
16
Eb/N0 (dB)
Case I: 250 kbps – PRP 250 ns
with 16 pre-integration = 4 µs
Case II: 250 kbps – PRP 500 ns
with 8 post-integrations
17
18
19
20
Implementation loss and Noise figure margin : 11 dB
X1 (CM8)
X2 (CM1)
X3 (CM5)
X4 (CM9)
Required Eb/N0
18 dB
17.5 dB
18.5 dB
18.5 dB
Max Range (I)
12.66 m
116.70 m
120.27 m
90.84 m
Max Range (II)
9.18 m
79.34 m
81.23 m
58.67 m
Slide 47
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Outline
•
•
•
•
•
•
•
•
•
•
•
•
•
Introduction
Background
Transmitted Signal
Receiver Architectures
Bandwidth Usage
Optional Aspects
System performances
Link budget
Framing, throughput
Power Saving
Ranging and Delay Estimation
Feasibility
Conclusions
Slide 48
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Link Budget:
Non-Coherent (Energy Collection) BPPM
Mandatory Value
(PRP = 4 µs)
Optional Value
(PRP = 500ns - 8 integrations)
250 kb/s
250 kb/s
-10.64 dBm
-10.64 dBm
0 dBi
0 dBi
3.873 GHz
3.873 GHz
44.20 dB
44.20 dB
29.54 dB @ d = 30 m
29.54 dB @ d = 30 m
0 dBi
0 dBi
Rx Power (PR = PT + GT + GR – L1 – L2)
-84.38 dBm
-84.38 dBm
Average noise power per bit: N = -174 + 10log10(Rb)
-120.02 dBm
-120.02 dBm
7 dB
7 dB
-113.02 dBm
-113.02 dBm
Minimum Eb/N0 (S)
14 dB
17.6 dB
Implementation Loss (I)
5 dB
5 dB
9.64 dB
6.04 dB
-94.02 dBm
-90.42 dBm
Parameter
Peak Payload bit rate (Rb)
Average Tx Power Gain (PT)
Tx antenna gain (GT)
f’c: (geometric frequency)
Path Loss @ 1m: L1 = 20log10(4..f’c / c)
Path Loss @ d m: L2 = 20log10(d)
Rx Antenna Gain (GR)
Rx noise figure (NF)
Average noise power per bit (PN = N + NF)
Link Margin (M = PR - PN – S – I)
Proposed Min. Rx Sensitivity Level
Slide 49
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Link Budget: DBPSK (RAKE)
Mandatory Value
(PRP = 4 µs)
Optional Value
(PRP = 500ns - 8 integrations)
250 kb/s
250 kb/s
-10.64 dBm
-10.64 dBm
0 dBi
0 dBi
3.873 GHz
3.873 GHz
44.20 dB
44.20 dB
29.54 dB @ d = 30 m
29.54 dB @ d = 30 m
0 dBi
0 dBi
Rx Power (PR = PT + GT + GR – L1 – L2)
-84.38 dBm
-84.38 dBm
Average noise power per bit: N = -174 + 10log10(Rb)
-120.02 dBm
-120.02 dBm
7 dB
7 dB
-113.02 dBm
-113.02 dBm
Minimum Eb/N0 (S)
13 dB
16 dB
Implementation Loss (I)
5 dB
5 dB
10.64 dB
7.64 dB
-95.02 dBm
-92.02 dBm
Parameter
Peak Payload bit rate (Rb)
Average Tx Power Gain (PT)
Tx antenna gain (GT)
f’c: (geometric frequency)
Path Loss @ 1m: L1 = 20log10(4..f’c / c)
Path Loss @ d m: L2 = 20log10(d)
Rx Antenna Gain (GR)
Rx noise figure (NF)
Average noise power per bit (PN = N + NF)
Link Margin (M = PR - PN – S – I)
Proposed Min. Rx Sensitivity Level
Slide 50
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Outline
•
•
•
•
•
•
•
•
•
•
•
•
•
Introduction
Background
Transmitted Signal
Receiver Architectures
Bandwidth Usage
Optional Aspects
System performances
Link budget
Framing, throughput
Power Saving
Ranging and Delay Estimation
Feasibility
Conclusions
Slide 51
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Framing – 802.15.4 Compatible
Octets
PHY layer
4
1
1
32
Preamble
SFD
Frame
length
PSDU = MPDU
PHR
PSDU (PHY Service Data Unit)
SHR
PPDU (PHY Protocol Data Unit)
Beacon slot
0
BP
1
2
CAP slot
3
4
5
CAP
6
7
CFP slot
8
BP : Beacon Period
CAP : Contention Access Period
CFP : Contention Free Period
IP : Inactive Period (optional)
9 10 11 12 13 14 15
CFP
IP
Superframe Duration
Beacon Interval
Slide 52
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Throughput
Data Frame (32 octet PSDU)
Bytes
4
PHY layer Preamble
SHR
1
1
32
SFD
Frame
length
PSDU = MPDU
PHR
PSDU (PHY Service Data Unit)
ACK Frame (5 octet PSDU)
Bytes
PHY layer Preamble
•
1
1
5
SFD
Frame
length
PSDU
PHR
PSDU
SHR
PPDU (PHY Protocol Data Unit)
Tdata
4
PPDU (PHY Protocol Data Unit)
T_ACK
Tack
IFS
Numerical example (high-band)
•
Preamble + SFD + PHR = 6 octets
•
Tdata = 1.216 ms
•
T_ACK = 50 ms (turn around time requested by IEEE 802.15.4 is 192ms)
•
Tack = 0.352 ms
•
IFS = 100μs
 Throughput = 32 octets/1.718 ms = 149 kb/s
 Average data-rate at receiver PHY-SAP 250 kb/s (Basic Mode)
Slide 53
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Outline
•
•
•
•
•
•
•
•
•
•
•
•
•
Introduction
Background
Transmitted Signal
Receiver Architectures
Bandwidth Usage
Optional Aspects
System performances
Link budget
Framing, throughput
Power Saving
Ranging and Delay Estimation
Feasibility
Conclusions
Slide 54
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Saving Power
•
Power Saving techniques achieved by combining advantages offered at 3 levels:
– Technology (best if CMOS)
– Architecture (flexible schemes provided by the TH+pulse modulation)
– System level (framing, protocol usage)
•
Selected techniques used in one existing realization (see proof of concept slides)
– Low-duty cycle Episodic transmission/reception
• Scheduled wake-up
• 80ms RTOS tick
– Ad-hoc networking using multi-hop
• Special rapid acquisition codes / algorithm
• Matchmaking further reduces acquisition time
– Multi-stage time-of-day clock
• Synchronous counter / current mode logic for highest speed stages
• Ripple counter / static CMOS for lowest speed stages
– Compute-intensive correlation done in hardware
Slide 55
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Outline
•
•
•
•
•
•
•
•
•
•
•
•
•
Introduction
Background
Transmitted Signal
Receiver Architectures
Bandwidth Usage
Optional Aspects
System performances
Link budget
Framing, throughput
Power Saving
Ranging and Delay Estimation
Feasibility
Conclusions
Slide 56
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Ranging
• Motivation :
– Benefit from high time resolution (thanks to signal bandwidth):
• Theoretically: 2GHz provides less than 20cm resolution
• Practically: Impairments, low cost/complexity devices should
support ~50cm accuracy with simple detection strategies (better
with high resolution techniques)
• Approach :
– Use Two Way Ranging between 2 devices with no network
constraint (preferred); no need for time synchronization among
nodes
– Use One Way Ranging and TDOA under some network
constraints (if supported)
Slide 57
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
TOA Delay Estimation - Non-Coherent
•
Use bank of integrators to determine coarse synchronisation “uncertainty”
region
–
•
Symbol synchronisation “uncertainty” region given by coarse synchronisation ( e.g., 4ns-20ns)
A refinement search is applied onto the uncertainty region by either
– further dividing it into narrower non overlapping regions for non-coherent refinement
(e.g., 1ns –> 4ns) or
– Coherent search with a template correlation
Integrator outputs
r (t )
 | r (t  kTRB ) |
2
k {0,1,.. N}
4ns  TRB  20 ns
E1
E2 ... E N 
TRB: the length of uncertainty region
N  T f / TRB
Energy
Analyzer
Detects the coarse
“uncertainty region”
k̂ LE
Leading Edge
Search Refinement
Performed within
the selected
uncertainty region
Range info
Slide 58
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
TOA Delay Estimation - Non-Coherent (cont’d)
•
•
The algorithm selects the maximum value integration window index and
then it searches backward to find the first integration value which crosses
an adaptively set threshold.
If there are no values crossing the threshold, the peak position is used for
the TOA estimation.
MES-SB based TOA Estimate
Searchback window
Strongest Path, energy block
Threshold based TOA Estimate
Threshold
N
0 1 2
Actual TOA
MES: Maximum Energy Search
TC: Threshold comparison
SB: Search Back
Contains leading
edge
MES based TOA Estimate
Slide 59
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
ENERGY Spread in CM1
• PDF of TOA estimation errors are illustrated for MES
at various EbN0
– CM1, integration interval 4ns, Tf=200ns (results will be updated for
Tf=240ns)
Slide 60
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Ranging Simulation Settings
Notations and Terms
Definition
Value in Simulations
Tf
Pulse repetition interval, frame
Nb
Number of blocks within a Tf
50
Nc
Number of refinement intervals within a Tf
400
TH{}
POL{}
200ns
Time hopping sequence in chips
{h1, ...., h5}
Polarity codes
{p1, ..., p5}
N1
Number of frames in the 1st-step
50
N2
Number of frames in the refinement
30
BW
Bandwidth
C
2GHz
Number of correlators (refinement stage)
10
Note: Results are to be provided when Tf is set to 240ns.
Slide 61
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Ranging Results
• IEEE 802.15.4a CM1-Residential LOS
True Distance (m)
One-way ranging error
(confidence level)
25m
8cm (97%)
30m
8cm (~90%)
Round Trip ranging error
(with no drift compensation)
– ~16cm (0.088ms),
no clock drift
– ~17.1cm (1ppm)
– ~20.1cm (4ppm)
– ~26cm (10ppm)
– ~56cm (40ppm)
Slide 62
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Two Way Ranging (TWR)
doc.: IEEE 802. 15-05-0130-01-004a
Mar. 2005
Main Limitations / Impact of Clock Drift on Perceived Time
TReply  A  f B 
~
TOF A  TOF A 1  f A  
21  f B 
. f 0 Is the frequency offset relative to the nominal ideal frequency
Range estimation is affected by :
• Relative clock drift between A and B
250 kbps, 38 bytes
PPDU
f0
500 kbps, 9 bytes
PPDU
• Prescribed response delay
f/f \ Treply
(max error)
1408 ms
1226 ms
336 ms
154 ms
• Clock accuracy in A and B
4 ppm
1.69 m
1.47 m
0.40 m
0.18 m
25 ppm
10.56 m
9.19 m
2.52 m
1.15 m
40 ppm
16.9 m
14.7 m
4.0 m
1.8 m
•Channel response (weak direct path)
Example using Imm-ACK SIFS of 15.4 and 15.3
of respectively 192us and 10 us
and PPDU size of respectively 38 and 9 bytes
Simple immediate TWR made unusable with reasonnable crystal accuracies. Solution is :
• Performing fine drift estimation/compensation
• Benefiting from cooperative transactions Slide
(estimated
clock
ratios …)
CWC/AETHERWIRE/CEA-LETI/STM/MERL
63
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Outline
•
•
•
•
•
•
•
•
•
•
•
•
•
Introduction
Background
Transmitted Signal
Receiver Architectures
Bandwidth Usage
Optional Aspects
System performances
Link budget
Framing, throughput
Power Saving
Ranging and Delay Estimation
Feasibility
Conclusions
Slide 64
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Antenna
Feasibility
Return Loss
Capacitive Dipole and Various Bowtie Antennas
0
-5
measured dipole
measured v2
measured v3
simulated v2
simulated v3
-20
-25
-30
-35
9.96
9.24
8.52
7.79
7.07
6.35
5.62
4.9
4.18
3.45
2.73
-40
2.01
dB
-10
-15
GHz
55 mm
40 mm
Bowtie antenna
Slide 65
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
“Proof-of-Concept” (1)
Non-coherent Transceiver
Non-coherent,
Energy Collection Receiver
Fref
TX
DLL
PG
DIGITAL
LOGIC
DLL
CM
33 MHz
UWB
ANTENNA
UWB
PG
SWITCH
528 MHz
x16
5 Mbps BPPM
350 ps pulse train
with long scrambling code
Oscilator Generator
Control
line
DIGITAL
CONTROL
LOGIC
Flagrst
1
....
Flagrst
8
2
Energy
collection
/2
A/D
Converter
VGA
LNA
( )
DETECTION
BIT
DECISION
BASEBAND
DSP
(decision logic)
(digital)
GAIN SELECTION
RX
Slide 66
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
“Proof-of-Concept” (2)
Non-coherent Transceiver
UWB-IR BPPM Non-Coherent Transceiver Implementation
UWB Transmitter
400 μm x 400 μm
0.35 μm CMOS
UWB Transceiver
Test architecture <10 mm2
0.35 μm SiGe Bi-CMOS
Slide 67
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
“Proof-of-Concept” (3):
Transmitter - Lower Band
P-Channel Drivers
Delay
Buffers
N-Channel Drivers
N-C
UWB Transmitter chip for
generating impulse doublets
Slide 68
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
VGC Amp
DACs
32 Time-Integrating
Correlators
PLL Loop Filter
DACs
Code
Sequence
Generators
“Rails” for testing
analog circuits
LF RTC
High-Frequency
Real Time Clock
“Proof-of-Concept” (4):
Receiver - Lower Band
Coherent UWB Receiver with
multiple time integrating correlators
Slide 69
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
“Proof-of-Concept” (5)
High Speed Coherent Circuit Elements
RF front end chips in CMOS 0.13mm, 1.2V
20 GHz digitizer for UWB
20 GHz DLL for UWB
3-5 GHz LNA
Chip and layout
Slide 70
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Outline
•
•
•
•
•
•
•
•
•
•
•
•
•
Introduction
Background
Transmitted Signal
Receiver Architectures
Bandwidth Usage
Optional Aspects
System performances
Link budget
Framing, throughput
Power Saving
Ranging and Delay Estimation
Feasibility
Conclusions
Slide 71
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Conclusions
•
Proposal based upon UWB impulse radio
–
–
High time resolution suitable for precise ranging using TOA
Modulation:
•
•
•
•
•
System tradeoffs
–
–
•
Modulation optimized for several aspects (requirements, performances, flexibility,
technology)
Trade-off complexity/performance RX
Flexible implementation of the receiver
–
–
•
Pulse-shape independent
Robust under SOP operation
Facilitates synchronization/tracking
Supports multiple coherent/non-coherent RX architectures
Coherent, differential, non-coherent (energy collection)
Analogue, digital
Fits with multiple technologies
–
–
Easy implementation in CMOS
Very low power solution (technology, architecture, system level)
Slide 72
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Backup Slides
Slide 73
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
BER Performance in AWGN Channel
10-1
MRC Solution (coherent)
Differential Solution
Energy Collection solution in OOK
Transmitted Reference (one pulse)
BER
10-2
10-3
10-4
10-5
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20
Eb/N0
-3 dB : the “reference” is not in the same PRP !
p packet
 1  1  bit error 
N
error
PER = 1% with 32 bytes PSDU  acceptable BER 4x10-5 with no channel coding
Slide 74
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
BER Performance in AWGN Channel
Slide 75
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Antenna Practicality
• Bandwidth: 3 GHz-10 GHz
z
antenna hat
Ø 24 mm
• Form factor
• Omni-directional
q
7 mm
y
j
0
M.S.
measured
-2
x
-4
ground plane
Ø 80 mm
-6
-8
-10
-12
-14
-16
-18
-20
-22
-24
-26
2
3
4
5
6
7
8
9
10
11
12
frequency (GHz)
Slide 76
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Positioning from TDOA
Anchor 3
3 anchors with known
positions (at least) are
required to find a 2D-position
from a couple of TDOAs
(xA3,yA3)
Anchor 2
(xA2,yA2)
Mobile
Estimated Position
Measurements
~ ~
d32 , d31
d32 
d31 
x
x
~
xM , ~
yM
Specific Positioning
Algorithms
A3
 xM
A3
 xM
  y
  y
(xm,ym)
A3
 yM
A3
 yM
2
2


2
2


x
x
A2
 xM
A1  xM
Slide 77
Anchor 1
  y
  y
2
2
A2
 yM
A1  yM


(xA1,yA1)
2
2
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
TR BPPM Scheme Comparison
Slide 78
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Assumptions and Notes
• Results are theoretical calculations
• Assumes ideal ”impulse” UWB pulses in
AWGN channel
• Different TR-BBP options are considered with
different number of pulses per pulse train
• Multipath fading simulations can be performed
to back up theory
Slide 79
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Pulse repetition structures
TR BPPM with doublets (Scheme 1)


Slide 80
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Pulse repetition structures
TR BPPM single reference (Scheme 2)


Slide 81
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Pulse repetition structures
Auto Correlation BPPM with doublets (Scheme 3)

Slide 82

CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Pulse repetition structures
Auto Correlation BPPM single reference (Scheme 4)


Slide 83
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Pulse repetition structures
Auto Correlation BPPM alternate (Scheme 5)


Slide 84
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Parameters
• PPI slot - slot inside each TH chip containing
a burst of pulses including reference pulses
(ref. slides from Laurent / CEA)
• Np represents the number of pulses in each
PPI slot
• The energy E per PPI slot is kept constant
• The pulse energy Ep = E/Np
• TW represent the time-bandwidth product
Slide 85
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Ep/N0 degradation versus number of pulses per pulse train
Slide 86
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Ep/N0 degradation versus Time/Bandwidth product
Slide 87
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Ep/N0 degradation versus number of pulses per pulse train
Slide 88
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Conclusions
• Scheme 5 - “AC Alternate” performs better then all the other
pulse repetition structures.
• AC generally performs better than TR
• “AC alternate” and “AC with doublets” have the advantage of
requiring only a single delay line.
• Scheme 5 - “AC Alternate”, was proposed at Monterey meeting
in January.
• Criticism was given based on ”accumulated noise” in noisecross-noise-cross-noise... Products”.
• Seems to outperform other schemes with simple analysis
• Also more readily implementable since fixed delay line can be
used.
Slide 89
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Channel / Delay Estimation
Coherent Approach
Slide 90
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Channel / Delay Estimation
Coherent Approach
• Swept delay correlator
• Principle: estimating only one channel sample per symbol.
Similar concept as STDCC channel sounder of Cox (1973).
• Sampler, AD converter operating at SYMBOL rate (1.2
Msamples/s)
• Requires longer training sequence
• Two-step procedure for estimating coefficients:
– With lower accuracy: estimate at which taps energy is
significant
– With higher accuracy: determine tap weights
• “Silence periods”: for estimation of interference
Slide 91
CWC/AETHERWIRE/CEA-LETI/STM/MERL
Mar. 2005
doc.: IEEE 802. 15-05-0130-01-004a
Optimal Energy-Threshold Analysis (CM-1)
•
Optimal normalized threshold (normalized with respect to the difference between
the maximum and minimum energy blocks) changes with Eb/N0 and block size.
•
Smaller thresholds are required in general at high Eb/N0, while larger thresholds
at lower SNR values
MAE
Mean Absolute Error in
detecting leading energy
block with simple
threshold crossing (1000
channel realizations)
Eb/N0 : {8 --- 26dB}
Slide 92
CWC/AETHERWIRE/CEA-LETI/STM/MERL