How to Convert a PLB-based Embedded
System to an AXI-based System
FPGA and ASIC Technology
Comparison - 1
© 2009 Xilinx, Inc. All Rights Reserved
Objectives
After completing this module, you will be able to:
 Explain what the AXI protocol is
 Identify the advantages of the AXI protocol over a shared bus model
 List the various AXI-based system architectural models
FPGA and ASIC Technology
Comparison - 2
© 2009
2007 Xilinx, Inc. All Rights Reserved
AXI is Part of AMBA
 Advanced Microcontroller Bus Architecture
AMBA
APB
AHB
Performance
FPGA and ASIC Technology
Comparison - 3
© 2009
2007 Xilinx, Inc. All Rights Reserved
AXI
The ARM AXI
 Is an interface and protocol definition and is not a bus standard
– Preproduction in the EDK 12.3 release
– Currently, only targets the MicroBlaze soft processor core
• Only for Spartan-6 and Virtex-6 devices
• Most EDK peripherals will support AXI with the EDK 13.1 release
 Who should migrate their design?
– Anyone that believes the features are beneficial (AXI advantages are coming
up)
– Anyone building an embedded design that will target the next generation of
product families (after Spartan-6 and Virtex-6)
FPGA and ASIC Technology
Comparison - 4
© 2009
2007 Xilinx, Inc. All Rights Reserved
Pre-Production AXI
 ISE Design Suite 12.3 is a pre-production release for designs that use AXI IP
– The AXI IP peripherals in this release have not yet completed qualification for
use in production designs
– Some wizard functionality in Xilinx Platform Studio does not yet fully support
AXI-based designs
 For ISE Design Suite 12.3, pre-production status applies only to designs
making use of AXI IP peripherals
– If you design does not use these peripherals then your ok
FPGA and ASIC Technology
Comparison - 5
© 2009
2007 Xilinx, Inc. All Rights Reserved
AXI is an Interface Specification
PLB46
Processor
“Shared Access” Bus
Interconnect
PLB
AXI Slaves
AXI Masters
Peripherals
AXI
AXI
AXI
AXI
AXI
AXI
AXI Interconnect IP
PLB
 Implementation is not
described in the spec
 Several companies build and
sell “AXI interconnect IP”
 Xilinx is building its own
PLB
PLB
AXI
AXI
AXI
AXI
Arrows indicate master/slave relationship,
not direction of dataflow
Arbiter
FPGA and ASIC Technology
Comparison - 6
AXI is an interface
specification, not a bus
specification
© 2009
2007 Xilinx, Inc. All Rights Reserved
Master
Slave
Why use AXI?
 Higher performance
– AXI allows systems to be optimized for highest Fmax, maximum throughput,
lower latency or some combination of those attributes. This flexibility enables
you to build the most optimized products for your markets
 Easier to use
– By consolidating a broad array of interfaces into AXI, you only need to know one
family of interfaces, regardless of whether they are embedded, DSP or logic
users. This makes it easier to integrate IP from different domains, as well as
developing your own IP
 Enable ecosystem
– Partners are embracing the move to AXI: an open, widely adopted interface
standard. Many of them are already creating IP targeting AXI and other AMBA®
interfaces. This gives you a greater catalog of IP, ultimately leading to faster
time to market
FPGA and ASIC Technology
Comparison - 7
© 2009
2007 Xilinx, Inc. All Rights Reserved
AXI is Part of AMBA
Enhancements for FPGAs
AMBA
APB
AHB
AXI
ATB
AMBA 3.0
(2003)
AXI-4
Memory Map
AXI-4
Stream
AXI-4
Lite
AMBA 4.0
(Just Announced)
Same Spec
Interface
Features
Similar to
Memory Map /
Full
Traditional Address/Data Burst
PLBv46, PCI
Streaming
Data-Only, Burst
Local Link / DSP Interfaces
/ FIFO / FSL
Lite
Traditional Address/Data—No Burst
PLBv46-single
(single address,©single
data)
2007 Xilinx, Inc. All Rights Reserved
2009
OPB
(single address, multiple data)
FPGA and ASIC Technology
Comparison - 8
Design Conversion
 Re-building the Embedded System is usually best
– This is NOT difficult
• Adding processors, busses, and IP is literally “drag-and-drop”
• Custom IP…has some challenges
 If the IP was built with the IP Wizard, the IP can be migrated using templates
provided in the following solution record
– http://www.xilinx.com/support/answers/37425.htm
 If the IP cannot be altered to AXI, just add the AXI-to-PLB bridge component
– This is described in the Xilinx AXI Reference Guide
 If the IP was built from scratch, refer to the “Memory Mapped IP Feature
Adoption and Support,” in the Xilinx AXI Reference Guide
FPGA and ASIC Technology
Comparison - 9
© 2009
2007 Xilinx, Inc. All Rights Reserved
Documentation
 Xilinx AXI Reference Guide, UG761
– AXI Usage in Xilinx FPGAs
• Introduce key concepts of the AXI protocol
• Explains what features of AXI Xilinx has adopted
– PLB-to-AXI Migration Guide
• Handbook for existing embedded customers
– How to create and import AXI IP
– How to debug and verify designs using ChipScope
– How to convert PLB-based IP to AXI
 ARM specifications
– AMBA AXI Protocol Version 2.0
– AMBA 4 AXI4-Stream Protocol Version 1.0
– http://infocenter.arm.com/help/topic/com.arm.doc.set.amba
FPGA and ASIC Technology
Comparison - 10
© 2009
2007 Xilinx, Inc. All Rights Reserved
Summary
 AXI is a signal interface protocol, not a shared bus standard
 AXI offers higher performance, ease of use, and has the support of many
partners
 The AXI protocol has three different configurations
– Memory Map/Full for OPBv46 replacement
– Streaming for data streaming applications
– Lite for simpler systems
 The Xilinx AXI Reference Guide, UG761 contains more details about the AXI
protocol and explains how to migrate IP to AXI
FPGA and ASIC Technology
Comparison - 11
© 2009
2007 Xilinx, Inc. All Rights Reserved
Where Can I Learn More?
 Xilinx Education Services courses www.xilinx.com/training
– Embedded Systems Development course
• EDK tool training
• How to build custom IP
• How to build your system software
– Advanced Features and Techniques of Embedded Systems Design course
• How to debug your software on your hardware system with ChipScope
• How to optimize the use of the available memory controllers
• How to design a Flash memory-based system and boot load from an off-chip
memory
• How to add an interrupt controller into your hardware and software system
– Embedded Systems Software Development course
• Software development and debugging with SDK
• How to profile your software and develop custom device drivers
FPGA and ASIC Technology
Comparison - 12
© 2009
2007 Xilinx, Inc. All Rights Reserved
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FPGA and ASIC Technology
Comparison - 13
© 2009
2007 Xilinx, Inc. All Rights Reserved