ECE 291
Lecture 3:
The 80x86 Instruction Set Architecture
Registers-Instructions
Constantine D. Polychronopoulos
Spring 2000
CDP
ECE 291 -- Spring 2000
Registers in Microprocessors
•
Store elements close to ALU - 1 clock read/write access
•
Registers keep operands and intermediate results
•
Operations done on register operands are MUCH faster than those
done on memory operands (1-clock vs. 5+ (L1), 20+ (L2) or 50+ (Mem)
•
Registers also keep flags and signals. For example, in x86:
– C (Carry)
– O (Overflow)
– Z (Zero)
– T (Trap)
•
CDP
User (general-purpose) and System (restricted) registers
ECE 291 -- Spring 2000
Instructions
• Assembly or machine instructions have three components
– Operation code (Opcode): specifies what the instr. Does
– Operand specifiers: specify registers or memory holding operand(s)
– Destination specifier: specifies where in regs or memory to store result
– [Condition/interpretation fields: specify how to interpret operand data or
which fields to access]
• We use symbolic names to denote opcodes (ADD, SUB, CMP, …) as
well as operands (register specifiers as AX, SP, etc)
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ECE 291 -- Spring 2000
Instructions
• Instructions operate on register, memory or constant operands
• Arithmetic instructions
– Integer & Floating point arithmetic instructions
– +, -, *, / (ADD, SUB, MUL, DIV)
• Logic & Shift instructions
– Shift left (SHL), Shift right (SHR)
– Rotate left (ROL), Rotate right (ROR)
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ECE 291 -- Spring 2000
Instructions (Cont.)
• Memory instructions
– MOVE, LOAD, STORE
• Control flow instructions
– conditional/unconditional branches
– Loops
– Cases
– Subroutine calls
• Other (I/O, graphics, etc)
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ECE 291 -- Spring 2000
80x86 Registers
• General Registers
– AX (AH,AL): Accumulator, Math operations, offset (General Purpose)
– BX (BH,BL): Offset, Address/Pointer
– CX(CH,CL): Counting & Looping
– DX(DH,DL): Data, Most Sig. bytes of a 16-bit MUL/DIV
• Index Registers
– SP: Stack pointer - Used by PUSH/POP Automatically!!
– BP: Mem. Base pointer + Stack operations: parameters of a subroutine
– SI: Source Index (arrays & strings)
– DI: Destination Index (arrays & strings)
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ECE 291 -- Spring 2000
Registers (Cont.)
• Segment Registers: Point to different segments of memory that
store code, data, stack, etc. Segment regs combined with other
regs that provide offset can be used to compute memory
addresses.
– CS: Code Segment: Starting address of user code. Used with
Instruction Pointer (IP) to fetch instructions. Defines start of
64Kb code segment for <286, and up to 4Gb for >286.
– DS: Default (Data) Segment: Variables and user data structures
– SS: Stack Segment: Defines stack segment for subroutines & local
variables in procedures. SS + SP define stack entry point.
– ES: Extra Segment: Additional data segment for String
destination data
– FS & GS: Supplemental segment registers for additional segments
in 386 and above only.
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ECE 291 -- Spring 2000
80x86 Processor Registers
General-purpose registers
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ECE 291 -- Spring 2000
Flag Registers
31
0
21
ID VIP VIF AC VM RF
NT IOP IOP O D I T S Z
A
P
EFLAG Register
• Flags are set by operations and are checked by instructions or
OS to detect specific events and take appropriate action.
• Rightmost 5 flags are set by ALU instructions:
– C: Carry of addition or subtraction (borrow)
– P: Parity (0 - odd, 1 - even)
– A: Auxiliary carry captures carry between bit positions 3 & 4 and
used for BCD arithmetic (used by DAA & DAS instructions)
– S: sign bit (0-positive, 1-negative) used by arithmetic & logic instr.
– Z: Zero - set (to 1) only when the result of an ALU op is zero!
– T: trap - if enabled (1) exec. of the program halts
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ECE 291 -- Spring 2000
C
EFLAG register
31
0
21
ID VIP VIF AC VM RF
NT IOP IOP O D I T S Z
A
P
C
EFLAG Register
– I: Interrupt - controls op of INTR input pin: if I=1 the interrupt pin is
enabled, otherwise disabled. Instructions STI (set I flag) and CLI (clear
I flag) access I.
– D: direction - increment/decrement mode for SI & DI for string ops. D is
set/cleared with STD & CLD instr.
– O: Overflow - overflow in signed mode arithmetic ops
– IOPL: I/O privilege level - 00 highest, 11 lowest
– NT: Nested task - current task nested within another in protected mode.
– RF: Resume - used in debug mode to resume exe after current inst.
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ECE 291 -- Spring 2000
EFLAG register
31
0
21
ID VIP VIF AC VM RF
NT IOP IOP O D I T S Z
A
EFLAG Register
– VM: Virtual mode - virtual mode in protected mode.
– AC: alignment check - if words/doublewords addressed in nonword boundaries (only 486)
– VIF: Virtual interrupt flag - Pentium and above
– VIP: Virtual interrupt pending - interrupts in VM
– ID: Identification - CPUID identification number
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ECE 291 -- Spring 2000
P
C
Segment Registers - Memory Addresses
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ECE 291 -- Spring 2000
Stack-Manipulation Registers
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Shift/Rotate Registers
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Instruction Format
• ALL instructions have the following specifiers:
– OPCODE: a field that specifies the operation to be done
– OPERAND(S): one or more fields giving the operands or the location
where the operands can be found
– DESTINATION: a field that specifies the location (register or
memory) where the result of the operation is to be stored
– [Descriptor fields]: Special bit specifiers that allow for different
interpretation of the same field (e.g. register or offset specifier)
• ASSEMBLY INSTRUCTIONS: symbolic (mnemonic) versions of
machine instructions
• MACHINE INSTR. Or BINARY CODE: Binary codes that give the
specific value for each of the above fields
• Assembly program ==> ASSEMBLER (MASM) ==> Machine code
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ECE 291 -- Spring 2000
Instruction Format: x86
• In 80x86 instructions can vary in length from 8-bits (1b) to more
than 100-bits (13b)
• REAL MODE:
– Default instruction size is 16-bits
• 16-bit registers & 16-bit offset fields
• RPOTECTED MODE:
– Default instruction size is 32-bits (x386 and above)
• 32-bit registers & 32-bit offset fields
– D-bit in descriptor specifies real or protected mode:
• D=0: (real-mode) 16-bit instructions, register values and addresses
• D=1: (protected mode) 32-bit instructions, reg. values and addresses
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ECE 291 -- Spring 2000
Addressing Modes
• Immediate: Move an immediate value (in the field itself) to the
destination register or memory location:
– MOV
AX, 7F55H
• Register: Move a byte or word from the source register to the
destination register or memory location:
– MOV
AX, BX
• Direct: Move a byte/word from a memory location to a register or
memory location:
– MOV
CDP
AX, [7777H]
ECE 291 -- Spring 2000
Addressing Modes
• Base-relative or indexed: Move a byte/word between a register
and mem. Location specified by an index (DI or SI) or base
register (BP or BX):
– MOV
AX, [BX]
• Register-relative: Move a byte/word between a register and
mem. Location specified by an index OR base register + offset:
– MOV
AX, [DI + 7777H]
• Base-relative and indexed: Move a byte/word between a register
and mem. Location specified by a base register PLUS an index
register PLUS offset:
– MOV
CDP
AX, [SP + DI + 7777H]
ECE 291 -- Spring 2000
Addressing Modes: Register
Instruction
OP
Comment
Addr. Mode
Memory Cont.
Dest Source
MOV AX, BX
Move to AX the 16-bit value in BX
Register
89 D8
MOV AX, DI
Move to AX the 16-bit value in DI
Register
89F8
MOV AH, AL
Move to AH the 8-bit value in AL
Register
88C4
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ECE 291 -- Spring 2000
Addressing Modes - Immediate
Instruction
OP
Comment
Addr. Mode
Memory Cont.
Dest Source
MOV AH, 12H
Move to AH the byte value 12H
Immediate
B412
MOV AX, 1234H
Move to AX the value 1234H
Immediate
B8 34 12
MOV AX, CONST
Move to AX the constant CONST
Immediate
B8LSB MSB
MOV AX, OFFSET x
Move to AX the address (offset) of
variable x MASM Notation
Immediate
B 8 LSB MSB
CDP
ECE 291 -- Spring 2000