Computer Science 210 s1c
2014 Semester 1
Lecture Notes
Lecture 13
James Goodman (revised by Robert Sheehan)

 What happens if you try to print a file on a printer already in use?
 What happens if your programme tries to read a character before it’s typed?
 What happens to a sequence of characters you’ve type in before you read them?
 What happens if you send characters to a printer faster than it can accept them?
2

 Many I/O devices have a mechanical component
 They are very slow relative to electronic speeds
 They respond when they’re ready, not necessarily when it’s convenient
 They may not be willing to wait forever for their input (overrun)
 The CPU is the slave: it must synchronize
3

5
So far, we’ve learned how to:
 compute with values in registers
 load data from memory to registers
 store data from registers to memory
But where does data in memory come from?
And how does data get out of the system so that humans can use it?

8-6
Types of I/O devices characterized by:
 behavior: input, output, storage
• input: keyboard, motion detector, network interface
• output: monitor, printer, network interface
• storage: disk, CD-ROM
 data rate: how fast can data be transferred?
• Latency: how long to get the first byte
• Bandwidth: rate that data is received

Device
Keyboard
Mouse
Laser Printer
Behavior
Input
Input
Output
Partner
Human
Human
Human
Graphics Display Output
Network-LAN Input or Output
Human
Machine
Internet
CD-ROM (1x)
DVD-ROM (1x)
Magnetic Disk
Flash Memory
Input or Output
Storage
Storage
Storage
Storage-read
Storage-write
Machine
Machine
Machine
Machine
Machine
Machine
Data Rate (KB/sec)
0.01
0.02
1,000
30,000
200-100,000
4,o00- ?
150
1,352
100,000
100,000-300,000
50,000-100,000
7

8-8
Control/Status Registers
 CPU tells device what to do -- write to control register
 CPU checks whether task is done -- read status register
Data Registers
 CPU transfers data to/from device
Graphics Controller
Control/Status
CPU
Electronics
Output Data
Device electronics
 performs actual operation
• pixels to screen, bits to/from disk, characters from keyboard display

8-9
How are device registers identified?
 Memory-mapped vs. special instructions
How is timing of transfer managed?
 Asynchronous vs. synchronous
Who controls transfer?
 CPU ( polling ) vs. device ( interrupts )

Instructions
 designate opcode(s) for I/O
 register and operation encoded in instruction
8-10
Memory-mapped
 assign a memory address to each device register
 use data movement instructions (LD/ST) for control and data transfer

8-11
I/O events generally happen much slower than CPU cycles.
Synchronous
 data supplied at a fixed, predictable rate
 CPU reads/writes every X cycles
Asynchronous
 data rate less predictable
 CPU must synchronize with device, so that it doesn ’ t miss data or write too quickly

8-12
Who determines when the next data transfer occurs?
Polling
 CPU keeps checking status register until
new data arrives OR device ready for next data
 “ Are we there yet? Are we there yet? Are we there yet?
”
Interrupts
 Device sends a special signal to CPU when
new data arrives OR device ready for next data
 CPU can be performing other tasks instead of polling device.
 “ Wake me when we get there.
”

Memory-mapped I/O
(Table A.3)
8-13
Asynchronous devices
 synchronized through status registers
Polling and Interrupts
 the details of interrupts will be discussed in Chapter 10

8-14
When a character is typed:
 its ASCII code is placed in bits [7:0] of KBDR
(bits [15:8] are always zero)
 the “ ready bit ” (KBSR[15]) is set to one
 keyboard is disabled -- any typed characters will be ignored keyboard data ready bit
15
15 14
8 7 0
0
KBDR
KBSR
When KBDR is read:
 KBSR[15] is set to zero
 keyboard is enabled

8-15
Polling
NO new char?
YES read character
POLL LDI R0, KBSRPtr
BRzp POLL
LDI R0, KBDRPtr
...
KBSRPtr .FILL xFE00
KBDRPtr .FILL xFE02

8-16
Address Control Logic determines whether
MDR is loaded from
Memory or from KBSR/KBDR.

8-17
When Monitor is ready to display another character:
 the “ ready bit ” (DSR[15]) is set to one output data ready bit
15
15 14
8 7 0
0
DDR
DSR
When data is written to Display Data Register:
 DSR[15] is set to zero
 character in DDR[7:0] is displayed
 any other character data written to DDR is ignored
(while DSR[15] is zero)

8-18
Polling
NO screen ready?
YES write character
POLL LDI R1, DSRPtr
BRzp POLL
STI R0, DDRPtr
...
DSRPtr .FILL xFE04
DDRPtr .FILL xFE06

8-19
Sets LD.DDR
or selects
DSR as input.

8-20
Usually, input character is also printed to screen.
 User gets feedback on character typed and knows its ok to type the next character.
POLL1 LDI R0, KBSRPtr
BRzp POLL1
LDI R0, KBDRPtr
POLL2 LDI R1, DSRPtr
BRzp POLL2
STI R0, DDRPtr
...
KBSRPtr .FILL xFE00
KBDRPtr .FILL xFE02
DSRPtr .FILL xFE04
DDRPtr .FILL xFE06
NO new char?
YES read character
NO screen ready?
YES write character

8-21
External device can:
(1) Force currently executing program to stop;
(2) Have the processor satisfy the device’s needs; and
(3) Resume the stopped program as if nothing happened.
Why?
 Polling consumes a lot of cycles, especially for rare events – these cycles can be used for more computation.
 Example: Process previous input while collecting current input. (See Example 8.1 in text.)

8-22
To implement an interrupt mechanism, we need:
 A way for the I/O device to signal the CPU that an interesting event has occurred.
 A way for the CPU to test whether the interrupt signal is set and whether its priority is higher than the current program.
Generating Signal
 Software sets “ interrupt enable ” bit in device register.
 When ready bit is set and IE bit is set, interrupt is signaled.
interrupt enable bit ready bit
15 14 13 0
KBSR interrupt signal to processor

8-23
Every instruction executes at a stated level of urgency.
LC-3: 8 priority levels (PL0-PL7)
 Example:
• Payroll program runs at PL0.
• Nuclear power correction program runs at PL6.
 It’s OK for PL6 device to interrupt PL0 program, but not the other way around.
Priority encoder selects highest-priority device, compares to current processor priority level, and generates interrupt signal if appropriate.

8-24
CPU looks at signal between STORE and FETCH phases.
If not set, continues with next instruction.
If set, transfers control to interrupt service routine (ISR).
Transfer to
ISR
More details in Chapter 10.
NO
YES interrupt signal?
F
D
EA
OP
EX
S

8-25
Because of interrupt enable bits, status registers (KBSR/DSR) must be written, as well as read.

8-26
What is the danger of not testing the DSR before writing data to the screen?
What is the danger of not testing the KBSR before reading data from the keyboard?
What if the Monitor were a synchronous device, e.g., we know that it will be ready 1 microsecond after character is written.
 Can we avoid polling? How?
 What are advantages and disadvantages?

8-27
Do you think polling is a good approach for other devices, such as a disk or a network interface?
What is the advantage of using LDI/STI for accessing device registers?

Computer Science 210 s1c
2014 Semester 1
Lecture Notes
Lecture 14
James Goodman (revised by Robert Sheehan)

9-30
Certain operations require specialized knowledge and protection :
 specific knowledge of I/O device registers and the sequence of operations needed to use them
 I/O resources shared among multiple users/programs; a mistake could affect lots of other users!
 In real systems we layer our programs using abstraction to make our tasks realistic (APIs).
 We want our programs to work with each other (multiple programs running simultaneously).
Not every programmer knows (or wants to know) this level of detail
Provide service routines or system calls
(part of operating system) to safely and conveniently perform low-level, privileged operations

9-31
1. User program invokes system call.
2. Operating system code performs operation.
3. Returns control to user program.
In LC-3, this is done through the TRAP mechanism .

9-32
1. A set of service routines.
 part of operating system -- routines start at arbitrary addresses
(convention is that system code is “ below ” x3000)
 up to 256 routines
2. Table of starting addresses.
 stored at x0000 through x00FF in memory
 called System Control Block in some architectures
3. TRAP instruction.
 used by program to transfer control to the operating system
 8-bit trap vector names one of the 256 service routines
4. A linkage back to the user program.
 want execution to resume immediately after the TRAP instruction

Trap vector
 identifies which system call to invoke
 8-bit index into table of service routine addresses
• in LC-3, this table is stored in memory at 0x0000 – 0x00FF
• 8-bit trap vector is zero-extended into 16-bit memory address
9-33
Where to go
 lookup starting address from table; place in PC
How to get back
 save address of next instruction (current PC) in R7

9-34
NOTE: PC has already been incremented during instruction fetch stage.

9-35
How do we transfer control back to instruction following the TRAP?
We saved old PC in R7.
 JMP R7 gets us back to the user program at the right spot.
 LC-3 assembly language lets us use RET (return) in place of “ JMP R7 ” .
Must make sure that service routine does not change R7, or we won’t know where to return.

9-36
1. Lookup starting address.
2. Transfer to service routine.
3. Return (JMP R7).

9-37
.ORIG
x3000
LD
LD
AGAIN TRAP
ADD
BRz
ADD
TRAP
R2, TERM ; Load negative ASCII
R3, ASCII ; Load ASCII difference
‘ 7 ’ x23 ; input character
R1, R2, R0 ; Test for terminate
EXIT ; Exit if done
R0, R0, R3 ; Change to lowercase x21 ; Output to monitor...
BRnzp AGAIN
TERM .FILL
xFFc9
ASCII .FILL
x0020
EXIT TRAP x25
; Additive inverse of ASCII ‘7’
; lowercase bit
; halt
.END

9-38
.ORIG
ST
ST x0430
R7, SaveR7
R1, SaveR1
…
; ----- Write character
TryWrite LDI
BRzp
WriteIt STI
R1, CRTSR
TryWrite
R0, CRTDR
…
; ----- Return from TRAP
Return LD
LD
R1, SaveR1
R7, SaveR7
CRTSR
CRTDR
SaveR1
SaveR7
RET
.FILL
.FILL
.FILL
.FILL
.END
xFE04 xFE06
0
0
; syscall address
; save R7 & R1
; get status
; look for bit 15 on
; write char
; restore R1 & R7
; back to user
; DSR
; DDR stored in table, location x21

9-39
vector symbol routine x20 GETC read a single character (no echo) x21 OUT output a character to the console x22 PUTS write a string to the console x23 IN print prompt to console, read and echo character from keyboard x25 HALT halt the program

9-40
AGAIN
LEA
LD
R3, Binary
R6, ASCII ; char->digit template
LD R7, COUNT ; initialize to 10
TRAP x23 ; Get char
ADD
STR
ADD
R0, R0, R6
R0, R3, #0
R3, R3, #1
;
;
; convert to number store number incr pointer
ASCII
COUNT
ADD
BRp
BRnzp NEXT
.FILL
.FILL
R7, R7, -1 ; decr counter
AGAIN ; more?
xFFD0
#10
Binary .BLKW
#10
What
s wrong with this routine?

9-41
Must save the value of a register if:
 Its value will be destroyed by service routine, and
 We will need to use the value after that action.
Who saves?
 caller of service routine?
• knows what it needs later, but may not know what gets altered by called routine
 called service routine?
• knows what it alters, but does not know what will be needed later by calling routine

9-42
Called routine --
callee-save
 Before start, save any registers that will be altered
(unless altered value is desired by calling program!)
 Before return, restore those same registers
Calling routine --
caller-save
 Save registers destroyed by own instructions or by called routines (if known), if values needed later
• save R7 before TRAP
• save R0 before TRAP x23 (input character)
 Or avoid using those registers altogether
Values are saved by storing them in memory.

9-43
Can a service routine call another service routine?
If so, is there anything special the calling service routine must do?

9-44
Service routines provide three main functions:
1. Shield programmers from system-specific details.
2. Write frequently-used code just once.
3. Protect system resources from malicious/clumsy programmers.
Are there any reasons to provide the same functions for non-system (user) code?

A subroutine is a program fragment that:
 lives in user space
 performs a well-defined task
 is invoked (called) by another user program
 returns control to the calling program when finished
Like a service routine, but not part of the OS
 not concerned with protecting hardware resources
 no special privilege required
9-45
Reasons for subroutines:
 reuse useful (and debugged!) code without having to keep typing it in
 divide task among multiple programmers
 use vendor-supplied library of useful routines
 Most importantly structure your code

9-46
Jumps to a location (like a branch but unconditional), and saves current PC (addr of next instruction) in R7.
 saving the return address is called “ linking ”
 target address is PC-relative (PC + Sext(IR[10:0]))
 bit 11 specifies addressing mode (one opcode, two instructions)
• if =1, PC-relative: target address = PC + Sext(IR[10:0])
• if =0, register: target address = contents of register IR[8:6]

9-47
NOTE: PC has already been incremented during instruction fetch stage.

9-48
Just like JSR, except Register addressing mode.
 target address is Base Register
 bit 11 specifies addressing mode
What important feature does JSRR provide that JSR does not?

9-49
NOTE: PC has already been incremented during instruction fetch stage.

9-50
RET (JMP R7) gets us back to the calling routine.
 just like TRAP

9-51
2sComp NOT
ADD
RET
R0, R0 ; flip bits
R0, R0, #1 ; add one
; return to caller
To call from a program (within 1024 instructions):
; need to compute R4 = R1 - R3
ADD R0, R3, #0 ; copy R3 to R0
JSR 2sComp ; negate
ADD R4, R1, R0 ; add to R1
...
Note: Caller should save R0 if we’ll need it later!

9-52
Arguments
 A value passed in to a subroutine is called an argument (or parameter).
 This is a value needed by the subroutine to do its job.
 Examples:
• In 2sComp routine, R0 is the number to be negated
• In OUT service routine, R0 is the character to be printed.
• In PUTS routine, R0 is address of string to be printed.
Return Values
 A value passed out of a subroutine is called a return value.
 This is the value that you called the subroutine to compute.
 Examples:
• In 2sComp routine, negated value is returned in R0.
• In GETC service routine, character read from the keyboard is returned in R0.

Computer Science 210 s1c
2014 Semester 1
Lecture Notes
Lecture 15
James Goodman (revised by Robert Sheehan)

9-54
In order to use a subroutine, a programmer must know:
 its address (or at least a label that will be bound to its address)
 its function (what does it do?)
• NOTE: The programmer does not need to know how the subroutine works, but what changes are visible in the machine’s state after the routine has run.
 its arguments (where to pass data in, if any)
 its return values (where to get computed data, if any)

9-55
Since subroutines are just like service routines, we also need to save and restore registers, if needed.
Generally use “ callee-save ” strategy, except for return values.
 Save anything that the subroutine will alter internally that shouldn’t be visible when the subroutine returns.
 It’s good practice to restore incoming arguments to their original values (unless overwritten by return value).
Remember: You MUST save R7 if you call any other subroutine or service routine (TRAP).
 Otherwise, you won’t be able to return to caller.

(1) Write a subroutine FirstChar to: find the first occurrence of a particular character (in R0 ) in a string (pointed to by R1 ); return pointer to character or to end of string (NULL) in R2 .
(2) Use FirstChar to write CountChar , which: counts the number of occurrences of a particular character (in R0 ) in a string (pointed to by R1 ); return count in R2 .
9-56
Can write the second subroutine first, without knowing the implementation of FirstChar!

9-57
save regs call FirstChar
R3 <- M(R2)
R3=0 no yes
R1 <- R2 + 1 save R7, since we’re using JSR restore regs return

9-58
; CountChar: subroutine to count occurrences of a char
CountChar
ST R3, CCR3 ; save registers
ST
ST
ST
R4, CCR4
R7, CCR7
R1, CCR1
; JSR alters R7
; save original string ptr
AND R4, R4, #0 ; initialize count to zero
CC1 JSR FirstChar ; find next occurrence (ptr in R2)
LDR R3, R2, #0 ; see if char or null
BRz CC2 ; if null, no more chars
ADD R4, R4, #1 ; increment count
ADD R1, R2, #1 ; point to next char in string
BRnzp CC1
CC2 ADD R2, R4, #0 ; move return val (count) to R2
LD R3, CCR3 ; restore regs
LD R4, CCR4
LD
LD
RET
R1, CCR1
R7, CCR7
; and return

9-59
save regs
R2 <- R1
R3 <- M(R2)
R3=0 no yes
R3=R0 yes no
R2 <- R2 + 1 restore regs return

9-60
; FirstChar: subroutine to find first occurrence of a char
FirstChar
ST
ST
NOT
R3, FCR3
R4, FCR4
R4, R0
; save registers
; save original char
; negate R0 for comparisons
ADD R4, R4, #1
ADD R2, R1, #0 ; initialize ptr to beginning of string
FC1 LDR R3, R2, #0 ; read character
BRz FC2 ; if null, we’re done
ADD R3, R3, R4 ; see if matches input char
BRz FC2 ; if yes, we’re done
ADD R2, R2, #1 ; increment pointer
BRnzp FC1
FC2 LD R3, FCR3 ; restore registers
LD
RET
R4, FCR4 ;
; and return

Vendor may provide object files containing useful subroutines
 don ’ t want to provide source code -- intellectual property
 assembler/linker must support EXTERNAL symbols
(or starting address of routine must be supplied to user)
...
.EXTERNAL SQRT
...
LD R2, SQAddr ; load SQRT addr
JSRR R2
...
SQAddr .FILL SQRT
9-61
Using JSRR, because we don’t know whether SQRT is within 1024 instructions.