Agenda
DAY
1
Synopsys 60-I-032-BSG-005
1
Introduction
2
Verilog-A Modules
3
Simulating Variability – Design for
Yield
© 2007 Synopsys, Inc. All Rights Reserved
3- 1
Unit Objectives
After completing this unit, you should be able to:

Understand and modify a Variation Block

Use DCMatch analysis

Use Monte Carlo analysis
3- 2
Wafer Yield in Nanometer Technologies
100
Product yield (%)
90
Defect density
80
70
60
Lithography & new materials
50
65nm
45nm
40
Parametric Variability
30
20
350
250
180
130
Technology nodes (nm)
90
Source: IBS Report
3- 3
Variation Components Across Wafer
Global Variation
Linear Variation
Radial Variation
Wafer Level Variation
3- 5
4
Variation Components From Reticle
Across Reticle
Variation
Combined Across Wafer Variation
3- 7
5
Variation Components Due To Discreteness of Atoms and
Photons

Oxide layer thickness

Poly line edge roughness

Discrete number of dopants in channel

Affect each device differently
Local Variations
Total parametric variation combines wafer, reticle, and local variations
3- 9
6
Variation Components Due To Proximity: (not random)

Deterministic
systematic variations,
not random

Can be modeled (WPE)

Not considered here
under variability
orientation
density
well proximity
metal coverage
3- 11
7
Quantifying Variability in Nanometer Technologies
History of Parameter Values and Variations (3-σ)
Year
leff (nm)
1997
250 +/-80 5
1999
180 +/-60 4.5 +/-0.36
450 +/-45 1.8
2002
130 +/-45 4
+/-0.39
400 +/-40 1.5
2005
100 +/-40 3.5 +/-0.42
350 +/-40 1.2
2006
tox (nm)
70 +/-33 3
+/-0.4
+/-0.48
Vth (mV)
vdd
500 +/-50 2.5
300 +/-40 0.9
minimum size device
drain current variation > 40% (3-σ)
Table data: Nassif CICC 2001
3- 13
8
Contents

Variability on Silicon

Devices

Interconnect

Variation Block

Monte Carlo Analysis



Data Mining
Mismatch Analyses

DCMatch Analysis

ACMatch Analysis
Mismatch versus Monte Carlo
3- 15
9
Cu Interconnect Stack Structure
Passivation
Wire
Via
Dielectric
up to 16 layers
of interconnect
Silicon Bulk with
Active Devices
Source: ITRS
3- 17
10
Random Variation in Interconnect
metaln+1
h2
s
tn+1
w
metaln
tn
h1
metaln-1

tn-1
Interconnect Process Variables:
 Metal :
- thickness
- line width and spacing
- resistivity
 Dielectric:
- thickness
- dielectric constant
 Vias:
- resistance
over 150 parameters have random variation in 65nm process
3- 19
11
Interconnect Variation Modeling: Current Approach


Corner files with
fixed min or max
value for each
layer
Process Characterization
Multiple
nxtgrd
nxtgrd
nxtgrd
corner
nxtgrd
files
Layout
Full extraction for
each corner
Star-RCXT
Star-RCXT
Star-RCXT
Star-RCXT
Results are worst case points,
pessimistic
netlist
PrimeTime
PrimeTime
PrimeTime
PrimeTime
Hspice
Hspice
Hspice
HSPICE
3- 21
12
Interconnect Variation Modeling: Statistical Extraction Flow

Process Characterization
nxtgrd with variation
Single technology
file with statistics
for all layers

Single extraction

Netlist includes
variation
information

Resulting
distribution shows
effects of device
and interconnect
variation
Layout
Star-RCXT
Statistical Extraction
Extracted Netlist
with Parasitics and
Variation Information
PrimeTime
HSPICE
Monte
Carlo
3- 23
13
Contents

Variability on Silicon


Devices
Interconnect

Variation Block

Monte Carlo Analysis


Mismatch Analyses



Data Mining
DCMatch Analysis
ACMatch Analysis
Mismatch versus Monte Carlo
3- 25
14
Variation Model in HSPICE

Global variation




Local variation




Random variation between adjacent devices with identical
layout
Critical for high precision analog
Increasingly important for digital
Spatial variation:



Statistical equivalent of corner files
Corner files represent extreme points of a distribution
Global variation describes continuous distribution shape
To model effects of gradients
Not important for small blocks
These variation types are independent of each other
and easy to extract from test structures
3- 27
15
Variation Block Overview

Complements nominal model definitions

Variation types: Global, Local and Spatial

Variation definitions for devices and interconnect

Emphasis on variations in materials and
manufacturing

Created by foundry; possibly encrypted

Definitions used for Monte Carlo and Mismatch
Analyses

Designers can choose options and variation on
elements
3- 29
16
Variation Block Structure
.variation
options
define parameters common to all sub-blocks
.global_variation
define random variables
define variations of model parameters
.end_global_variation
.local_variation
define random variables
define variations of model parameters
.element_variation
define variations of element parameters
.end_element_variation
.end_local_variation
.spatial_variation
define random variables
define variations of model parameters
.end_spatial_variation
.end_variation
3- 31
17
Options and Common Parameters

Options

Regarding use of Variation Block






For all dependent analyses




ignore_local_variation
ignore_global_variation
ignore_spatial_variation
ignore_interconnect_variation
ignore_variation_block
output_sigma_value
vary_only | do_not_vary
For Monte Carlo analysis
Common parameters:
To define parameters valid only in Variation Block
(separate name space)
3- 33
18
Independent Random Variables

Normal distribution:
A=N()
(mean=0, sigma=1)
( also used in implicit definitions)

Uniform distribution:
B=U()

(from -0.5 to 0.5)
Cumulative distribution function:
C=CDF(x1,y1,.....xn,yn)
100.00%
60
80.00%
50
Frequency
40
60.00%
30
40.00%
20
20.00%
0
1.000
1.000
Series2
Specification
1.001
1.001
0.
99
0. 9
99
91
6
0.
99
93
2
0.
99
94
8
0.
99
96
0. 4
99
98
0.
99
9
1. 96
00
0
1. 12
00
0
1. 28
00
04
1. 4
00
06
1.
00
0
1. 76
00
09
2
0.00%
0.999
10
Histogram of 1000 CDF samples
Frequency
3- 35
19
Dependent Random Variables

To create arbitrary distributions from basic
distributions

Example 1:
var = U()
Y = '0.5 * (D+E) + (E-D) * var '
creates a uniform distribution from D to E

Example 2:
a = N()
b = N()
c = 'a+2*sgn(b)'
Histogram:
3- 37
20
Syntax for Specifying Variations

Basic construct for describing variation:
Parameter=‘Expression for Sigma’
abbreviated notation for
variation_in_Parameter=‘Expression for Sigma’



Constructs for expressions:

Constants, parameters or functions

Absolute variation or relative ( space % )

Perturb() to reference random variable

get_E() to model dependence on device geometry (w, l, m)
or location (xcoor,ycoor)
Implicit definition:

If expression has no reference to random variable ( no Perturb ),
then Normal Distribution assumed with zero mean and 1-sigma
equal to expression
3- 39
21
Variations on Model and Element Parameters

Syntax for defining variations on model parameters:
modelType modelName modelPar=‘Expression for Sigma’

Syntax for defining variations on element parameters:
elementType elementPar=‘Expression for Sigma’

Examples:
nmos nch vth0='1.2e-9/sqrt(get_E(L)*get_E(W)*get_E(M))'
I DC=12 %
3- 41
22
Simple Variation Block Example
.variation
.global_variation
nmos nch vth0=0.07 u0=10 %
pmos pch vth0=0.08 u0=8 %
.end_global_variation
.local_variation
nmos nch
+
vth0='1.2e-9/sqrt(get_E(W)*get_E(L)*get_E(M))'
+
u0 ='2.3e-6/sqrt(get_E(W)*get_E(L)*get_E(M))' %
pmos pch
+
vth0='3.4e-9/sqrt(get_E(W)*get_E(L)*get_E(M))'
+
u0 ='4.5e-6/sqrt(get_E(W)*get_E(L)*get_E(M))' %
.element_variation
R r=10 %
.end_element_variation
.end_local_variation
.end_variation
3- 43
23
Principal Components Based Global Variation Modeling
.Global_Variation
parameter A1=N() A2=N() A3=N()
nmos nch
+ tox =Perturb('-7.2E-12*A1-7.1E-12*A2-8.7E-12*A3')
+ vth0=Perturb('-3.6E-03*A1+8.9E-03*A2-1.5E-03*A3')
+ cjn =Perturb('-3.2E-06*A1+6.7E-06*A2-4.3E-06*A3')
+ u0 =Perturb(' 5.6E-04*A1-9.7E-04*A2+7.6E-04*A3')
+ ....
pmos pch
+ tox =Perturb('-7.5E-12*A1-6.9E-12*A2-8.8E-12*A3')
+ vth0=Perturb('-7.4E-03*A1+3.3E-03*A2-7.2E-03*A3')
+ cjn =Perturb('-5.0E-06*A1+8.9E-06*A2-3.2E-06*A3')
+ u0 =Perturb(' 7.6E-04*A1-4.3E-04*A2+4.8E-04*A3')
+ ....
.End_Global_Variation
Correlation between parameters and devices
3- 45
24
Local Variations in Nanometer Technologies
.Local_Variation
nmos nch
+
tox ='3.1e-07/sqrt(Get_E(L)*Get_E(W)*Get_E(M))' %
+
wint='6.2e-12/sqrt(Get_E(L))'
+
lint='2.0e-12/sqrt(Get_E(W)*Get_E(M))'
+
....
Parameter choices and device geometry dependence according
to Drennan/McAndrew [4], different from Pelgrom model [2]
3- 47
25
Spatial Variation Example
.variation
parameter Pi = 3.14159
.spatial_variation
Parameter a = N( ) b = U( )
Parameter Slope = ’20 * a’
Parameter Angle = '2 * Pi * b'
nmos nch vth0 =
+
Perturb(‘Slope*sqrt(get_E(x)*get_E(x)+get_E(y)*Get_E(y)) \\
*cos(Angle-atan(get_E(y)/get_E(x))-(get_E(x)<0?Pi:0))')
.end_spatial_variation
.end_variation
Plane with slope sigma of 20mV/mm, arbitrary rotation on chip surface
3- 49
26
Designer’s Variation Block

Local variation on elements ( generic R, C, I, V ):
.variation
.local_variation
.element_variation
R r=10 %
.end_element_variation
.end_local_variation
.end_variation

Options:
.variation
option ignore_local_variation=yes
.end_variation
3- 51
27
Variation Block Summary

Extension of device model

Consolidates definitions for global, local and spatial
variations, on devices and interconnect

Clear distinction between different types of variations

Emphasis on variations in material and manufacturing

Flexible syntax allows for proprietary models of
variability

Content created by foundry

Designers can specify options and variations on
elements
3- 53
28
Contents

Variability on Silicon

Devices

Interconnect

Variation Block

Monte Carlo Analysis



Data Mining
Mismatch Analyses

DCMatch Analysis

ACMatch Analysis
Mismatch versus Monte Carlo
3- 55
29
Monte Carlo Analysis in HSPICE

Prior art:

Distributions defined on global parameters (GAUSS,
UNIFORM)




Distributions defined on model parameters (LOT/DEV)



Vary-anything approach with implicit rules
Trouble with unexpected behavior
Local variations require lots of memory
Not adopted by the foundries
Lacks geometry dependence
State of art:

Distributions defined in Variation Block

New feature: output file with perturbations for data mining
3- 57
30
Monte Carlo Commands

Command syntax:
.DC sweepVar start stop step sweep MCcommand
.AC type step start stop sweep MCcommand
.TRAN step stop sweep MCcommand

Syntax for MCcommand:
Monte = val
Monte = val firstrun=num
Monte = list num
Monte = list
(<num1:num2> <num3> <num4:num5>)
3- 59
31
Options for Monte Carlo Analysis

Options defined in Variation Block:

Variation Block options:
Option
ignore_global|local|spatial|interconnect_variation
= yes
Option ignore_variation_block = yes

Variability Analysis options:
Option output_sigma_value = value
Option Vary_only | Do_not_vary = subcktList

Monte Carlo options:
Option Normal_Limit = value
Option Sampling_method = factorial | ofat | lhs
3- 61
32
Factorial Sampling
6
5
4
5
2
1
7
4
1
3
8
2
3
2
3

Option sampling_method = factorial

All parameter combinations at nominal + or – Normal_limit

Generates 2^n+1 samples

12 independent variables maximum ( 4097 samples )

Simple way of specifying corners, for worst case analysis

With 5 principal components, 33 relevant corners
3- 63
33
One-Factor-At-a-Time Sampling
5
2
1
3
2
1
5
3
2
4

Option sampling_method = ofat

One parameter at a time set to
nominal + or – Normal_limit

Produces 2*n+1 samples

For sensitivity studies
1
6
7
3
4
3- 65
34
Latin Hypercube Sampling
Compared to simple random sampling:

Spreads sample points more evenly

3-10X fewer samples for same precision in answers
LHS 10 samples in 2D
3- 67
35
Monte Carlo Analysis Flow
Start
index 1:
Simulate with no variation applied
Global variation: add same random value
to particular parameter for all devices
Local variation: add different random value
to specified parameters for each device
index n :
Simulate with variations applied
done
more
Calculate statistics
End
3- 69
36
Monte Carlo Result Distributions
5
4
seed
3
2
1
32
128
512
2048
samples
3- 71
37
100
Monte Carlo Convergence
20
10
10
↑
error
(%)
6
4
1/√n
trend
line
2
Probability is
2/3 for smaller error
1/3 for larger error
10
10
1
30
100
100
300
1000
1000
number of Monte Carlo samples →
3- 73
38
Contents

Variability on Silicon

Devices

Interconnect

Variation Block

Monte Carlo Analysis



Data Mining
Mismatch Analyses

DCMatch Analysis

ACMatch Analysis
Mismatch versus Monte Carlo
3- 75
39
Interpreting Results of Monte Carlo
v1 of r3_1
100
Qualitative view of effects of variations:
does this distribution look “normal” ?
90
80
70
60
50
40
30
20
10
0.
95
0.
95
8
0.
96
6
0.
97
4
0.
98
2
0.
99
0.
99
8
1.
00
6
1.
01
4
1.
02
2
1.
03
1.
03
8
1.
04
6
0
bad
good
premium
good
bad
wide margin at expense
of area, power, cost ?
bad
good
premium
good
bad
looks like we need to do
some adjustments ...
bad
good
premium
good
bad
what’s the
percentage of
good circuits ?
3- 77
40
Data Mining: Pairs Plot
Application note on HSPICE.com:
“Pairs Plots from HSPICE Monte Carlo”
3- 79
41
Data Mining: Pareto Plot
mp3
mp4
mn1
mn2
ranked relative
offset contributions
for 7-transistor
CMOS opamp
3- 81
42
Monte Carlo Analysis Summary

Uses variation definitions from Variation Block

New sampling methods for faster results

Variety of options to study different types of variation

Output file with parameters for data mining, to
identify critical devices and yield limiting process
parameters

Results consistent with mismatch analyses
3- 83
43
Contents

Variability on Silicon

Devices

Interconnect

Variation Block

Monte Carlo Analysis



Data Mining
Mismatch Analyses

DCMatch Analysis

ACMatch Analysis
Mismatch versus Monte Carlo
3- 85
44
Mismatch Analysis

DCMatch:


To calculate effects of variations on a circuit’s
DC operating point
ACMatch:

To calculate effects of variations on a circuit’s AC response

Use variation definitions from Variation Block

Results match those of small signal Monte Carlo

At least one order of magnitude faster than
Monte Carlo
3- 87
45
Mismatch
“Characteristics of identically designed devices vary by small amounts.”
Ids 

2
 (Vgs  Vth)
2
Vthleft  Vthright
 left   right
Idsleft  Idsright
3- 89
46
Effects of Mismatch on DC Amplifier
Classic 7-transistor CMOS opamp
input
output

Local variations cause mismatch on identically designed devices

Mismatch in device pairs causes random offset

Equivalent of built-in random voltage source in series with input
3- 91
47
HSPICE DCMatch Analysis Overview

Available in HSPICE since release 2005.09

Uses contents of Variation Block

Reports effects of variations on a circuit’s DC solution

Main output: Table


Sigma of total output variations

Sigma of all variation types

Contributions of parameters and devices
Measure and Probe results available
3- 93
48
DCMatch Analysis Command
.DCMatch outputVariable <options>

OutputVariable: voltage, difference voltage or current

Options:



Threshold:
File:
Interval:
controls device printout
contains tables for DC sweep
printing subset of tables
Example:
.DCMatch V(9) V(4,2) I(Vmeas)
3- 95
49
DCMatch Table Result Example
Output sigma due to global and local variations = 619.62uV
DCMATCH GLOBAL VARIATION
Output sigma due to global variations = 289.66uV
--------------------------------------------------------Contribution Contribution
Cumulative
Independent
Sigma(V)
Variance (%)
Variance (%) Variable
227.94u
61.92
61.92
snps20p@u0
139.48u
23.19
85.11
snps20p@vth0
109.93u
14.40
99.51
snps20n@u0
20.19u
485.62m
100.00
snps20n@vth0
DCMATCH LOCAL VARIATION
Output sigma due to local variations =
547.74uV
---------------------------------------------------------Contribution Contribution Cumulative
Matched Device
Sigma(V)
Variance (%) Variance (%) pair
Name
297.91u
29.46
29.46
1
mn1
296.38u
29.16
58.61
1
mn2
252.37u
21.14
79.75
2
mp3
246.91u
20.23
99.99
2
mp4
3- 97
50
Amplifier with Rail-to-Rail Input Range
input
output
bias
Source: JSSC August 2003
combined input stages
3- 99
51
DCMatch Simulation Result
Input offset sigma due to device mismatch
as a function of input common mode voltage:
↑
20
Input
15
offset
sigma
(mV) 10
5
0
0.5
1.0
1.5
2.0
Input Voltage
2.5
→
3- 101
52
Benefits of DCMatch Analysis

Reports variation in operating point from local variation
definitions in Variation Block and device sizes in netlist

Purpose:
 Avoid yield loss due to variations
 Design for minimum area

Unique benefits :
 Pointer to major contributors of variation
 Significantly faster than Monte Carlo

Circuit candidates for DCMatch analysis:
 Bandgap references
 Operational amplifiers
 DACs
 Charge pumps
 Bias circuits
 ( ... and which analog circuit does not need bias?)
3- 103
53
HSPICE ACMatch Analysis Overview

New for HSPICE release 2007.03

Uses contents of Variation Block

Reports effects of variations on AC response
 Variations in DC parameters affect DC operating point




Variations in DC operating point change low frequency response
Variations in DC operating point change values of voltage
dependent capacitors
Variations in AC parameters change capacitor values
Combination of changes cause variation in AC response

Runs for each sweep point of associated AC analysis

Main output: Table
 Output sigma for total variations and all variation types
 Individual contributions of parameters and devices for
global or local variations

Measure and Probe support in 2007.03-SP1
3- 105
54
ACMatch Analysis Command

.ACMatch outputVariable <options>

OutputVariable:



options:




Voltage, difference voltage or current
Mag, phase, real, imag ( Vm, Vp, Vr, Vi )
Threshold:
File:
Interval:
controls device printout
contains tables for DC sweep
printing subset of tables
Example:
.ACMatch VM(9)
.AC dec 1 1k 10Meg
3- 107
55
Fully Differential Amplifier
inject
AC signal
cmfb
differential
output
differential
input
Effect of variations on power supply rejection or feedthrough?
3- 109
56
Power Supply Feedthrough
-28dB
sigma(real)
sigma(imag)
no Variation
3- 111
57
Benefits of ACMatch Analysis

Reports effect of variations in DC and AC parameters
on AC transfer characteristics.

For studying effect of process variation on signal
integrity in sensitive circuits, including interconnect
variation after layout

Unique benefits of ACMatch analysis:


Pointer to major contributors of variation

Significantly faster than Monte Carlo
Circuit candidates for ACMatch analysis:

Fully differential circuits

Continuous-time integrated filters (MOSFET-C and gm-C)

Crystal oscillators
3- 113
58
Contents

Variability on Silicon

Devices

Interconnect

Variation Block

Monte Carlo Analysis



Data Mining
Mismatch Analyses

DCMatch Analysis

ACMatch Analysis
Mismatch versus Monte Carlo
3- 115
59
Mismatch Versus Monte Carlo Analysis
0.015
0.010
0.005
0.000
Density
0.020
0.025
0.030
5000 Sample M onte Carlo
-60
-40
5000 Monte Carlo Samples
-20
0
20
40
Offset (mV)
Mismatch analyses use calculus of
probability instead of sampling
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DCMatch and ACMatch Versus Monte Carlo
Feature
Monte Carlo
DCMatch/ACMatch
Variation definition
Variation Block
and old style
Variation Block
only
Preferred distributions
Any
Normal
Analysis types
AC, DC, Tran
DC, AC
Relative run time
Slow
Fast
Accuracy
“pretty good”
Excellent
Variation contributions
(global, local etc)
Combined
Separate
Device/parameter
contributions report
No
Yes
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HSPICE Documentation on Variability


In HSPICE Simulation and Analysis User Guide:

Chapter 13: Simulating Variability

Chapter 14: Variation Block

Chapter 15: Monte Carlo Analysis

Chapter 16: Mismatch Analyses

Appendix A: Statistical Analysis (deprecated style)
SNUG tutorial: “DCmatch Analysis in HSPICE”
SNUG: Synopsys Users Group - San Jose 2006
http://www.snug-universal.org/cgi-bin/search/search.cgi?San+Jose+2006
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References
1.
K.R. Lakshmikumar, R.A. Hadaway, and M.A. Copeland:
Characterization and modeling of mismatch in MOS transistors for
precision analog design. IEEE J. Solid-State Circuits, December 1986.
 (First paper relating mismatch to device area)
2.
M. Pelgrom, A. Duinmaijer, and A. Welbers: Matching properties of
MOS transistors. IEEE J. Solid-State Circuits, May 1989.
 (Added distance dependence to mismatch modeling)
3.
P.R. Kinget: Device mismatch and tradeoffs in the design of analog
circuits. IEEE J. Solid-State Circuits, June 2005.
 (Importance of mismatch in design; extensive references)
4.
P.G. Drennan and C.C. McAndrew: Understanding MOSFET mismatch
for analog design. IEEE J. Solid-State Circuits, March 2003.
 (Modeling mismatch in nanometer technologies)
5.
K. Singhal and V. Visvanathan: Statistical device models from worst
case files and electrical test data. IEEE Trans. Semiconductor
Manufacturing, November 1999.
 (Global variation modeling by principal components)
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Presentation for Modeling Engineers

Emphasis on:

Process aspects: different types of variations

Variation Block content

Interconnect variability

Approximately 2 hours with Q&A

Can be arranged through WEBEX
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Lab 3: Simulating Variability – Design for Yield

Simulations:
 Monte Carlo and DCmatch
analyses
 Global and local variations
on sheet resistance

Results:
 Divider ratio
 Total resistance

Post-process:
 CosmosScope histogram
 Matlab Demo: Pairs Plot
(See application note: “Pairs
Plots from HSPICE Monte
Carlo” at HSPICE.com)
90 minutes
Lab Test Circuit
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