Design Tradeoffs for SSD Performance

111
011
01
0
PLANE 0
PLANE 1
PLANE 2
PLANE 3
REG
REG
REG
REG
Data Register
4 KB
Page Size
4 KB
Block
PLANE
0
Size
PLANE 1
RPlane
EG
REG
256
KB 3
PLANE
EG
REG 512RMB
Die Size
2 GB
Erase Cycles
100K
Page Read
25μs
Page Program
DIE 0
PLANE 2
’09?
200μs
Serial Access
100μs
20μs
Block Erase
1.5ms
DIE 1
MLC (multiple bits in cell):
slower, less durable
Block(P)
P
P
P0
P1
Page(P)
Page(Q)
P
Q
P
P0
Q0
P1
Page(P)
Page(Q)
Page(R)
P
Q
R
P Q R
P0
Q0
R0
P0 Q0 R0
without free info
with free info
300
250
200
150
100
50
0
5K
6K
7K
8K
REG
REG
DIE 0
REG
REG
REG
REG
DIE 1
REG
REG
Controller
08
16 24
32 40
19
17 25
33 41
2 10
18 26
34 42
3 11
19 27
35 43
4 12
20 28
36 44
5 13
21 29
37 45
6 14
22 30
38 46
7 15
23 31
39 47
REG
REG
DIE 0
REG
REG
REG
REG
DIE 1
REG
REG
REG
REG
REG
REG
Shared-bus gang
Shared-control gang
With faster serial connect, intrachip ops are less important
Block Allocation
Active use
Over-provisioning
Worn out
Block Allocation
Active use
Over-provisioning
Worn-out
Block Allocation
Active use
Over-provisioning
Worn-out
Expiry Meter
for block A
Cold content
Block B
Block A
Q R
P Q R
Q0 R0
P0 Q0 R0
IfIfIfRemaining(A)
Remaining(A)<>=
<Throttle-Threshold,
Migrate-Threshold,
Remaining(A)
Migrate-Threshold,
reduce
probability
cleaning
A A
clean
A, but
migrate
data into
clean of
Acold
≠
http://research.microsoft.com/users/
vijayanp/papers/ssd-usenix08.pdf
http://research.microsoft.com/downloads
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