Lecture 3
PC structure and embedded devices
Lecturer: Lyulicheva I.А.
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Content
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PC structure
System devices
Parallel and serial ports
System timer
Interrupt controllers
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Personal computer structure
The heart of PC is System block. Other
parts are Monitor, mouse, keyboard etc.
 In notebooks all these parts are inside one
body, but still are present
The most important component of the
system block is the system board or
mother-board (MB),
Also system block contains hard disc, CDROM-driver, card-reader, power-supply,
maybe Wi-Fi-modem. Video-card, soundcard, LAN-adapter etc. may be standalone
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Memory of modern MPS
Inside (MotherBoard) memory
Registers of MP
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L1 cash
L2 cash… etc.
System RAM
BIOS
Outside memory:
HDD
CD/DVD
Flash-memory
FDD (old) or strimmers
Hierarhy of
memory in
modern PC is
very complicated
Personal computer structure
System (mother) board components
Various components are built in a modern system board, such as
slots or sockets for processors, sockets for memory and
additional device and chipsets.
The advanced system boards contain following components:
• Slot or socket for the main processor;
• Chipset of system logic;
• the Basic input-output system (BIOS);
• Nests for the modules of system memory;
• Sockets for system buses;
• Low-voltage power-supply etc.
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PC Structure
A progress in
modification of
system boards was
connected with the
development of new
chipsets, new
sockets for
processors and the
other parts.
On the right figure - a
view of the out-ofdate PC-card.
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Progress in MB:
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New types of System buses
Growing of capacity and occurrence of new types of
memory sockets for the different RAM.
Improving of BIOS – system ROM
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Современный ПК с PCIexpress
First Components of system boards
Purpose of microcircuit
Version PC/XT
Version AT
Processor
8086
80286
Mathematical coprocessor- FPU
8087
80287
Generator of clock rate
8284
82284
Conptroller of bus
8288
82288
The system timer
8253
8254
Interrupt controller low level
8259
8259
Interrupt controller high level
-
8259
8237
8237
-
MC146818
Controller of keyboard and parallel port
8255
8042
Serial port
8251
8250
Controller of direct access to memory low level
Memory CMOS and clock
These all of the tools was made directly by firm Intel or on its license, except for a microcircuit
CMOS with a clock, which was supplied a firm Motorola. In all on a pay to hundred, and place
logical microcircuits took a place for placing of microcircuits, executing user facilities, on them did
not remain.
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Structure of the MP system
So for MP system work several
secondary devices are in need,which
may be build in the to special chipset on
MB or may be put in additional slots.
Nonprogrammable LIS -Ladge
integrated shemes (clock pulse
generator, bus-control devices etc.) are
not very difficult and we left them for
your individual study.
But we must study more deeply three
programmable LIS - system timer,
parlallel interface(PPI) and serial port.
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8255 parallel port diagram
8255 parallel port diagram
PPI lines
PPI control word
Example of PPI programming
Initialization of PPI needs only 2 instructions
Mov AL, 1001 0010b
Out 83h, AL
Then you may read from ports A (80h) and B
(81h) or output data to port C (82h) as
usual
In AL, 80h
Mov ES:[DI], AL
8253 timer block-diagram
Control words of timer
The example of the timer’s
programming
;Example 1 lineup of one register (the labels of the
timer-80h,81h,82h,83h)
mov al,1eh; CT0,1 million of bytes, mode 3,
code 2
out 83h,al;
the delivery control of byte into the
port of the УС timer.
mov al,5 ;
the coefficient of division
Kf=F1/F2=5
out 80h,al;
recording Kf into 0 register.
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Serial ports
In computing, a serial port is a serial communication physical
interface through which information transfers in or out
one bit at a time (in contrast to a parallel port). A serial
port is a general-purpose interface that can be used for
almost any type of device, including modems, mice, and
printers.
While such interfaces as Ethernet, FireWire, SATA and
USB all send data as a serial stream, the term "serial
port" usually identifies hardware more or less compliant to
the RS-232 standard, intended to interface with a modem
or with a similar communication device.
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Serial ports
Modern computers without serial ports may
require serial-to-USB converters to allow
compatibility with RS 232 serial devices.
Serial ports are still used in applications
such as industrial automation systems,
scientific instruments, shop till systems and
some industrial and consumer products.
Servers may use a serial port as a
control console for diagnostics.
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Serial ports
Data bits
The number of data bits in each character
can be 5 (for Baudot code), 6 (rarely used),
7 (for true ASCII), 8 (for any kind of data,
as this matches the size of a byte), or 9.
8 data bits are almost universally used in
newer applications. 5 or 7 bits generally
only make sense with older equipment.
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Serial ports
Parity check
Parity is a method of detecting errors in transmission. When
parity is used with a serial port, an extra data bit is sent
with each data character, arranged so that the number of
1 bits in each character, including the parity bit, is always
odd or always even.
If a byte is received with the wrong number of 1s, then it
must have been corrupted. However, an even number
of errors can pass the parity check.
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Serial ports
Stop bits
Stop bits sent at the end of every character allow the
receiving signal hardware to detect the end of a character
and to resynchronise with the character stream.
Flow control
A serial port may use signals in the interface to pause and
resume the transmission of data. For example, a slow
printer might need to handshake with the serial port to
indicate that data should be paused while the mechanism
advances a line.
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8251 serial port block-diagram
The example of the setting of
serial port
; Example2 :the UART setting (label 9С – data and 9D controlling)
mov al,40h; programmed upset
out 9Dh,al;
mov al,0CFh; mode instruction : 2 stop-bits,
out 9Dh,al ; no control, 8 bits, fTxC/ 64
mov al,01h; command instruction
out 9Dh,al; authorization of the reconnaissance
TxEN =1
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The example of UART work
with a timer and a port
; Example3 : sending of the array of bites into UART.
mov cх, 20; number of digit
mov BX,1000h; location’s of beginning of the array
М1: mov al,[BX];
to move a byte from array into AL
out 9Ch,al; and move it into UART
wt: in al,9dh; reading the condition byte
shr al,1; is the dev ready? (TxRDY = 1?),
jnc wt;
if not, then wait,
inc bx; if „yes”, then goto to the next byte
dec cх; are all the bytes transferred ?
jnz М1; if „not”, then to repeat
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Intel 8259
The Intel 8259 is a family of Programmable
Interrupt Controllers (PICs) designed and
developed for use with the Intel 8086 16-bit
microprocessors. The family originally
consisted of the 8259, 8259A, and 8259B
PICs, though a number of manufacturers
make a wide range of compatible chips today.
The 8259 acts as a multiplexer, combining
multiple interrupt input sources into a single
interrupt output to interrupt a single
device.The 8259, though originally a separate chip, is now
part of the Southbridge chipset on modern x86 motherboards.
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.
The main lines of an 8259 are follows: eight interrupt input request
lines named IRQ0 through IRQ7, an interrupt request output line
named INTR, interrupt acknowledgment line named INTA, D0
through D7 for communicating the interrupt level or vector offset.
Other connectors include CAS0 through CAS2 for cascading
between 8259s.
Up to eight slave 8259s may be cascaded to a master 8259 to
provide up to 64 IRQs. 8259s are cascaded by connecting the INT
line of one slave 8259 to the IRQ line of one master 8259.
There are three registers, an Interrupt Mask Register (IMR),
an Interrupt Request Register (IRR), and an In-Service
Register (ISR). The IRR maintains a mask of the current interrupts that are
pending acknowledgement, the ISR maintains a mask of the interrupts that are
pending an EOI, and the IMR maintains a mask of interrupts that should not be
sent an acknowledgement.
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The controller of interrupts
BUS
address
control
data
Master Cl
CS
WR
RD
AO
INTA
SP
CPU
CAS0
CAS1
CAS2
INT
IR7
IR6
IR5
IR4
IR3
IR2
IR1
IR0
D7-D0
Slave IC
CS
WR
RD
AO
INTA
SP
DC
D7-D0
CPU
CAS0
CAS1
CAS2
INT
IR7
IR6
IR5
IR4
IR3
IR2
IR1
IR0
There is possible
a cascading
connection up to
9 LIS.
One of the
controllers is a
master, and
others 8 are
slaves.
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The controller of interrupts
We won’t describe the instructions of initialization in
details, and nither operations of the 8259 controller. I
refer to complementary literature about 8259 LIS.
In personal computers BIOS is responsible for the
initialization of the modes work of 8259 chips.
Not experienced programmer won’t need to reprogram a
controller – it’s dangerous, because wrong reprogram will
cause the logic blackout of the whole system.
At the next slide you can see the list of interrupts in
standard PC,
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Master 8259
IRQ0 – Intel 8253 or Intel 8254 Programmable Interval Timer, aka
the system timer
IRQ1 – Intel 8042 keyboard controller
IRQ2 – cascaded to slave 8259 INT line
IRQ3 – 8250 UART serial port COM2 and COM4
IRQ4 – 8250 UART serial port COM1 and COM3
IRQ5 – Intel 8255 parallel port LPT2
IRQ6 – Intel 82072A floppy disk controller
IRQ7 – Intel 8255 parallel port LPT1
Slave 8259
IRQ8 – real-time clock (RTC)
IRQ9 – no common assignment
IRQ10 – no common assignment
IRQ11 – no common assignment
IRQ12 – Intel 8042 PS/2 mouse controller
.
IRQ13 – math coprocessor
IRQ14 – hard disk controller 1
IRQ15 – hard disk controller 2
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DMA controller (function)
The function of DMA is to make СPU free
from routine input-output operations.
DMA-direct memory accses is the only of LIS,
which can change address bus!
Working in the mode of master all the cycles of
communication are executed on-line DMA. At
that moment MP is disconnected out of buses
and it’s in the condition of «bus mastering»
executing programm from cash-memory.
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Home task ( instead of a test )
1. What kind of equipments work in
interrupts in PC ?
2. What kind of equipments in PC use a
DMA controller ?
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Control questions
5.
Structure of Motherboard of modern PC
Give an example of block-diagrams of moderm MB
Explain block ov timer ( pparallel or serial port)
Explain a function and a principle of work of an interrupt
controller
Make a program using 3 interrupts.
6.
Progress in system busses
1.
2.
3.
4.
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