Introduction to ECE 510 Adv.Logic Synthesis

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ECE 171
first class in logic and computers
Dr Marek Perkowski
[email protected]
http://www.ee.pdx.edu/~mperkows
•Introduction
•Grading
•What is this class about
Do not take notes
You will get all slides.
All slides will be on
the class webpage.
PSU sequence of classes

This is a complete sequence related to digital logic design automation.
Design with
ECE 171
ECE 271
Logic
Synthesis
Fall
Testing and
Design for Test
Fall
VHDL/Verilog
Sequential
Circuits
Winter
Spring
Formal
Verification
and Design
Spring
Quantum
Computing
Grading System




Homeworks
Midterm 1
Midterm 2
Final Exam
=
=
=
=
45 %
15 %
15 %
25 %
Homeworks include simple project
– Final examination (2 Hours) - Questions from all the
course, but with emphasis on the second half of the
course.
– Midterm Examination (open book, in class)
– Homeworks
– Presentations of homeworks
Remember that all exams are:
Remember that I emphasize in this class not only
hard work but also….
TEXTBOOKS

Strongly Recommended
– Wakerly, recent edition.
– Randy Katz, Contemporary Logic Design, Benjamin/Cummings,
1994
– Perkowski and Mishchenko, 1999-2000

Useful
– Capilano Computing, LogicWorks 3, 1995 (includes 3.5” diskette
for Windows). This is a simulation program .
Other Information
 There
is a WWW Home page for this subject.
 Most PowerPoint 4.0 slides you see here, plus a Postscript
printable version with 6 slides per page will be available.
 Lectures will be available within 24 hours after the lecture is
given (mainly because I will be completing the lectures on
Sunday nights and Monday mornings prior to the lecture).
 All sorts of other info will be there as well.
 Class announcements will appear in the “class schedule”
pages of this class at the WWW page of Marek Perkowski.
 Assignment: Find this page using Google Engine. Type
+Perkowski +Marek and next go to “Classes that I teach”
Other Information


Send emails with questions.
I will post news for class students of this group. I presume that it is
read within 2 or 3 working days. YOU ARE RESPONSIBLE FOR
READING THE NEWS IN CLASS SCHEDULE LINK!

Robot building
PLD and Verilog compiler

Simulation

 General
students
information and special tasks for ambitious
Any Other Administrative
Details?
!
Now is the time to ask
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