Technology 9

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Technology 9
computer system -- large collection of electric switches
electric switch – two states 0 & 1
 vacuum tubes – ENIAC 1945 18,000 vacuum tubes, 1,800 sq ft floor space, i.e., 42’x42’
 transistors – semiconductors,
i.e., material that can either conduct or restrict the conduction of electricity
silicon & other materials
 impurities http://electronics.howstuffworks.com/diode1.htm
 operation http://electronics.howstuffworks.com/diode.htm
apply a voltage to silicon -- electricity flows
silicon without a voltage – the silicon prevents the flow of electricity
 history
http://nobelprize.org/educational_games/physics/transistor/history/
 integrated circuits – large number of components burned into a single chip
 transistors -- switches
 resistors – restricts the flow of electricity in both directions
 capacitors – holds electrical charge
 diodes
o restricts the flow of electricity in one direction while
o allowing the flow in the opposite direction
micoprocessor – integrated circuit, i.e., a computer chip, that contains a CPU
current technology – integrated circuits can hold as many as 1.7 billion transistors
decimal number system – base10
octal number system – base 8
binary number system – base 2
hexadecimal number system – base 16
http://www.ecs.csun.edu/~cputnam/Comp516/Number%20Systems.htm
bits
bytes – 8 bits
nibbles – 4 bits
word – number of bits that a computer can work with at any one time
ASCII (American Standard Code for Information Interchange)
http://www.asciitable.com/
http://en.wikipedia.org/wiki/ASCII
Unicode
http://unicode.org/charts/
http://en.wikipedia.org/wiki/Unicode
Central Processing Unit (CPU)
 executes every instruction provided to the computer
 add, subtract, multiply, divide, decisions, loops, etc
 Intel
o Xeon
o Core 2 Extreme
o Celeron
o Itanium 2
o Pentium
 Advanced Micro Devices
o AMD-K6
o Athlon
o Sempron
o Turion
Motherboard/Backplane – main circuit board
 CPU socket
 Memory card slots
 Expansion slots
 Electrical paths connecting the various components
 System Clock – metronome
o Starting Electrical Current Flow  Surge
o Stopping Electrical Current Flow  Surge
o Metronome tick signals the start of an electrical current flow
o Metronome tock signals the end of an electrical current flow
o Clock cycle  tick-tock  establishes the pace by which transactions occur
o Clock Speed  pace  measured in Hertz (Hz)
o Current Clock Speeds 2-4 GHz
CPU Internals
 Control Unit
 Arithmetic Logical Unit
 Registers
 Cache memory

Basic Machine Cycle
 Fetch Instruction – move instruction from RAM to CPU
 Decode Instruction
 Execute Instruction
 Place result in designated registers

Hypertheading – single processor, multiple information flows

Multicore Technology – multiple processors on same chip
Control Unit
 Decodes Instructions
 Directs the following units in the execution of the various instructions
o Arithmetic Logical Unit
o Registers
o Cache Memory
o Ram Memory
o Input & Output Units
Cache Memory
 L1 Cache – located in the CPU chip (32KB) faster than L2
 L2 Cache – located next to the CPU chip (2MB) faster than L3
 L3 Cache – located between RAM & L2 Cache (2MB-8MB) faster than RAM
Assembly Language
Instruction Set
ADD M1, M2
ADD R1, R2, R3
Assembly Process
ADD M1, M2  1101 0110 1110 1001 1110 1011
Machine Language
ADD 1101 0110  each bit activates a specific electrical line in the Control Unit
thus causing the ALU to add two numbers previously stored in the storage locations
with addresses 1110 1001 and 1110 1011
ALU Operations
 Add
 Subtract
 Multiply
 Divide
 Or
 An
 Not
Storage Hierarchy
1. Registers – CPU
2. L1
3. Ll2
4. L3
5. RAM
6. Virtual Memory
7. Hard Drives – Optical Disk Drives
FastSpeed
Small Memory
SlowSpeed
Large Memory
Access Time – time it takes to locate and move information from RAM to the CPU
The Central Processor Unit consists of a series of registers that hold data during computations, an
Arithmetic Logical Unit that performs the arithmetic and logical operations, a Control Unit that
controls the operations of the CPU and transfers between the CPU and the Memory Unit. The Program
Counter contains the address of the NEXT instruction to be executed by the system; the Instruction
register contains the instruction currently being executed.
The Internal Cache Memory operates a slower speed than the Registers but faster than the External
Cache Memory; the External Cache Memory operates at a faster speed than the Memory Unit. When
the Control Unit determines that data is required, the system first
Looks for it in the Internal Cache Memory; if it is not there, the system looks for the information in the
External Cache Memory. If it is found there, a block of data is moved from the External Cache Memory
to the Internal Cache Memory; if it is not there, the system looks for the information in the Memory
Unit. If it is found there, a block of data is moved from the Memory Unit to the External Cache Memory
and a subset of the block is sent to the Internal Cache Memory.
Instruction Fetch (IF) – uses the contents of the Program Counter to locate and retrieve
the instruction from memory and placing it in the Instruction Register.
Instruction Decode (ID) – Control Unit inspects the Instruction Register and determines
the operation to be performed.
Data Fetch (DF) -- Control Unit inspects the Instruction Register and determines the
location of the data to be used in the execution of the operation and retrieves the data
from memory so that operation can proceed.
Instruction Execution (IE) – Control Unit instructs the various units in the CPU to perform
the operation.
Return Result (RR) – return the result from the operation and stores it in the proper
place in a register or in Memory.
Memory
Unit
CPU
Register A
Control Unit
Register X
Register Q
Program Counter
Internal Cache
Memory L1
Arithmetic
Logical Unit
Instruction Register
External Caches
Memory L2/L3
RAM Types
MRAM – Magnetoresistive Random Access Memory
Magnetic Plates hold data
99% less power than DRAM
DRAM (Dynamic RAM)
 access speeds 60 nanoseconds
 inexpensive, older systems
 capacitor-transistor combination
o transistor charges/discharges the capacitor
o capacitor leakage
o periodic recharging is necessary
o refresh signal – floods current through the open transistors
SDRAM (Synchronous DRAM) – much faster than DRAM
Double Data Rate Synchronous DRAM (DDR SDRAM) – faster than SDRAM
DDR2 SDRAM – twice the throughput of DDR SDRAM
Dual Channel DDR2 SDRAM – twice the throughput of DDR2 SDRAM
-- used on high end multimedia & gaming machines
SRAM (Static RAM)
 consists of only transistors – no refresh required
 much faster than DRAM
 expensive used only in the Cache Memory
ROM – BIOS Software
Bus
 set of electrical wires & communication protocols that connect various computer
components
 Local Buses – fast connections between very few cmponents
o Front Side Bus – directly connects CPU to RAM
o Back Side Bus – directly connects CPU to the L1 Cache Memory
 Expansion Bus –slower connections between multiple components
o Disk Storage
o Keyboard
o Video
o Sound
o Other Expansion Slot Devices
Bus Clock Speed
 rate at which data move from one location to another
 measured in MHz – millions of clock cycles per second
 FSB bus speeds range between 667 MHz -- 1066 MHz
Bus Width (bandwidth)
 number of lines in the bus
 measures the number of bits of data that can be sent at any one time
 measured by the number of bits
o 16 bit bus
o 32 bit bus
o 64 bit bus
o 128 bit bus
o 256 bit bus
 determines the processors effective word size, i.e., if processors word size is 64
bits but the bus width is 32, the effective processing speed is reduced by half
Data Transfer Rate = Bus Clock Speed x Bus Width
e.g., 1066 MHz x 64 bits 
(1066 million cycles /second) x 64 bits  64.224 GB/second
Expansion Buses – Revisited
 Industry Standard Architecture (ISA) – old technology
 Extended Industry Standard Architecture (EISA) – old technology
 Accelerated Graphics Port (AGP) – recent technology
 Peripheral Component Interconnect Express (PCIe) – newest technology
Moore’s Law
 number of transistors on a processor would double every 18 months
 8086 chip – 29,000 transistors, 5 MHz
 Itanium chip – 592 million transistors, 3.6 GHz
 Itanium 2 chip – 1.72 billion transistors
Pipelining
 Four-Stage Pipeline
o Fetch Instruction Unit
o Decode Unit
o Execute Instruction
o Store Results
 Execution of a Four-Stage Pipeline -- Simultaneous Actions
o Fetch instruction #4
o Decode Instruction #3
o Execute Instruction #2
o Store Results from Instruction #1
 Effective Action of a Four-Stage Pipeline
o at each clock tick – move instruction to the next stage
o processing of four instructions at the same time
o approximately 3.5 fold increase in speed
Pentium 4 with Hyperthreading  31-stage pipeline
Single Instruction – Multiple Data Streams
 used for multimedia systems – video, speech, and image processing
Dual Processors -- two completely separate CPU chips
 computer simulations
 video & graphics processing
Server Systems – four, six, eight processors
Mainframe Systems – 64 processors
Parallel Processing
 multiple interconnected computer systems
Super Computers
e.g., IBM Blue Gene/L 280.6 teraflops, i.e., 280.6 trillion operations/second
http://en.wikipedia.org/wiki/Supercomputing
www.top500.org
Concurrent Supercomputing Consortium
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