Lab 2 - Facstaff Bucknell

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ELEC 351L Electronics II Laboratory Spring 2004

Lab 2: BJT Amplifier Bias Design

Introduction

There are many methods for biasing BJT amplifier circuits. A distinguishing characteristic of each approach is the manner in which bias voltages and currents react to changes in the environment in which the amplifier operates. The most important environmental factor is usually temperature, but other factors such as pressure, vibration, humidity, and mechanical shock can have an effect on bias levels as well. Since it is almost always necessary for bias levels to remain constant, a bias design that is immune to variations in environmental factors is good design practice. In this lab experiment you will design and test a robust bias circuit for two common types of BJTs.

Theoretical Background

One of the most common techniques for stabilizing bias levels is to use an emitter degeneration resistor R

E

as shown in Figure 1. This scheme is also sometimes called the four-resistor bias network . Resistor R

E

introduces into the circuit a small amount of negative feedback, which has the effect of reversing any drift in a given bias voltage or current. For example, if the temperature of the BJT rises and causes an associated rise in the value of

F

, the collector current tries to rise as well. However, a rise in collector current causes a corresponding rise in the

V

CC

I

1

R

1

I

C

R

C

V

C output V

B

I

2

R

2

I

B

+

V

RE

R

E

Figure 1. Common emitter amplifier bias network with emitter degeneration. voltage drop across R

E

. This in turn causes the base current to drop, which counteracts the rise in the collector current. The collector current thus remains at its design level, regardless of the drift in

F

.

1

There are a number of ways in which the design of the bias circuit in Figure 1 can proceed, depending on the particular task the circuit is to perform. Typically, the quiescent values of the collector current I

C

and either the collector-emitter voltage V

CE

or node voltage at the collector

V

C

(the voltage measured between the collector and ground) are specified. The values of the four resistors must then be determined to meet those specifications. In most cases it is adequate to set

V

RE

, the bias voltage across R

E

, to

V

RE

0 .

1 V

CC to 0.3

V

CC

.

In setting V

RE

, the approximation I

E

≈ I

C

is usually assumed. The base bias node voltage V

B

(measured between the base and ground) is given by

V

B

V f

V

RE

, where V f

is the base-emitter junction turn-on voltage (about 0.7 V for silicon BJTs). A relatively large voltage drop across R

E

makes the value of V

B

immune to variations in V f

, which has a temperature coefficient of approximately −2 mV/°C; that is, for every one-degree rise in temperature, V f

drops by 2 mV.

It is also usually desirable to employ a “stiff” base bias network ( R

1

and R

2

). In a stiff network the voltage at the junction of the two resistors is insensitive to the base current I

B

flowing out of the junction. This implies that the current I

2

flowing through R

2

should be much larger than I

B

, regardless of the value of

F

. A common rule of thumb is to make

I

2

10 I

B max to 20 I

B max or more, where I

B max

is the maximum expected value of the base current. A data sheet can usually be consulted to find the range of expected values of

F

for the BJT being used. The maximum base current can then be found using

I

B max

I

C

F min

.

The procedure just outlined uses rules of thumb developed over decades of experience to determine the values of the resistors R

1

, R

2

, and R

E

. It remains now to determine the value of the collector resistor R

C

. The other three resistors primarily control the value of I

C

and its stability.

The main task of R

C

is to set the value of V

C

or V

CE

. If the value of V

C

has been specified explicitly (i.e., a particular numerical value is specified), then it can be found directly using

R

C

V

CC

I

C

V

C .

If V

CE

is specified, then

R

C

V

CC

V

CE

I

C

I

C

R

E ,

2

where I

C

R

E

is the voltage across R

E

, which has usually been determined by this time. It is possible that the specification might call for V

C

to be placed in the middle of the available swing range of v

C

. That is, an absolute value is not specified. In this case, an appropriate value for R

C is given by

R

C

V

CC

V sat

2 I

C

R

E

, which is derived in a homework problem. Regardless of the method used to determine R

C

, the actual collector voltage v

C

(with signal included) will swing between the maximum and minimum values given by v

C max

V

CC

and v

C min

R

E

V

CC

R

E

R

R

C

C

V sat .

Experimental Procedure

Design a bias circuit ( R

C

, R

E

, R

1

, and R

2

) for a common-emitter amplifier with emitter degeneration like the one shown in Figure 1. Use a 2N3904 npn transistor initially for the active device. Later on you will also use a 2N2222 in the circuit. The design requirement is for a power supply voltage V

CC

of 12 V, a quiescent collector current of I

C

= 2 mA, and a quiescent output (collector) voltage V

C

that lies in the middle of the available swing range. Consult the data sheet for each transistor to find each range of expected values for

F

. On some data sheets the symbol h

FE

is used instead of

F

; look for the “DC forward current gain” specification.

Design a stiff base bias network ( R

1

and R

2

). For each of the four resistors, use a single unit with the closest standard value to the one you calculate (i.e., do not combine two or more resistors to obtain a closer match to your calculated value). Make sure that you clearly outline the design process in your lab notebook; include justifications for any assumptions you make.

Data sheets for both the 2N3904 and the 2N2222 are available via links on the Laboratory page at the course web site.

Calculate the amount of power that each transistor will have to dissipate in the quiescent state. How does this result compare with the specified power dissipation limits given in the

2N3904 and 2N2222 data sheets? That is, will each transistor operate well within its power dissipation rating? Calculate the power dissipated by each resistor as well.

Construct the circuit you designed, and measure (using the multimeter!) the quiescent output voltage V

C

and base voltage V

B

when a 2N3904 and a 2N2222 is each used in the circuit.

In each case, calculate the percentage error by which the measured quiescent output voltage varies from the target value. Explain whether or not this error seems reasonable given the standard values you had to use and the tolerances of the resistors.

For one of the transistors, raise its temperature by grasping it between two of your fingers, or, if a hair dryer is available, by blowing hot air on it. Monitor the quiescent output voltage as you heat the transistor. How much does the quiescent voltage change? Do you think this change is significant? Why or why not? If a coolant is available, spray the transistor with it and note any change in the quiescent output voltage.

3

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