MULTI-LEVEL UPQC CONNECTED
WITH DG (SOLAR–CELL)
Mohammad Shirin Tabassum
Malli Peddi Anitha
M.Tech Scholar,
Assistant Professor,
Department of Electrical & Electronics Engineering,
Department of EEE
R. V. R & J. C. College of Engineering,
R. V. R & J. C. College of Engineering
Chowdavaram, Guntur (A.P), India.
Chowdavaram, Guntur (A.P), India
Shirin.mst@gmail.com
mallipeddianitha@gmail.com
ABSTRACT:
1. INTRODUCTION
This paper presents a new Unified
power quality conditioning system
connected to solar cell, which is capable of
simultaneous compensation for voltage
and current disturbances in multibus/multi-feeder
systems.
In
this
configuration, shunt multi-level voltagesource converter (shunt VSC) and series
multi-level voltage source converter are
connected to the solar cell through DC
link capacitor. The system can be applied
to adjacent feeders to compensate voltage
sag,
voltage
swell
and
voltage
interruptions.
In
the
proposed
configuration, Cascaded H-bridge multiconverters with DC sources of different
voltage levels are used with SVPWM
control technique. Multi-level inverters
are used as to obtain the output waveform
as sinusoidal with reduced harmonics.
The performance of the ML-UPQC with
DG is designed by using MATLAB
Simulink
With increasing applications of
nonlinear and electronically switched
devices in distribution systems and
industries, power-quality (PQ) issues, like
harmonics, flicker, and imbalances have
become
a
serious
consideration.
Additionally,
lightning
strikes
on
transmission lines shift of capacitor banks,
and numerous network faults may cause PQ
issues, like transients, voltage sag/swell, and
interruption. So as to satisfy PQ normal
limits, it should be necessary to incorporate
some kind of compensation. Fashionable
solutions may be found with the kind of
active rectification or active filtering. A
shunt active power filter is appropriate for
the suppression of negative load influence
on the provision network, however if there is
a unit provide voltage imperfections, a series
active power filter could also be required to
produce full compensation. In recent years,
solutions
supported
versatile
AC
transmission systems (FACTS) have
appeared. Application of FACTS ideas in
distribution systems has resulted in an
exceedingly
new
generation
of
compensating devices. A unified power-
Keywords: Multi level inverter, solar cell,
power quality, sensitive load, voltage sag,
voltage-interruption.
quality conditioner (UPQC) is that the
extension of the unified power-flow
controller (UPFC) idea at the distribution
level. It consists of combined series and
shunt
converters
for
co-occurring
compensation of voltage and current
imperfections in a feeder. The interest in
distributed generation (DG) has been
increasing rapidly because DG might play
an important role in the future power
system. Security problem caused by some
transmission-line trip can be alleviated if a
large number of DGs are installed in the
power system. Moreover, DG can yield
economic benefits, such as reducing the loss
of transmission line and the cost of highvoltage equipment.
II.PROPOSED SYSTEM
In this paper, a brand new configuration of a
UPQC known as the multi converter unified
power-quality conditioner (ML-UPQC) is
conferred. The projected topology is used
for synchronic compensation of voltage and
current imperfections in feeder. The system
is additionally capable of compensating for
interruptions while not the necessity for a
battery storage system and consequently
while not storage capability limitations.
Overall diagram:
Fig1: the overview diagram of source
connected UPQC system
III. MULTI-LEVEL INVERTER
The principle function of the inverters is to
generate an AC voltage from a DC source
voltage. Multilevel converter UPQC which
improves the performance of the system.
Cascaded H-Bridge inverters are used.
Cascaded H-Bridge inverters can be
classified into two types based on the
amplitudes of the DC sources used. They
are: symmetrical multilevel inverters in
which sources are of equal amplitudes and
asymmetrical multilevel inverters in which
sources are of different amplitudes.
Compared to symmetrical multilevel
inverter it can be seen that asymmetrical
multilevel inverters can generate more
voltage levels and higher maximum output
voltage with the same number of bridges.
The asymmetric multilevel inverter can
produce N=2n+1-1, levels (n is the number
of sources and N is the number of levels in
the inverter output). The main advantage of
the asymmetric configuration is that if
minimizes the redundant output levels. The
inverter s^3 voltages (e.g. an inverter with
s=3 cells can generate 3^3=27 different
voltage levels. This multilevel inverter
consists of series connected cells. Each cell
consists of a 4-switch H-bridge voltage
source inverter. The output inverter voltage
is obtained by summing the cell
contributions.
Fig 2: Schematic structure of a VSC
IV. Theory and Operation
SVPWM for converters
of
Space vector modulation is based on
remodeling 3 phase quantities into the α-β
plane. In general, a three phase n-level VSI
features a total of n^3 space vectors,
therefore within the case of 3-phase three
level VSI there are twenty seven space
vectors that represent the various combos of
the ON/OFF of the twelve switches of the
three-phase VSI.The space vector of phase
voltage Vαβ can be defined in αβ-reference
frame as follows:
where a=ej(2/3) π is the complex operator
and Va,Vb and Vc are voltages of terminals
A, B and C with respect to the neutral point
O of DC bus. The magnitudes of the area
vectors shown in Fig. have only four values
as follows:
(i) Large magnitude with 2/3 p.u. value.
(ii) Medium magnitude with 1/√3 p.u. value.
(iii) Little magnitude with 1/3 p.u. value.
(iv) Zero magnitude.
The angle between adjacent area vectors is
30º that divide the area vector diagram into
twelve sectors(from sector I to sector XII)
and 3 planes.
Fig3. Three-phase VSI phase voltage
space vectors in the αβ plane.
The basic plan of Space Vector Modulation
is to compensate the specified volt-seconds
exploitation separate switching states and
their on-times created by electrical
converter. Based on the principle of voltsecond equivalent, that's volt-second worth
balance between magnitude of the reference
vector and also the actual shift state vectors,
standard space vector modulator uses the
closest three vectors ( tiny, medium and
large) and zero vector in one sector to
approximate reference voltage vector.
Three main problems should be resolved
in SVPWM procedure: detection of nearest
three voltage vectors to the reference vector,
determining of the corresponding perform
time and also the process sequence of those
3 voltage vectors. In order to discover the
closest 3 vectors to the reference vector, the
normal SVPWM technique compares there
reference vector with all the divided sections
successively beneath α-β reference system.
The computation is relative advanced in a
three-level device. In this work, one large,
medium and tiny space vectors are used to
generate the specified gating pulses for the
αβ- plane of the three-phase electrical
converter. The times (ta and tb) may be
calculated using large and medium space
vectors, then for odd-numbered sectors
And for even-numbered sectors
V. SOLAR CELL
Solar cell converts sunlight directly to dc
power.
Photovoltaic
cell
generates
electricity from the sun. PV panel works
under the phenomenon of photoelectric
effect. When solar cell are exposed to
sunlight, it converts solar energy into
electrical energy
It is used so as to maintain maximum power
at output side we are boosting the voltage by
controlling the current of array with the use
of PI controller. Depending upon
( the boost
converter output voltage this AC voltage
may be changes and finally it connects to the
utility grid which is a load for various
applications.
INCRIMENTAL CONDUCTANCE
MPPT ALGORITHM
In Incremental conductance method
the array terminal voltage is always adjusted
according to the MPP voltage it is based on
the
incremental
and
instantaneous
conductance of the PV module. Fig. shows
that the slope of the P-V array power curve
is zero at The MPP, increasing on the left of
the MPP and decreasing on the Right hand
side of the MPP. The basic equations of this
method are as follows.
𝑑𝐼/𝑑𝑉 = − 𝐼V at MPP
Fig4 : solar photovoltaic cell
The system configuration for the subject is
as shown figure3.Here the PV array may be
a combination of series and parallel solar
cells. This array develops the ability from
the solar power directly and it'll be changes
by relying informed the temperature and star
irradiances.
Fig5: system configuration of PV
𝑑𝐼/𝑑𝑉> −𝐼𝑉Left of MPP
𝑑𝐼/𝑑𝑉< −𝐼𝑉Right of MPP
Where I and V are P-V array output
current and voltage respectively. The left
hand side of equations represents
incremental conductance of P-V module and
the right hand side represents the
instantaneous conductance. When the ratio
of change in output conductance is equal to
the negative output conductance, the solar
array will operate at the maximum power
point. This method exploits the assumption
of the ratio of change in output conductance
is equal to the negative output Conductance
Instantaneous conductance. We have, P = VI
Applying the chain rule for the derivative of
products yields to ∂P/∂V = [∂(VI)]/ ∂V At
MPP, as ∂P/∂V=0 The above equation could
be written in terms of array voltage V and
array current I as ∂I/∂V = - I/V The MPPT
regulates the PWM control signal of the dc –
to – dc boost converter until the condition:
(∂I/∂V) + (I/V) = 0 is satisfied. In this
method the peak power of the module lies at
above 98% of its incremental conductance.
The Flow chart of incremental conductance
MPPT is shown below
Fig7: 27-level simulink model of UPQC
Fig6: Incremental Conductance
algorithm
VI. SIMULATION RESULTS
Fig8: controller block diagram D-link
capacitor is connected to the distributed
generation
generation.
system
i.e.,
photovoltaic
Fig12: Fault voltage waveform where the
voltage swell occur in between time of
0.016 and 0.0833
Fig9: Bus voltage on source side
Fig10: multi level series inverter
waveform
Fig13: Fault voltage waveform of sag
occurrence in between time of 0.016 and
0.0833
fig11: multi
waveform
Fig14: Fault voltage waveform the
interruption occurrence in between time
of 0.016 and 0.0833
level
shunt
inverter
Fig15: Load voltage after clearing fault
systems. In this paper 27-level inverter
UPQC prototype is used. The idea can be
theoretically extended to multi-bus/multifeeder systems by adding more series VSCs.
The performance of the ML-UPQC is
evaluated under various disturbance
conditions and it is shown that the proposed
ML-UPQC can compensate sag/swell and
interruption compensation. Compensation
for interruptions without the need for a
battery storage system and consequently,
without storage capacity limitation.
REFERENCES
Fig16: Load side Current waveformm
VII. CONCLUSION
In this paper, a new configuration for
simultaneous compensation of voltage and
current in adjacent feeders has been
proposed. The new configuration is named
Multi-level converter unified power-quality
conditioner (ML-UPQC). In this paper
Multi-level
prototype
model
was
implemented and simulation is done on the
11kv line and this proposed method
decreases the THD value. Compared to a
conventional UPQC, the proposed topology
is capable of fully protecting critical and
sensitive
loads
against
distortions,
sags/swell, and interruption in feeder
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