1 Michael Giallorenzo EE 210, Section 005 OpAmp Design Lab Lab partners: Christopher Tomasini and Zachary Jepsen­Burger OpAmp Design Lab Task 1 Design Objective In the first task, our Op­amp was being fed an alternating current, whose magnitude needed to be cut by a factor of one fifth, while not being inverted. Doing this with a single Op­amp was slightly complicated, simply because a signal being fed into the non­inverting terminal of an op­amp will always show a gain greater than one. With this in mind, our circuit first cut the input voltage by a factor of ten, then multiplied it by a gain of +2. This was done by using an inverting amplifier in tandem with a voltage divider. The schematic for our circuit is shown below in Schematic 1 Schematic Schematic 1 (task 1) Theory of Operation As previously mentioned, our goal in this schematic was to output a non­inverted 2 signal of the same frequency as the input, with an amplitude of 4 Vpp, compared to the input of 20 Vpp. This was accomplished by dividing the task into two parts: scaling the input voltage down to one tenth of its magnitude, then giving the voltage at the non­inverting terminal a gain of +2 (resulting in the output’s magnitude being exactly 1/5th of the input’s). To accomplish the first step, a voltage divider was used between the input voltage and the non­inverting terminal. A ratio of 9:1 was chosen for resistors 1 and 2 to drop the voltage by 9 tenths of its magnitude. R5 and R4 needed a ratio of 1:1, so that the gain on the voltage at the non­inverting terminal would be +2. Derivations and Analysis Vo=Vin*(R2/(R2+R1))*(1+R5/R4) Vo=4vpp Vin= 20vpp Gain=Vo/vin=4/20=⅕ V0=5*V0*(R2/(R2+R1))*(1+R5/R4) set 1+R5/R4=2, and R2/(R2+R1)=1/10 (1/10*2= ⅕) R2/(R2+R1)=1/10 Arbitrarily choose R2= 20k ohms 20k/(20k+R1)=1/10 ­> R1=180k ohms R4=R5>1k Arbitrarily choose R4= 10k ohms ­> R5=10k ohms Experimental Results We built our circuit following the schematic above, and obtained the following reading from our oscilloscope: 3 Oscilloscope Capture 1 (task 1) where channel two represents the input, and channel one represents the output. Though not measured or explicitly shown, by observation you can tell that both signals are in phase with eachother and have no dc offset, indicating that the task was completed successfully. Different load resistors were attached to the circuit, but each time the output shown above was produced, indicating that the load resistor affects the output current, but not the voltage. The measured voltages are slightly different than their expected values, but as shown in table 1 the ratio between the two is exactly what we expected. Variable Expected Measured Percent error (%) output voltage 4V 4.2V (4­4.2)/4*100%=­5 input voltage 20V 21V (20­21)/20*100%=­5 Gain (output/input) 5 21/4.2=5 0 R1 180k (ohms) 178.4k (ohms) .89 4 R2 20 20.5 ­2.5 R4 10 9.83 1.7 R5 10 9.89 1.1 Table 1: Measured data (task 1) Concluding Thoughts Overall this experiment was a success. Despite slight error in resistor values (see table 1), our gain was the exact value we were looking for to three significant figures. Theoretically, our circuit could have been even more accurate if better equipment was used and we could see more decimal places. Furthermore, using more accurate resistors, or combining resistors on the fly with the aid of an ohmmeter, we could have reduced the error that would arise when a more accurate oscilloscope read our input/output. Furthermore, assumptions such as wires and breadboards having no resistance were not true and introduced a nearly inconsequential amount of error. The aforementioned small errors aside, the near perfection of our results is indicative of the correct theory behind our circuit. Our equipment and environment may have stopped our circuit from being perfect, but our results were close enough to confirm that our schematic was correct. Task 2 Design Objective In this task, our two inputs were the different sides of a stereo audio signal. These two separate signals had different amplitudes, but when we combined them into a single mono signal we wanted each channel to be equally expressed. This was accomplished by using a weighted summing amplifier. The full circuit is shown below in Schematic 2 5 Schematic Schematic 2 (task 2) Theory of Operation The theory behind this circuit is that of a standard weighted summing amplifier. Two signals are fed through separate resistors into the inverting terminal sharing one feedback loop with a resistor. The gain on each signal is determined by the resistor the signal is fed through, and the resistance in the feedback loop. Since we were given specific input amplitudes and a specific desired output amplitude, there exists one certain ratio for the different resistors, though a nearly infinite number of different combinations of resistors could obtain the desired result. Derivations and Analysis For Right channel: Vin=0.2 Vpp Vout=­8 Vpp Gain(Right)=Vout/Vin=­8/0.2= ­40 For Left channel Vin=0.5 Vpp Vout= ­8 Vpp Gain(left) = Vout/Vin=­8/0.5=­16 6 ­R5/R1=Gain(right)=­40 ­R5/R2=Gain(left)=­16 Arbitrarily set R5= 80k ohms ­80k/R1=­4 ­> R1=2k ohms ­80k/R2= ­16 ­> R2=5k ohms Experimental Results When the circuit modeled in schematic 2 was built and hooked up to an oscilloscope, the following output was displayed Oscilloscope Capture 2 (task 2) Unlike task 1, there is clearly some error in this. The output (channel 1) is not quite high enough, and the right channel input (channel 2) is slightly too high. These errors, as well as other measurements and possible sources of error, are shown below in table 2. Variable Expected Measured Percent error (%) Right channel Vpp 200 (mV) 262 (mV) ­31 Output Vpp 16 (V) 12.7 (V) 20.63 R1 2k (ohms) 1.982k (ohms) 0.9 7 R2 5k (ohms) 5.03k (ohms) ­0.6 R5 80k (ohms) 80.4k (ohms) ­0.5 Table 2: Measured Data (task 2) Concluding Thoughts Several factors contributed to the error in this task. The most concerning aspect of this design being the input signal being supplied by the computer. Originally, our circuit did not function as expected, but we later realized this was because of a faulty cable the we were using to send the signal. We replaced this cable, but it is certainly possible that the replacement cable introduced some error, even if it wasn’t as bad as the first one. Furthermore, the volume and other settings in the computer affected the signal and introduced some error. As shown in oscilloscope capture 2, the peak to peak voltage in the right channel input was 262 mV, instead of the expected 200 mV. Though not shown, there was also error in the left channel. Corrupted inputs will of course result in an unexpected output, though the severity of these differences is not enough to bring the integrity of the circuit design into question. As usual, other errors exist simply because this circuit was built on a breadboard with real wires and resistors, and not in the perfect environment of a computer simulation. Our resistor values, shown in table 2 along with their percent errors, were never perfect. Similarly, the resistance of the wires and breadboards we used were not actually zero, though they are close enough to be assumed to be negligible. The op­amp also introduced some errors, as concepts like the virtual short circuit approximation are not 100% true, though we assume they are. While these sources of error did not break the circuit by any means, they do exist and did introduce some error in our measurements. However, these sources of error aside, our circuit was largely successful in completing its intended purpose. Task 3 Design Objective In this task, our input signals were the left and right channels of a stereo audio signal. Both these signals originally had the same amplitude of 500 mVpp, but the output of the opamp amplified and combined each signal. Through the use of potentiometers in our weighted summing amplifier, the portion of the output corresponding to each signal could be varied independently of the other. The schematic for this circuit is shown below in schematic 3. 8 Schematic Schematic 3 (task 3) Theory of Operation A standard weighted summing amplifier can take two signals, amplify them and combine them into one output signal. The gain on each signal is proportional to the resistance of the resistor in the feedback loop, and inversely proportional to the resistor between the input and the inverting terminal of the opamp. Since the gain of each of the two input signals is related to the resistance it is attached to, this means that variable resistors between each signal and the inverting terminal will enable variable gains for each signal. Since we were limited to 20k potentiometers, and because a resistor needed to be in series with the potentiometer so that there was always some resistance present, this dictated the other resistance values in the circuit. Derivations and Analysis Independently varying each input ­> one potentiometer on each signal Arbitrarily set R3 = R4 = 20k ohms (only size potentiometer available) Vout=­Asin(2*pi*440t)­Bsin(2*pi*3520t) volts Vin=0.25sin(2*pi*440t)+0.25sin(2*pi*3520t) Input Vpp(combined)=2*0.25+2*0.25=1 V Max output Vpp=16 V 9 Min output Vpp=0.4 V Max gain = max output vpp/input vpp = ­16/1=­16 Min gain = min output vpp/input vpp = ­0.4/1= 0.4 R1=R2 (gain range is the same on each signal) Min output gain = ­R5/(R1+20k)=­0.4
[1] Max output gain = ­R5/(R1)= 16
[2] Two equations ([1] and [2]), 2 unknowns (R5, R1) ­> R5=8.2k ohms, R1= 510 ohms = R2 Experimental Results After the circuit modeled in schematic 3 was constructed and the oscilloscope was hooked up to it, two screen captures were taken to show the range in output voltage. Oscilloscope Capture 3a (task 3): Lowest output voltage 10 Oscilloscope Capture 3b (task 3): Highest Output voltage Note that without changing the input voltage in channel 2 (the reading on the oscilloscope fluctuates), the output voltage varied from 0.380 to 14.1 Vpp (expected range was from 0.4 to 16). These errors and more are shown in table 3 below. Variable Expected Measured Percent error(%) Max Vpp 16 V 14.1 10 Min Vpp 0.4 V 0.38 V 5 R1 510 ohms 512 ohms ­0.392 R2 510 ohms 504 ohms 1.18 R3 20k ohms 19.92k ohms .4 R4 20k ohms 19.87k ohms .65 11 R5 8.2k ohms 8.09k ohms 1.34 Table 3. Measured Values (task 3) Concluding Thoughts Similar to task 2, this task was not perfect. As previously mentioned, the first cable we used to input the signal was faulty, and the replacement may not have been perfect. Yet again, the integrity of the input signal is questionable. Furthermore, none of our resistor values were perfect. While they were mostly close enough, this does introduce some error, as do assumptions such as there not being any resistance in wires or breadboards. The theory behind the design of this circuit is certainly correct, but the non ideal environment and equipment led to the measured data being slightly different than the expected. Ultimately these deviations from expectations are minimal, indicating that this task was completed successfully. Task 4. Design Objective In task four, our input signal had no DC offset and a voltage swing of 600 mV peak to peak. Theoretically, this signal is to be fed into a microphone that can handle an input ranging from 0 to +10 V. The purpose of our circuit in this task is to transform our input signal into an output that covers this full range without going over or under it. The schematic used to build this circuit is shown below in Schematic 4. 12 Schematic Schematic 4 (task 4) Theory of Operation The theory behind this circuit is that of an inverting amplifier with a DC offset. A DC offset of 5V was added to the circuit so that the center of the voltage swing would be in the middle of the prescribed range. Values for R5 and R4 were then chosen to amplify the input signal so that it completely filled the desired range. Though the input signal was both inverted and amplified, correct utilization of the DC offset rendered the inversion of the signal inconsequential, as the negative of a sinusoidal wave is essentially a sinusoidal wave with a phase shift. Derivations and Analysis Input: 0.3sin(2*pi*440t) V Output: 0 V< Asin(2*pi*440t) + B V< 10 V (logic) mean of output (DC offset)=5, Vpp = 10 Vout=Vin*­R5/R4 + 15 * R3/ (R3+R7) *(1+R5/R4) (note that R7 is broken up into R1 and R2 in schematic to match the available resistors) Gain=Vout/Vin=10 Vpp/ 0.6 Vpp= ­16.67 13 Arbitrarily set R5= 200k ohms Gain=­16.67=­R5/R4=­200/R4 ­> R4 = 12k ohms 15*R3/(R3+R7)*(1+R5/R4)=5 Arbitrarily set R3= 1k ohms 15*(1/( 1+R7))*(1+200k/12k)=5 ­> R7 = 52k = 51k+1k Experimental Results Though we used the schematic shown above when attempting to build this circuit in the lab, for some reason we were not able to make it work correctly in the allowed time period. However, this circuit was then built in MultiSim, shown below. MultiSim circuit 1 (task 4) 14 Fluctuations in the exact reading of the oscilloscope can not be shown in a single picture, but the mean value of the input (channel 2) varied between about ­2 mV to 2 mV, indicating that it was centered at about 0 V. Though this circuit was built in a computer simulator, there still was some slight error, shown below. Variable Expected Measured Percent Error (%) Mean output V 5V 4.97 V 0.6 Output Vpp 10 V 10 V 0 Mean input V 0 1.82 mV n/a (negligible) Input Vpp 600 mV 599 mV 0.167 Table 4. Measured Values (task 4) Concluding Thoughts Since this circuit was created in multisim, and not on a breadboard with non ideal wires/resistors, there is very little error present in this circuit. All resistor values are spot on, and presumably MultiSim sets the actual resistance of its wires to 0. The only source of slight error would have to be the oscilloscope. The oscilloscope in MultiSim is meant to act almost exactly like the Tektronix oscilloscope we use in the lab. As such, the numbers it outputs are the numbers calculated by an oscilloscope that is constantly receiving new data. This accounts for the error in the measured means of the input and output, as the mean of a sinusoidal function is only accurate when the function is at the end or beginning of a cycle. The same logic can also potentially apply to the function generator and the Op­amp, which are both meant to imitate real world devices. The op­amp for example is meant to be equivalent to a real world LF412CN, and would theoretically possess its same faults. If MultiSim applies this logic to all of its devices, it will introduce a small degree of error, but the error is small enough that the results are very clearly what we were looking for, meaning that we successfully completed this task. Task 5 Design Objective In task 5, the signal being inputted into the circuit has an amplitude of 0.2 Vpp and a DC offset between 2 and 5 volts. Our goal is to amplify and invert this signal by a factor of 100, and to remove the DC offset. This is accomplished by using an inverting amplifier in 15 tandem with a DC offset and a voltage splitter. The schematic for this circuit is shown below Schematic Schematic 5 (task 5) Theory of Operation The DC offset embedded in the signal is the main complication in this circuit. Amplifying the signal by a factor of ­100 is done simply by using an inverting amplifier setup with R1/R2 equal to 100. However, in doing this the DC offset is also being multiplied by a factor of ­100, meaning that the offset is now between ­200 and ­500. Using a voltage splitter with a built in potentiometer, the voltage at the noninverting terminal can vary enough to compensate for any offset in this range. Note that since the positive DC offset is sent through an inverting amplifier, the now negative offset must be countered by a positive voltage at the noninverting terminal. Derivations and Results Vin= 0.1*sin(2*pi*440t)+ B Volts 2V < B < 5 V Vout= ­10*sin(2*pi*440t) Volts Gain = ­10/0.1= ­100 ­100=­R1/R2 16 Arbitrarily set R1=500k ohms ­100=­500/R2 ­> R2= 5k ohms Greatest DC offset: 15 V * R4/(R4+R6+R3)*(1+R1/R2)=5*(R1/R2)
[1] Smallest DC offset: 15 V * R4/(R4+R3)*(1+R1/R2)=2*(R1/R2)
[2] R6=20k (only available potentiometer value) simplified: 15*R4/(R4+R3+20)=200/101
[1] 15*R4/(R4+R3)=500/101
[2] Two equations ([1],[2]), two unknowns (R4, R3) ­>R4=4.39k ohms, R3= 8.93k ohms Experimental Results The schematic above was constructed in MultiSim and hooked up to an oscilloscope. The finished circuit and the oscilloscope reading that goes with it are shown below. Two pictures are included to show that the setting of the potentiometer can eliminate a DC offset of 2V, 5V, or anything in between. 17 MultiSim Circuit 2a (task 5 DC offset of 2) 18 MultiSim circuit 2b (task 5, DC offset of 5) As usual, many of the values are slightly off from their predicted values. This is shown below in table 5 (data shown is from circuit 2a). Variable Expected Measured Percent Error (%) Output Vpp 20 Vpp 19.7 Vpp 1.5 Output V mean 0 87 mV n/a (negligible) Input Vpp 0.2 Vpp 0.197 Vpp 1.5 19 Input V mean 2 V 2 V 0 Table 5. Measured Values (task 5) Concluding Thoughts Just like in task 4, even though the circuit is being simulated by a computer, error still exists. This is because in many ways MultiSim attempts to act like a real circuit, not an ideal one. The limitations of the LF412CN are still present, and the assumptions we make regarding OPAMP analysis are only mostly true. Furthermore, the tektronix oscilloscope has oscillations in its exact measurements, much like a real oscilloscope. The values shown in the captures above only represent one instant of the circuit’s data, and the fluctuations are not accounted for. Much like Task 4, our results are close enough to the actual values that we can be fairly certain that our circuit is built based on sound math and logic. However, MultiSim purposely doesn’t create a perfect circuit environment, resulting in a less than perfect output. Though it is not perfect, the output is still close enough for us to consider this task a success. 20 Post Lab Questions 1. input Vpp= 20 8 < Desired output Vpp < 16 Smallest gain = 8/20= 0.4 Largest gain = 16/20= 0.8 If keeping R1 and R2 the same, the input signal is cut by a factor of 10 20/10*(1+R5/(R4+20))=8 20/10*(1+R5/R4)=16 Two equations, two unknowns: R4 = 15k ohms and R5 = 105k ohms. Circuit is shown below in MultiSim Circuit 3a and 3b This method assumes that the voltage is still cut by a factor of 10 before being fed into the noninverting terminal, though this does not have to be so. A potentiometer is then put in series with R4, though if desired it could be put in the feedback loop in series with R5, though this would result in different values of R4 and R5. Using this technique, R1 and R2 stayed the same as in task 1, which is convenient, but not necessary. 21 MultiSim Circuit 3a (Question 1) 22 MultiSim Circuit 3b (Question 1) 23 2. Simply put, an additional complication would arise simply because the equation for the gain on a non­inverting adder is far more complicating. If both of the signals are being fed into the noninverting terminal, the equation for the output voltage is instead Vo = (VR)(R3/R4 + 1)(R1 / (R1 + R2)) + (VL)(R3/R4 + 1)(R2 / (R1 + R2)) where R3 is the resistor in the feedback loop, R4 is the resistance at the inverting terminal, and R1 and R2 are the resistances corresponding to the right and left input signals. This is shown in the schematic below. MultiSim Circuit 4 (question 2) 24 3. The complication that arises if you want your output to be able to be 0 is that your gain must be able to be scaled down to 0 (not to be confused with a gain of 1). Using the same setup as task 3, the gain on each signal is R5/R1 and R5/R2. In order for either of these expressions to be able to hit 0, R5 must be able to be lowered to zero. This means that R5 must be a potentiometer. However, if R5 were the only potentiometer in the circuit, that means that you cannot vary the gain on the separate signals. If it is necessary to get an output of exactly zero, then each signal will always be weighted equally in the output. However, if a number just shy of zero (.0001 etc.) is acceptable, and very large potentiometers are available (or very small resistors, though this would introduce inaccuracy), then it is possible to obtain an output that is nearly zero, such as in the circuit shown below. However, in the lab we were working in, such potentiometers were not available. MultiSim Circuit 5a (Question 3) 25 MultiSim Circuit 5b. (Question 3) 4. Since there is a DC offset built into the input signal in task 5, this offset is subjected to the gain of the signal. This means that a variable gain would result in a variable DC offset in the inputted signal. This means that you would need to be able to vary the voltage at the noninverting terminal more accurately. The values used in task 5 all assumed that a signal being fed into the noninverting terminal would be receiving a gain of +101. If that gain could vary, that would introduce another unknown into the equation. These two equations were used to calculate the values of all of the resitors: 26 Greatest DC offset: 15 V * R4/(R4+R6+R3)*(1+R1/R2)=5*(R1/R2)
Smallest DC offset: 15 V * R4/(R4+R3)*(1+R1/R2)=2*(R1/R2)
Equations similar to the following would be needed if there was a variable gain Greatest DC offset, greatest gain: 15 V * R4/(R4+R6+R3)*(1+G1)=5*G1 Greatest DC offset, smallest gain: 15 V * R4/(R4+R6+R3)*(1+G2)=5*G2
Smallest DC offset, greatest gain: 15 V * R4/(R4+R3)*(1+G1)=2*G1 Smallest DC offset, smallest gain: 15 V * R4/(R4+R3)*(1+G2)=2*G2 If R6 is set at 20k, then there are four equations and four unknowns, meaning that there is only one solution that will satisfy this situation. Task 4 poses a similar problem, if we assume that the DC offset must be equal to half of the outputs Vpp (unclear since task four has a very specific operating range and must have a peak to peak output voltage equal to half that range). Yet again, the DC offset is being affected by the gain in the input signal, though there is no offset included in the signal itself. A potentiometer would be required at the noninverting terminal in order to vary the voltage at this terminal. 5. Our solution to task 5 assumes that a positive offset is being included in the input signal, and that it attempts to lower the output due to the effects of the inverting amplifier. As such the voltage being supplied to the voltage divider at the noninverting terminal is positive. If the offset could be positive or negative, it is possible that the voltage being applied here must in fact be negative instead of positive. There is no way for potentiometers or any combination of resistors to solve this problem, a switch must be used. A switch would have to be put near R4, where the 15 V source is connected in schematic 5. This swittch would be able to switch between being connected to +15 V, or ­15 V. The switch would have to be thrown by an observer who knows the sign of the offset or knows how to read an oscilloscope and toy with it until the offset is 0 V. An example of such a circuit is shown below, with the switch shown in both positions 27 MultiSim Circuit 6a (question 5, negative offset, switch attached to negative V) 28 MultiSim Circuit 6b (Question 5, Positive offset, switch attached to positive V)