Ambipolar electronics
Xuebei Yang and Kartik Mohanram
Department of Electrical and Computer Engineering, Rice University, Houston
{xy3,mr11,kmram}@rice.edu
Rice University Technical Report TREE1002
March 2, 2010
Abstract
Ambipolar conduction, characterized by a superposition of electron and hole currents, has been observed in many
next-generation devices including carbon nanotube, graphene, silicon nanowire, and organic transistors. This paper
describes exciting new design opportunities in both analog and digital domains, all of which are inspired by the ability
to control ambipolarity during circuit operation. We illustrate this with (i) a single-transistor polarity controllable
amplifier, which can greatly simplify communication circuits and (ii) polarity controllable ambipolar logic gates,
which are highly expressive yet compact compared to conventional CMOS.
1 Motivation
Ambipolar conduction, characterized by a superposition of electron and hole currents, has been experimentally reported in many post-silicon devices including carbon nanotubes [1] graphene [2], silicon nanowires [3, 4], organic
single crystals [5], and organic semiconductor heterostructures [6]. As opposed to unipolar silicon CMOS devices
whose p-type or n-type behavior is determined during fabrication, ambipolar devices can be switched from p-type to
n-type by changing the gate bias, e.g., [4, 7]. Ambipolar conduction is illustrated by the I-V curves for graphenebased transistors in Figure 1, where high transconductance required for analog applications and high Ion /Ioff required
for digital applications are observed, respectively. Note that the drain current first decreases and then increases with
increasing gate-source voltage, exhibiting p-type behavior with dominant hole conduction and n-type behavior with
dominant electron conduction, respectively. As seen in the figure, a minimum conduction point Vmin exisits for all
ambipolar devices.
Since conventional analog and digital circuits are based on unipolar devices, this novel ambipolar behavior was
initially considered undesirable and several techniques based on channel, gate, and contact engineering were explored
to suppress the ambipolar behavior [8–10]. However, recent work has shown that the ability to control device polarity
(p- or n-type) in-field presents new design opportunities in both analog and digital domains [11–14]. This position
paper generalizes the design principles of ambipolar electronics, presents new designs and applications, and outlines
challenges for the future.
2 Analog circuits
In the analog domain, ambipolar conduction can be used to simultaneously achieve both positive and negative gain
by controlling the gate bias. We illustrate this using a single transistor amplifier, called the output polarity controllable (OPC) amplifier. The OPC amplifier, whose schematic is shown in Fig. 2(a), is based on the common source/drain
amplifier for unipolar devices. When an ambipolar transistor is used to replace the unipolar transistor, the choice of
bias point(s) results in simple yet highly efficient designs for core analog components such as full-wave rectification,
frequency doubling, phase shift keying, and phase detection. The first such design reported in literature, based on
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Ion /Ioff [16]
graphene, uses a single bias point such that Vbias = Vmin [14]. In this configuration, the output of the OPC amplifier
has a fundamental frequency that is double that of the input signal and it functions both as a full-wave rectifier and a
frequency doubler.
Since analog design allows the use of multiple bias voltages, we believe that this principle can be generalized
as follows. When the OPC amplifier is biased such that Vbias < Vmin (Vmin is the minimum conduction point), the
small-signal transconductance gm = ∂Id /∂Vgs is negative, leading to a negative gain (∂Vout /∂Vgs = Rload ∂Id /∂Vgs =
Rload gm ). Similarly, if Vbias > Vmin , the transconductance is positive and the gain of the OPC amplifier is positive.
When only a single bias voltage Vbias = Vmin is chosen, a small signal input sees a positive gain in its positive phase
and a negative in its negative phase, resulting in both full-wave rectification and frequency doubling. When two bias
voltages are used, it is possible to use a large square-wave signal as the input such that the square-wave switches the
OPC amplifier between positive and negative gain modes. In this configuration, the OPC amplifier functions as a phase
modulator with applications to both analog and digital electronics. For example, if the square-wave is actually the data
stream, and it modulates the phase of a high-frequency carrier sine signal, the OPC amplifier realizes binary phase shift
keying (BPSK). BPSK based on the OPC amplifier is illustrated in Figure 2(b), and we validate our proposed design
using experimental data published for top-gated graphene transistors [15]. Traditionally, BPSK uses Si-based complex
analog multipliers that not only require multiple transistors and/or filters but are also bandwidth-limited to 10GHz [17].
In contrast, our proposed OPC amplifier based on ambipolar devices requires only one transistor and can operate at
potentially very high frequencies if fabricated with ambipolar devices such as graphene and carbon nanotubes, which
have been predicted to achieve an inherent cut-off frequency fT greater than 1 THz [18, 19]. Similarly, the OPC
amplifier can also be used in other multiplier-based applications such as phase detection. We believe that the simplicity
of structures such as the OPC amplifier that promise lower parasitics and power consumption, as well as high spectral
efficiency, merit further investigation of the applications of ambipolarity in applications such as quadrature and highorder PSK, frequency shift keying (FSK), analog-to-digital and digital-to-analog conversion, etc.
3 Digital circuits
For digital applications, it has been proposed to control ambipolarity through the fabrication of an extra gate, usually
termed the polarity gate. This was demonstrated early on for double-gate CNTFETs [7], and the first designs controlled
the top and back gates separately to realize a universal reconfigurable 8-function gate [11]. More recently, it was
proposed that the self-alignment fabrication process [20] could be used to realize top-gated ambipolar devices with
independent gates as shown in Fig. 3(a) [12]. Here, D, S, and G are the conventional drain, source, and gate, while gate
PG determines the polarity of the ambipolar transistor. A low/high voltage on PG results in p-type/n-type behavior,
respectively, and the polarity of the transistor can be expressed as the XOR of the G and PG inputs in Boolean terms.
This technology was used to explore in-field controllable dynamic logic [12] as well as static logic [13], and significant
gains in area, power, and performance have been reported. The higher expressive power over conventional CMOS gates
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Figure 2: (a) OPC amplifier (b) Waveforms for BPSK
along with in-field programmability and regular layout motivate the realization of dense and regular manufacturable
logic fabrics based on ambipolar transistors.
We believe that the design principles for ambipolar logic can be generalized using the schematic in Figure 3(b).
The ambipolar circuit style accepts regular inputs x1 , x2 , . . . , xn and control inputs cs , c1 , c2 , . . . , cn . The transistor
networks N1 and N2 are duals of each other, following series-parallel rules consistent with conventional CMOS. In
the simplest case, motivated by the tiny-XOR [21], the input cs (cs ′ ) controls the polarity of the supply rail (ground
rail) and the polarity gates of all the transistors in N1 (N2 ). If cs is high, the supply rail is high, the ground rail
is low, the transistors in N1 are p-type, and the transistors in N2 are n-type. Based on this, the circuit in Fig. 3(c)
implements the function f1 = (x1 x2 )′ . Similarly, if cs is low, the circuit implements the function f2 = (x1 + x2 )′ .
The circuit thus implements cs f1 + c′s f2 , i.e., cs (x1 x2 )′ + c′s (x1 + x2 )′ . Depending on the level of flexibility, i.e., the
number of double-gated ambipolar transistors whose control inputs ci can be controlled individually to determine the
polarity of the transistors driven by input xi , it is possible to realize more complex Boolean functions with embedded
XORs. This is illustrated for the example in Fig. 3(d), where the complex function cs (x1 ⊕ c1 )′ + c′s (x1 ⊕ c1 ), i.e.,
cs ⊕ x1 ⊕ c1 is realized using only 4 transistors. Such gates are significantly more compact and expressive than
comparable CMOS forms. We believe that as fabrication techniques advance and as multi-gate device technologies
mature, polarity controllable logic will open up new opportunities in circuit design, logic synthesis based on XOR
sum-of-product representations, and in-field programmable logic fabrics.
4 Challenges and opportunities
Whereas ambipolar behavior — that enables transistor conduction in either gate polarity — has been considered
undesirable in next-generation devices, there is mounting evidence that the ability to control ambipolarity presents
new design opportunities in both the analog and digital domains. Although several challenges, including (i) the ability
to reduce parametric variations, (ii) fabricating additional polarity gates, and (iii) modeling and simulation remain,
they are concurrently being addressed by the device and CAD communities. In summary, ambipolarity is here to stay
and this position paper strongly argues for further investigation of its applicability in both analog and digital domains.
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Figure 3: (a) Double-gate polarity controllable ambipolar FET, (b) polarity controllable ambipolar logic, (c) implementation of cs (x1 x2 )′ + c′s (x1 + x2 )′ , and (d) implementation of cs (x1 ⊕ c1 )′ + c′s (x1 ⊕ c1 ) = cs ⊕ x1 ⊕ c1
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