Chapter
#2:
Signals
and
Amplifiers
from
Microelectronic
Circuits
Text
by
Sedra
and
Smith
Oxford
Publishing
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C.
Smith
(0195323033)
Introduc;on
 IN
THIS
CHAPTER
YOU
WILL
LEARN
 The
terminal
characterisHcs
of
the
ideal
op‐amp.
 How
to
analyze
circuits
containing
op‐amps,
resistors,
and
capacitors.
 How
to
use
op‐amps
to
design
amplifiers
having
precise
characterisHcs.
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Introduc;on
 IN
THIS
CHAPTER
YOU
WILL
LEARN
 How
to
design
more
sophisHcated
op‐amp
circuits,
including
summing
amplifiers,
instrumentaHon
amplifiers,
integrators,
and
differenHators.
 Important
non‐ideal
characterisHcs
of
op‐amps
and
how
these
limit
the
performance
of
basic
op‐amp
circuits.
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2.1.1.
The
Op
Amp
Terminals
 terminal
#1
 inverHng
input
 terminal
#2
 non‐inverHng
input
 terminal
#3
 output
 terminal
#4
 posiHve
supply
VCC
 terminal
#5
 negaHve
supply
VEE
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2.1.2.
Func;on
and
Characteris;cs
of
Ideal
Op
Amp
 ideal
gain
is
defined
below
!! = "$!" ! !# %




ideal
input
characterisHc
is
infinite
impedance
ideal
output
characterisHc
is
zero
impedance
differenHal
gain
(A)
is
infinite
bandwidth
gain
is
constant
from
dc
to
high
frequencies
Q:
But,
is
an
amplifier
with
infinite
gain
of
any
use?
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2.1.2.
Func;on
and
Characteris;cs
of
Ideal
Op
Amp
 ideal
gain:
is
defined
below
!! = "$!" ! !# %
 ideal
input
characteris;c:
infinite
impedance
 ideal
output
characteris;c:
zero
impedance
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2.1.2.
Func;on
and
Characteris;cs
of
Ideal
Op‐Amp
 An
amplifier’s
input
is
composed
of
two
components…
 differen;al
input
(vdfi)
–
is
difference
between
inputs
at
inverHng
and
non‐inverHng
terminals
 common‐mode
input
(vcmi)
–
is
input
present
at
both
inverHng
and
non‐inverHng
terminals
*+,,+&-,+!$
"&./'01&$%# 2
!"##$%$&'"()
"&./'01&!"# 2
6
474
8 678
&#' = (34 + 3) ! (34 ! 3) = (34 ! 34 ) + (3 + 3)
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2.1.2.
Func;on
and
Characteris;cs
of
Ideal
Op‐Amp
 Similarly,
two
components
of
gain
exist…
 differen;al
gain
(A)
–
gain
applied
to
differenHal
input
ONLY
 common‐mode
gain
(Acm)
–
gain
applied
to
common‐
mode
input
ONLY
#$%%$&'%$()
$4-54-
!"#$
(*++),)&-*./
$4-54-
)0102!! =!3 +!
)0102!" =!3 !!
64
4744
8 64
4744
8 64
4744
8 6
474
8
= ('%& !3 + '!) ! ('%& !3 ! '!) = '%& (!3 ! !3 ) + ' (! + !)
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2.1.2.
Func;on
and
Characteris;cs
of
Ideal
Op
Amp
 Table
2.1:
Characteris;cs
of
Ideal
Op
Amp
 infinite
input
impedance
 zero
output
impedance
 zero
common‐mode
gain
(Acm
=
0)
 complete
common‐mode
rejecHon
 infinite
open‐loop
gain
(A
=
infinity)
 infinite
bandwidth
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2.1.3.
Differen;al
&
Common‐Mode
Signals
 Q:
How
is
common‐mode
input
(vcmi)
defined
in
terms
of
v1
and
v2?
!"#$%&!"'(!")*&
64
47448
%1 = %!"# ! %$# 3 2
{
+,--,".-,/$(!")*&
64
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8
1
/!00
%!"# = 9%1 + %2 : ((4*&(567,888((
2
%2 = %!"# + %$# 32
1442443
",".!"#$%&!"'(!")*&
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2.1.3.
Differen;al
&
Common‐Mode
!"##"$%#"&'()$*+,
644744
8
Signals
1
%!"# = 3%1 + %2 8
2
4+,(567"999
)$-'.,)$/()$*+,
64
47448
%1 = %!"# ! %$# :2
{
&)00
%2 = %!"# + %$# :2
1442443
$"$%)$-'.,)$/()$*+,
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2.2.
The
Inver;ng
Configura;on
 Q:
What
are
two
basic
closed‐loop
op‐amp
configuraHons
which
employ
op‐amp
and
resistors
alone?
 A:
1)
inverHng
and
2)
non‐inverHng
op
amp
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Figure
2.5:
The
inverHng
closed‐loop
configuraHon.
2.2.
The
Inver;ng
Configura;on
R2
facilitates
“negaHve
feedback”
R1
regulates
level
of
 ques;on:
what
are
two
basic
closed‐loop
op
amp
configuraHons
which
this
feedback
employ
op‐amp
and
resistors
alone?
 answer:
inverHng
and
non‐inverHng
op
amp
 note:
here
we
examine
the
inverHng
type
source
is
applied
to
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non‐inverHng
input
is
grounded
2.2.1.
Closed‐Loop
Gain
 Q:
How
does
one
analyze
closed‐loop
gain
for
inverHng
configuraHon
of
an
ideal
op‐amp?
 step
#1:
Begin
at
the
output
terminal
 step
#2:
If
vOut
is
finite,
then
differenHal
input
must
equal
0
 virtual
short
circuit
btw
v1
and
v2
 virtual
ground
exists
at
v1
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!"#$%&"'! '()'()+()(,"
644
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%* " %- =
=.
!
{
!
2.2.1.
Closed‐Loop
Gain
 step
#3:
Define
current
in
to
inverHng
input
(i1).
 step
#4:
Determine
where
this
current
flows?
 refer
to
following
slide…
!"#$%&'
(#)%*+
}
-#!" . ! -#, . #!" ! / #!"
$, =
=
=
%,
%,
%,
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2.2.
The
Inver;ng
Figure
2.5:
The
inverHng
closed‐loop
configuraHon.
Configura;on
i1
 ques;on:
what
are
two
basic
closed‐loop
op
amp
configuraHons
which
employ
op‐amp
and
resistors
alone?
 answer:
inverHng
and
non‐inverHng
op‐amp
1
 note:
here
we
examine
the
inverHng
type
i
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i
=
0
2.2.1.
Closed‐Loop
Gain
 step
#5:
Define
vOut
in
terms
of
current
flowing
across
R2.
 step
#6:
SubsHtute
vin
/
R1
for
i1.
!"#$%&'
(#)%*+
&"#$
}
= /&- 0 ! /'-(, 0 = !'-(,
&"#$
(,
= ! &!%
(.)'%$")*
note:
this
expression
is
one
of
the
fundamentals
of
electronics
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Figure
2.6:
Analysis
of
the
inverHng
configuraHon.
The
circled
2.2.1.
numbers
indicate
the
order
of
the
analysis
steps.
Closed‐Loop
Gain
 ques;on:
how
will
we…
 step
#4:
define
vOut
in
terms
of
current
flowing
across
R2
 step
#5:
subsHtute
vin
/
R1
for
i1.
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closed‐loop
gain
G
=
‐R2/R1
2.2.1.
Effect
of
Finite
Open‐Loop
Gain
 Q:
How
does
the
gain
expression
change
if
open
loop
gain
(A)
is
not
assumed
to
be
infinite?
 A:
One
must
employ
analysis
similar
to
the
previous,
result
is
presented
below…
"! =!
}
(#$%
")1 6 )2
)1
"!<! =
=
("
(&'
)2
# 2 + 7)1 6 )2 8 $
2+%
&
!
)
'
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non‐ideal
gain
!"#!=! #$%&'#$%&#()&*!+,./!'#&0()&--!+'#!-#3!&45&5
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ideal
gain
2.2.1.
Effect
of
Finite
Open‐Loop
Gain
 Q:
Under
what
condiHon
can
G
=
‐R2
/
R1
be
employed
over
the
more
complex
expression?
 A:
If
1
+
(R2/R1)
<<
A,
then
simpler
expression
may
be
used.
"!
"!
#$%%" + << ! %%&'()%%#!=! = " %%(*-(%%#!<! =
""
""
ideal
gain
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""! + ""
# " + ,"! + "" . $
"+%
&
!
'
(
non‐ideal
gain
Example
2.1:
Simple
InverHng
Amplifier
 Problem
Statement:
Consider
an
inverHng
configuraHon
with
R1
=
1kOhm
and
R2
=
100kOhm.
 Q(a):
Find
the
closed‐loop
gain
(G)
for
the
cases
below.
In
each
case,
determine
the
percentage
error
in
the
magnitude
of
G
relaHve
to
the
ideal
value.
 cases
are
A
=
103,
104,
105…
 Q(b):
What
is
the
voltage
v1
that
appears
at
the
inverHng
input
terminal
when
vIn
=
0.1V.
 Q(c):
If
the
open
loop
gain
(A)
changes
from
100k
to
50k,
what
is
percentage
change
in
gain
(G)?
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2.2.3.
Input
and
Output
Resistances
 Q:
What
is
input
resistance
for
inverHng
op‐amp?
How
is
it
defined
mathemaHcally?
 A:
R1
(refer
to
math
below)
 Q:
What
does
this
say?
 A:
That,
for
the
combinaHon
of
ideal
op‐amp
and
external
resistors,
input
resistance
will
be
finite…
!"#$%&"
#$%&'$()
!"#$%&"*#$%&'$()
this
assumes
that
64
4744
8 678
$
$!"
$
ideal
op‐amp
and
%# = !" =
= !" = %!
external
resistors
are
#{
6$!" ! ${! 78 %! $!" 8 %!
!"
considered
“one
#+%,
-$./0+'
+#*#!
1.2034
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Example
2.2:
Another
InverHng
Op‐Amp
 Problem
Statement:
Consider
the
circuit
below...
 Q(a):
Derive
an
expression
for
the
closed‐loop
gain
vOut/vIn
of
this
circuit.
 Q(b):
Use
this
circuit
to
design
an
inverHng
amplifier
with
gain
of
100
and
input
resistance
of
1Mohm.
 Assume
that
one
cannot
use
any
resistor
with
resistance
larger
than
1Mohm.
 Q(c):
Compare
your
design
with
that
based
on
tradiHonal
inverHng
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Figure
2.8:
Circuit
for
Example
2.2.
The
circled
numbers
indicate
the
sequence
of
the
steps
in
the
analysis.
Example
2.2:
Figure
2.9:
A
current
amplifier
based
on
the
circuit
of
Fig.
2.8.
The
amplifier
delivers
its
output
current
to
R
Another
InverHng
4.
It
has
a
current
gain
of
(1
+
R2
/R3),
a
zero
input
resistance,
and
an
infinite
output
resistance.
Op‐Amp
The
load
(R4),
however,
must
be
floaHng
(i.e.,
neither
of
its
two
PART
B:
Use
this
circuit
to
design
an
inverHng
amplifier
with
gain
of
100
and
input
resistance
of
1Mohm.
Assume
that
one
cannot
use
any
resistor
with
resistance
larger
than
1Mohm.
terminals
can
be
connected
to
ground).
 The
largest
resistor
on
may
choose
is
1Mohm
 Q:
Where
does
one
begin
(in
choosing
the
resistor
values)?
Which
resistor
would
you
define
to
be
1Mohm?
 A:
The
input
resistance
(R1)
should
be
set
as
high
as
possible,
therefore
1Mohm
 Q:
What
other
resistor
values
should
be
defined?
 A:
R2
=
1Mohm,
R4
=
1Mohm,
R3
=
10.2kohm
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2.2.4.
An
Important
Applica;on
–
The
Weighted
Summer
 weighted
summer
‐
is
a
closed‐loop
amplifier
configuraHon
which
provides
an
output
voltage
which
is
weighted
sum
of
the
inputs.
Figure
2.10:
A
weighted
summer.
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2.2.4.
An
Important
vOut
=
‐[
(R
f./RIn1)vIn1
+
(Rf./RIn2)vIn2
+
(Rf./RIn3)vIn3
+
…
]
Applica;on
–
The
Weighted
Summer
 weighted
summer
‐
is
a
closed‐loop
amplifier
configuraHon
which
provides
an
output
voltage
which
is
weighted
sum
of
the
inputs.
vIn1
vIn2
vIn3
RIn1
RIn2
RIn3
Rf
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vOut
Figure
2.10:
A
weighted
summer.
2.3.
The
Non‐Inver;ng
Configura;on
 non‐inver;ng
op‐amp
configura;on
–
is
one
which
uHlizes
external
resistances
(like
the
previous)
to
effect
voltage
gain.
However,
the
polarity
/
phase
of
the
output
is
same
as
input.
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Figure
2.12:
The
non‐inverHng
configuraHon.
2.3.
The
Non‐Inver;ng
Configura;on R1
and
R2
act
as
voltage
divider,
regulaHng
negaHve
feedback
to
the
inverHng
input
inverHng
input
is
grounded
through
R1
node
#1
node
#2
source
is
applied
to
non‐inverHng
input
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Characteris;cs
of
Non‐Inver;ng
Op‐Amp
Configura;on
'!"#
'$%
}
"
(! #
( " + $(! % (" &
!"#$%&'$!(# $ & >> " + % )##### )&=! = " + !
(" '
(" " + " + $(! % (" &
&
&
" + $(! % (" &
(*( + !"#$%&'$!( ) ###################( )
=
{&<!
" + $(! % (" &
'!"#
"+
&
'$%
" + $(! % (" &
" + $(! % (" &
,#-.#(/&'$!(&#--*- ) ###############*+, = "''
& + " + $(! % (" & " + " + $(! % (" &
&
" (" # " + $(! % (" &
!(0#-/!('&!(,1/&,*/#(/!$% ) ###('" = '!"# $
%
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&
Configura;on
and
Characteris;cs
of
Buffer
/
Voltage‐Follower
Op‐Amp
Configura;on
Figure
2.14:
(a)
The
unity‐gain
buffer
or
follower
amplifier.
(b)
Its
equivalent
circuit
model.
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Configura;on
and
Characteris;cs
of
Buffer
/
Main
point?
For
the
buffer
amp,
output
voltage
is
equal
Voltage‐Follower
Op‐Amp
Configura;on
(in
both
magnitude
and
phase)
to
the
input
source.
However,
any
current
supplied
to
the
load
is
drawn
from
amplifier
supplies
(VCC,
VEE)
and
not
the
input
source
(vI).
Figure
2.14:
(a)
The
unity‐gain
buffer
or
follower
amplifier.
(b)
Its
equivalent
circuit
model.
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2.4.
Difference
Amplifiers
 difference
amplifier
–
is
a
closed‐loop
configuraHon
which
responds
to
the
difference
between
two
signals
applied
at
its
input
and
ideally
rejects
signals
that
are
common
to
the
two.
 Ideally,
the
amp
will
amplify
only
the
differenHal
signal
(vdfi)
and
reject
completely
the
common‐
mode
input
signal
(vcmi).
However,
a
pracHcal
circuit
will
behave
as
below…
)!"# = *)$%& + *'()'(&
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2.4.
Difference
Amplifiers
common‐mode
input
common‐mode
gain
differenHal
input
differenHal
gain
)!"# = *)$%& + *'()'(&
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2.4.
Difference
Amplifiers
 common‐mode
rejec;on
ra;o
(CMRR)
–
is
the
degree
to
which
a
differenHal
amplifier
“rejects”
the
common‐mode
input.
 Ideally,
CMRR
=
infinity…
!$%% = #"$!"#!"
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#
#!"
2.4.
Difference
Figure
2.15:
RepresenHng
the
input
signals
to
a
differenHal
amplifier
in
terms
of
their
differenHal
and
common‐mode
components.
Amplifiers
#&&' = #"$!"#!"
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%!"
%#$
2.4.
Difference
Amplifiers
 Q:
The
op
amp
itself
is
differenHal
in
nature,
why
cannot
it
be
used
by
itself?
 A:
It
has
an
infinite
gain,
and
therefore
cannot
be
used
by
itself.
One
must
devise
a
closed‐loop
configuraHon
which
facilitates
this
operaHon.
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2.4.
Difference
Figure
2.16:
A
difference
amplifier.
Amplifiers
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2.4.1.
A
Single
Op‐Amp
Difference
Amp
 Q:
What
are
the
characterisHcs
of
the
difference
amplifier?
 A:
Refer
to
following
equaHons…
'!"#
*&! + &" ,&#
&!
=
'$%! ! '$%"
*&# + &$ ,&"
&"
"&" = &$ #
&!
%&'()+(((( $
% ((((('-./((((('!"# = ('$%! ! '$%" )
&"
&&! = &# '
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A
Shie
in
Nota;on
 Before
this
point…
 The
parameter
A
is
used
to
represent
open‐loop
gain
of
an
op
amp.
 The
parameter
G
is
used
to
represent
ideal
/
non‐ideal
closed‐loop
gain
of
an
op
amp.
 Aoer
this
point…
 The
parameter
A
is
used
to
represent
ideal
gain
of
an
op
amp
in
a
given
closed‐loop
configuraHon.
 The
parameter
G
is
not
used.
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2.4.2.
The
Instrumenta;on
Amplifier
 Q:
What
is
one
problem
associated
with
the
difference
amplifier?
 A:
Low
input
impedance.
 Q:
And,
what
does
this
mean
pracHcally?
 A:
That
source
impedance
will
have
an
effect
on
gain.
 Q:
What
is
the
soluHon?
 A:
Placement
of
two
buffers
at
the
input
terminals,
amplifiers
which
transmit
the
voltage
level
but
draw
minimal
current.
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2.4.2.
The
Instrumenta;on
Amplifier
 Q:
However,
can
one
get
“more”
from
these
amps
than
simply
impedance
matching?
 A:
Yes,
maybe
addiHonal
voltage
gain???
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2.4.2.
The
Instrumenta;on
Figure
2.20:
A
popular
circuit
for
an
instrumentaHon
amplifier.
Amplifier
stage
#1
stage
#2
 quesHon:
however,
can
we
get
“more”
from
these
amps
than
simply
impedance
matching?
 answer:
yes,
maybe
addiHonal
voltage
gain???
non‐inverHng
op
amp
(A1)
vOut
=
(1
+
R2/R1)vIn
non‐inverHng
op
amp
(A2)
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difference
op
amp
(A3)
vOut
=
(R4/R3)vdfi
2.4.2.
The
Instrumenta;on
Amplifier
 Q:
However,
can
one
get
“more”
from
these
amps
than
simply
impedance
matching?
 A:
Yes,
maybe
addiHonal
voltage
gain???
!"#$%&'"(&)$*!+,$(&,"
+$%!")-'$!#!+,$(#-./+&+'"(,&(&+0)"'(25265
644474448
%1 ! %2 "
+&'$ = # 4 + $ +()*
%3 % %4 &
14243
! !"#$ 7% 8
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addiHonal
voltage
gain
2.4.2.
The
Instrumenta;on
Amplifier
 advantages
of
instrumentaHon
amp
 very
high
input
resistance
 high
differenHal
gain
 symmetric
gain
(assuming
that
A1
and
A2
are
matched)
 disadvantages
of
instrumentaHon
amp
 ADi
and
ACm
are
equal
in
first
stage
–
meaning
that
the
common‐mode
and
differenHal
inputs
are
amplified
with
equal
gain…
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What
is
problem
with
ACm
=
A?
vIn1
vIn1 A
=
10
A
=
25
A
=
10
x
25
vIn2
vIn2
differenHal
gain
>>
common‐mode
gain
differenHal
gain
=
common‐mode
gain
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differen;al
gain
>>
common‐mode
gain
vIn1
=
10.03V
A
=
10
x
25
vIn2
=
10.02V
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vOut=
250
x
(10.03‐10.02)V
vOut
=
2.5V
no
problem!!!
differen;al
gain
=
common‐mode
gain
vIn1
=
10.03V
A
=
10
vOut1=
10
x
10.03
=
15V
saturaHon
A
=
25
vOut=
25
x
(15‐15)V
vOut
=
0V
problem!!!
vIn2
=
10.02V
vOut2=
10
x
10.02
=
15V
saturaHon
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2.4.2.
The
Instrumenta;on
Amplifier
 advantages
of
instrumentaHon
amp
 very
high
input
resistance
 high
differenHal
gain
 symmetric
gain
(assuming
that
A1
and
A2
are
matched)
 disadvantages
of
instrumentaHon
amp
 ADi
and
ACm
are
equal
in
first
stage
–
meaning
that
the
common‐mode
and
differenHal
inputs
are
amplified
with
equal
gain…
 need
for
matching
–
if
two
op
amps
which
comprise
stage
#1
are
not
perfectly
matched,
one
will
see
unintended
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2.4.2.
The
Instrumenta;on
Amplifier
 Q:
How
can
one
fix
this
(alleviate
these
disadvantages)?
 A:
Disconnect
the
two
resistors
(R1)
connected
to
node
X
from
ground,
making
the
configuraHon
“floaHng”
in
nature…
 A:
Refer
to
following
slide…
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Figure
2.20:
A
popular
circuit
for
an
instrumentaHon
amplifier.
(b)
2.4.2.
The
The
circuit
in
(a)
with
the
connecHon
between
node
X
and
ground
Instrumenta;on
removed
and
the
two
resistors
R
1
and
R1
lumped
together.
This
Amplifier
simple
wiring
change
dramaHcally
improves
performance.
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2.4.2.
The
Instrumenta;on
Amplifier
 Q:
How
can
one
analyze
this
circuit?
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2.4.2.
The
Instrumenta;on
Amplifier
 step
#1:
note
that
virtual
short
circuit
exists
across
terminals
of
op
amp
A1
and
A2
 step
#2:
define
current
flow
across
the
resistor
2R1
 step
#3:
define
output
of
A1
and
A2
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%&'()&*+(&,(-.,(%! (-/0(%"
64748
&# + $ ! &# ! $ = :
(((((999*+1'1%&'1
(((((((((((((((&#+ $ = &#!$
!"#$
6
4&74
8
&!"" ! &!"!
$'! =
"'!
)12-341(/&(23''1/*(5677(%7&5
6/*&(601-7(&,(-.,8(-77(&%($'! (5677(
%7&5(-2'&44('"
6447448
&()* ! = &!"! ! $'!'"
&()* " = &!"" + $'!'"
2.4.2.
The
Instrumenta;on
Amplifier
short‐ckt
vOut1
iR1
vOut2
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2.4.2.
The
Instrumenta;on
64444444744444448
Amplifier
"
$ ' !' % #
!"#$%&#$%&'()&$*'+,-$&./01(,)2$03,4&5$16&
%(''&+&)1(07$()8/1$'!"# ! !'!"# " $1,$2109&$:!
 step
#4:
Define
output
of
A1
and
A2
in
terms
of
input
alone
'!"# ! ! '!"# " = &'$%! + ( $%! $%" ) &! ' ! K
!&" + * 2444
,1444
3
'!"# ! ='$% ! + (& "&!
"
$ '$%! ! '$%" % #
$$$$$$$$$$$$$$$$$$$$$$$$$$$$$ K ! &'$%" ! (
) &! '
!&" + * 2444
,1444
3
'!"# " ='$% " !(& "&!
!"#$%&#$;,-3()&$1&+-2
64444444
744444448
$%)(
$6
4'74
8%
( '$%! ! '$%" )
'!"# ! ! '!"# " = *'$%! ! '$%" 5 + ! (
) &!
1424
3
( !&" )
'$%)(
*
+
$ !& %
'!"# ! ! '!"# " = ( " + ! ) '$%)(
* !&" +
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2.4.2.
The
Instrumenta;on
Amplifier
 step
#5:
Define
output
of
A3 .
 step
#6:
Define
gain
of
revised
instrumentaHon
amplifier.
!"#$%&*+,-./0-+/0
)-12%+&.+$!"#
$%&'
)! 64748
= 3$%&' " ! $%&' $ 4
)#
$%&'
)! " ")" #
= $$ +
% $!"#
)# & ")$ '
$%&'
)! " ")" #
= *(# = $ $ +
%
$!"#
)# & ")$ '
%&'()/&0
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2.5.
Integrators
and
Differen;ators
 integrator
/
differen;ator
amplifier
–
is
one
which
outputs
an
integral
or
derivaHve
of
the
input
signal.
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2.5.1.
The
Inver;ng
Configura;on
with
General
Impedances
 Q:
Does
the
transfer
funcHon
for
the
inverHng
op
amp
change
if
the
feedback
and
input
impedances
are
not
purely
resisHve?
 A:
No,
not
in
form…
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Example
2.4:
Other
Op‐Amp
ConfiguraHons
 Consider
the
circuit
on
next
slide
page.
 Q(a):
Derive
an
expression
for
the
transfer
funcHon
vOut
/
vIn.
 Q(b):
Show
that
the
transfer
funcHon
is
of
a
low‐pass
STC
circuit.
 Q(c):
By
expressing
the
transfer
funcHon
in
standard
form
of
Table
1.2,
find
the
dc‐gain
and
3dB
frequency.
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Figure
2.23:
Circuit
for
Example
2.4.
Example
2.4:
Other
Op‐Amp
ConfiguraHons
2.5.2.
The
Inver;ng
Integrator
 Q:
How
can
inverHng
op‐amp
be
adapted
to
perform
integraHon?
 A:
UHlizaHon
of
capacitor
as
feedback
impedance.
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2.5.2.
The
Inver;ng
Figure
2.24:
(a)
The
miller
or
inverHng
integrator.
(b)
Frequency
response
of
the
integrator.
Integrator
!"!#!$%
&'#('#
)&%#$*+
!
" 678
- !
#1$"2!+"#.3+241!(#!&"./3405......8'"#! /! 0 = #
$ ( '$% /! 0(! % # '"#! /!, 0
)-*& & ! =,
'
'"#!
2#+$3672#$#+.3+241!(#!&"./$405.
=#
'$%
+)-*&
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2.5.2.
The
Inver;ng
Integrator
 Q:
What
is
the
problem
with
this
configuraHon
(related
to
dc
gain)?
 A:
At
dc
frequency
(ω =
0),
gain
is
infinite
 Gain
=
1
/
(ω.R1CF)
 Q:
SoluHon?
 A:
By
placing
a
very
large
resistor
in
parallel
with
the
capacitor,
negaHve
feedback
is
employed
to
make
dc
gain
“finite.”
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Figure
2.25:
The
Miller
integrator
with
a
large
resistance
RF
2.5.2.
The
Inver;ng
Integrator
connected
in
parallel
with
C
in
order
to
provide
negaHve
feedback
and
hence
finite
gain
at
dc.
+/-&')$&+"#$'0/)%+)(&"1#023"""""""#$%$&#'"(&")&%*+"'),&-.666
'!"#
($ 7 (!
'+$-#45'+-+$"#$'0/)%+)(&"1-023"
=!
'%&
! + )($ *$
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Example
2.5:
Miller
Integrator
 Consider
the
Miller
integrator…
 Q(a):
Find
response
of
a
Miller
Integrator
to
input
pulse
of
1V
height
and
1ms
width.
 R1
=
10kOhm,
CF
=
10nF
 Q(b):
If
the
integrator
capacitor
is
shunted
by
a
1MOhm
resistor,
how
will
the
response
be
modified?
 note:
the
op
amp
will
saturate
at
+/‐
13V
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2.5.3.
The
Op‐Amp
Differen;ator
 Q:
How
can
one
adapt
integrator
to
perform
differenHaHon?
 A:
Interchange
locaHons
of
resistors
and
capacitors.
Figure
2.27:
A
differenHator.
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2.5.3.
The
Op‐Amp
Differen;ator
'! !" "% #
%&'()*+(%$,+)-&*.%*/($",-#0$$$$$$$$!#$% "% # = !(& )!
'%
"#$% "*#
)%+',12)%'%+$,+)-&*.%*/($"'-#0$$
= ! *(& )!
"!" "*#
Figure
2.27:
A
differenHator.
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2.5.3.
The
Op‐Amp
Differen;ator
filtering
characterisHc
is
high
pass
filter
magnitude
of
transfer
funcHon
is
|VOut
/
VIn|
=
ωRFC1
phase
of
transfer
funcHon
is
φ
=
‐90O
differenHator
Hme‐constant
is
frequency
at
which
unity
gain
occurs
and
defined
as
ω
=
1
/
RFC1
 Q:
What
is
the
problem
with
differenHator?
 A:
DifferenHator
acts
as
noise
amplifier,
exhibiHng
large
changes
in
output
from
small
(but
fast)
changes
in
input.
As
such,
it
is
rarely
used
in
pracHce.




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2.6.
DC
Imperfec;ons
 Q:
What
will
be
discussed
moving
on?
 A:
When
can
one
NOT
consider
an
op
amp
to
be
ideal,
and
what
effect
will
that
have
on
operaHon?
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2.6.1.
Offset
Voltage
 Q:
What
is
input
offset
voltage
(VOS)?
 A:
An
imaginary
voltage
source
in
series
with
the
user‐
supplied
input,
which
effects
an
op
amp
output
even
when
idfi
=
0.
What
will
happen
when
short
is
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Figure
2.28:
circuit
model
for
an
op
amp
with
input
offset
voltage
VOS.
2.6.1.
Offset
Voltage
 Q:
What
causes
VOS?
 A:
Unavoidable
mismatches
in
the
differenHal
stage
of
the
op
amp.
It
is
impossible
to
perfectly
match
all
transistors.
 Q:
Range
of
magnitude?
 A:
1mV
to
5mV
Oxford
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!""#$%&'(
!)%*)%
!""#$%
+!,%-.$
}
} ! ( "
)"#$%& = )$' # / + ! $
(/ &
%
This
relaHonship
between
offset
voltage
(VOS)
and
offset
dc
output
(V
OsOut)
applies
to
both
inverHng
and
non‐inverHng
op
amp.
2.6.1.
Offset
Voltage
However,
only
if
one
assumes
that
VOS
is
present
at
non‐inverHng
input.
 Q:
What
causes
VOS?
 A:
Unavoidable
mismatches
in
the
differenHal
stage
of
the
op
amp.
It
is
impossible
to
perfectly
match
all
transistors.
 Q:
Range
of
magnitude?
 A:
1mV
to
5mV
Oxford
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S.
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Smith
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!""#$%&'(
!)%*)%
!""#$%
+!,%-.$
}
} ! ( "
)"#$%& = )$' # / + ! $
(/ &
%
2.6.1.
Offset
Voltage
 Q:
How
can
this
offset
be
reduced?
 A:
offset
nulling
terminals
–
A
variable
resistor
(if
properly
set)
may
be
used
to
reduce
the
asymmetry
present
and,
in
turn,
reduce
offset.
 A:
capaci;ve
coupling
–
A
series
capacitor
placed
between
the
source
and
op
amp
may
be
used
to
reduce
offset,
although
it
will
also
filter
out
dc
signals.
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Figure
2.30:
The
output
dc
offset
voltage
of
an
op‐amp
can
be
trimmed
to
zero
by
connecHng
a
potenHometer
to
the
two
offset‐nulling
terminals.
The
wiper
of
the
potenHometer
is
connected
to
the
negaHve
supply
of
the
op
amp.
Oxford
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Figure
2.31:
(a)
A
capaci;vely‐coupled
inverHng
amplifier.
(b)
The
equivalent
circuit
for
determining
its
dc
output
offset
voltage
VO.
dc
signals
cannot
pass!
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2.6.2.
Input
Bias
and
Offset
Currents
 input
bias
current
‐
is
the
dc
current
which
must
be
supplied
to
the
op‐amp
inputs
for
proper
operaHon.
 Ideally,
this
current
is
zero…
 input
offset
current
‐
the
difference
between
bias
current
at
both
terminals
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Figure
2.32:
The
op‐amp
input
bias
currents
represented
by
two
current
sources
IB1
and
IB2.
2.6.2:
Input
Bias
and
Offset
Currents
Figure
2.32:
The
op‐amp
input
!"#$%&'(()*+
bias
currents
represented
by
#+%+)(,"*#-$
./%#*0%.1
two
current
sources
I
B1
and
IB2.
678
'!/ + '!1
"*5'+%!"#$%&'(()*+6%%%%%:%%%%%%%%%%'! =
 input
bias
current
‐
is
the
1
dc
current
which
must
be
0"22)()*&)
supplied
to
the
op‐amp
!)+3))*%!"#$4
inputs
for
proper
6
474
8
operaHon.
"*5'+%722$)+%&'(()*+6%%%%%%%%%%%%%'"# = '!/ ! '!1
 Ideally,
this
current
is
zero…
 input
offset
current
‐
the
64
7
4
8
difference
between
bias
()$'-+"*8%7'+5'+%97-+#8)6%%%%% (!"$% = '!/)&
current
at
both
terminals
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2.6.2.
Input
Bias
and
Offset
Currents
 Q:
How
can
this
bias
be
reduced?
 A:
Placement
of
R3
as
addiHonal
resistor
between
non‐inverHng
input
and
ground.
 Q:
How
is
R3
defined?
 A:
Parallel
connecHon
of
RF
and
R1.
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"#$%$&'"()*+,#-(.#&/##0
0'01%02#"&%03(%0)4&
+0-(3"'40-(5"! 6($7'4*#84+*()+"+**#*(,'00#,&%'0
'9(%02#"&%03(%0)4&
"#$%$&+0,#(+0-(9##-.+,;
64748
":"!
"! =
": + "!
2.7.1.
Frequency
Dependence
of
the
Open‐Loop
Gain
 The
differenHal
open‐
loop
gain
of
an
op‐amp
is
not
infinite.
 It
is
finite
and
decreases
with
frequency.
 It
is
high
at
dc,
but
falls
off
quickly
starHng
from
10Hz.
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Figure
2.39:
Open‐loop
gain
of
a
typical
general‐purpose
internally
compensated
op
amp.
2.7.1.
Frequency
Dependence
of
the
Open‐Loop
Gain
 internal
compensa;on
–
is
the
presence
of
internal
passive
components
(caps)
which
cause
op‐amp
to
demonstrate
STC
low‐
pass
response.
 frequency
compensa;on
–
is
the
process
of
modifying
the
open‐
loop
gain.
 The
goal
is
to
increase
stability…
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Figure
2.39:
Open‐loop
gain
of
a
typical
general‐
purpose
internally
compensated
op
amp.
2.7.1:
Frequency
 The
gain
of
an
internally
compensated
op‐amp
may
be
Dependence
expressed
as
shown
below…
of
the
Open‐Loop
Gain
"4%',#)&%!)+,.4"5,!",!6'78'.&!95:'",;!!!!!!!!!!!0#1 =
2 + # 3 !!
"4%',#)&%!)+,.4"5,!",!)%&*+&,./!95:'",;!!!!!!0 $! 1 =
2 + $! 3 !!
"-!!
4%',#)&%!)+,.4"5,!)5%!<"=<!)%&*+&,."&#;!!!!!! !0 $! 1 "
$!3
14
4244
!! !"#!$%&'(!)%&*+&,./
"-!! !%
:'=,"4+9&!='",!)5%!<"=<!)%&*+&,."&#;!!!!!!!!! !0 $! 1 "
"
$!
!
+,"4/!='",!5..+%#!'4!!% ;!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!% = "-!!
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2.7.2.
Frequency
Response
of
Closed‐Loop
Amplifiers
(!"#
")1 9 )2
=
($% 2 + :2 + )1 9 )2 ;9 :{
';
!"#$
%!!"
&'($
 Q:
How
can
we
create
a
more
accurate
descripHon
of
closed
loop
gain
for
an
inverHng‐type
op‐amp?
 step
#1:
Define
closed‐loop
gain
of
an
inverHng
amplifier
with
finite
open‐loop
gain
(A)
 step
#2:
Insert
frequency‐
dependent
descripHon
of
A
from
last
slide
 step
#3:
Assume
A0
>>
1
+
R2/R1
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(!"#
")1 9 )2
")1 9 )2
=
=
($% 2 + 2 + )1 9 )2
# 2 + )1 9 )2 $
2+%
& :2 + * 9 !& ;
# '4 $
'
4
'144424443
(
%
&
2 + * 9 !4 (
!"#$%&3)/"%(-)-5#/#)-#+,/
'14
243
' )*+!,)-.!
/%(0#/)6'78
(!"#
=
($%
")1 9 )2
# 2 + )1 9 )2 $
* # 2 + )1 9 )2 $
2+ %
& + %
&
'
!
'
4
& '
4
'14243
( 14
4244
3(
!"#$%&3)+#"%'7#).(-5)4
6#7'=/#)'4 >>2+)1 9 )2
(!"#
=
($%
")1 9 )2
* (2 + )1 9 )2 )
2+
!#
/!%=-(!$
!"#$%&3)+#"%'7#).(-5<<<
2.7.2.
Frequency
Response
of
Closed‐Loop
Amplifiers
 Q:
How
can
we
create
a
more
accurate
descripHon
of
closed
loop
gain
for
an
both
inverHng
and
non‐
inverHng
type
op‐amps?
#$%&'(#$)*+,*-.,
$+$/#$%&'(#$)*+,*-.,
6444
474444
8
6444
474444
8
&!"#
"'! 0 '"
&!"#
" + '! 0 '"
=
**********
=
( (" + '! 0 '" )
( (" + '! 0 '" )
&$%
&$%
"+
"+
!#
!#
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2.7.2.
Frequency
Response
of
Closed‐Loop
Amplifiers
 3dB
frequency
–
is
the
frequency
at
which
the
amplifier
gain
is
axenuated
3dB
from
maximum
(aka.
dc
)
value.
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!!"#
!!
=
# + $" $ $#
2.8.
Large‐Signal
Opera;on
of
Op‐
Amps
 2.8.1.
Output
Voltage
Satura;on
 If
supply
is
+/‐
15V,
then
vOut
will
saturate
around
+/‐
13V.
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 2.8.2.
Output
Current
Limits
 iOut
current
of
op‐amp,
including
that
which
facilitates
feedback,
cannot
exceed
X.
 The
book
approximates
X
at
20mA.
2.8.3.
Slew
Rate
 slew
rate
–
is
maximum
rate
of
change
of
an
op‐
amp
(V/us)
 Q:
How
can
this
be
problemaHc?
 A:
If
slew
rate
is
less
than
rate
of
change
of
input.
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!"#$%&'(#%)*+,
64
4744
8
$%!"#
&' =
$# -'.
2.8.3.
Slew
Rate
 Q:
Why
does
slewing
occur?
 A:
In
short,
the
bandwidth
of
the
op‐
amp
is
limited
–
so
the
output
at
very
high
frequencies
is
axenuated…
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2.8.4.
Full‐Power
Bandwidth
 Op‐amp
slewing
will
cause
nonlinear
distorHon
of
sinusoidal
waveforms…
 sine
wave
 rate
of
change
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#!" = $!" !"# (!% )
&#!"
= ! $!" $%! (!% )
&%
2.8.4.
Full‐Power
Bandwidth
 full‐power
bandwidth
(fM)
–
the
maximum
frequency
at
which
amplitude
of
a
sinusoidal
input
and
output
are
equal
 maximum
output
voltage
(VOutMax)
–
is
equal
to
(A*vIn)
 note:
an
inverse
relaHonship
exists
between
fM
and
VOutMax
 note:
beyond
ωM,
output
may
be
defined
in
terms
of
ω
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!"#$%
&'#('#
,- )&*#"+$
/"0%1 = ).*!"
} 678
+, = !# -$%&#'(
+,
.# =
<" -$%&#'(
144244
3
2'**3(&4$!5/"0%46%#7
#7685)"*'$
9"00&#5/$
+!$"#$!
#7"05&0$
}
#! $
-$%& = -$%&#'( % # &
' !3(
144
42444
!$*"#6&0876(5/$#4$$0
"9#'"*5&'#('#5"0%5:";6:':5
Conclusion
 The
IC
op‐amp
is
a
versaHle
circuit
building
block.
It
is
easy
to
apply,
and
the
performance
of
op‐amp
circuits
closely
matches
theoreHcal
predicHons.
 The
op‐amp
terminals
are
the
inverHng
terminal
(1),
the
non‐inverHng
input
terminal
(2),
the
output
terminal
(3),
the
posiHve‐supply
terminal
(4)
to
be
connected
to
the
posiHve
power
supply
(VCC),
and
the
negaHve‐supply
terminal
(5)
to
be
connected
to
the
negaHve
supply
(‐
VEE).
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Conclusion
(2)
 The
ideal
op‐amp
responds
only
to
the
difference
input
signal,
that
is
(v2
‐
v1).
It
yields
an
output
between
terminals
3
and
ground
of
A(v2
‐
v1).
The
open‐loop
gain
(A)
is
assumed
to
be
infinite.
The
input
resistance
(Rin)
is
infinite.
The
output
resistance
(Rout)
is
assumed
to
be
zero.
 NegaHve
feedback
is
applied
to
an
op‐amp
by
connecHng
a
passive
component
between
its
output
terminal
and
its
inverHng
(aka.
negaHve)
input
terminal.
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Conclusion
(3)
 NegaHve
feedback
causes
the
voltage
between
the
two
input
terminals
to
become
very
small,
and
ideally
zero.
Correspondingly,
a
virtual
short
is
said
to
exist
between
the
two
input
terminals.
If
the
posiHve
input
terminal
is
connected
to
ground,
a
virtual
ground
appears
on
the
negaHve
terminal.
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Conclusion
(4)
 The
two
most
important
assumpHons
in
the
analysis
of
op‐amp
circuits,
assuming
negaHve
feedback
exists,
are:
 the
two
input
terminals
of
the
op‐amp
are
at
the
same
voltage
potenHal.
 zero
current
flows
into
the
op‐amp
input
terminals.
 With
negaHve
feedback
applied
and
the
loop
closed,
the
gain
is
almost
enHrely
determined
by
external
components:
Vo/Vi
=
‐R2/R1
or
1+R2/R1.
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Conclusion
(5)
 The
non‐inverHng
closed‐loop
configuraHon
features
a
very
high
input
resistance.
A
special
case
is
the
unity‐
gain
follower,
frequently
employed
as
a
buffer
amplifier
to
connect
a
high‐
resistance
source
to
a
low‐resistance
load.
 The
difference
amplifier
of
Figure
2.16
is
designed
with
R4/R3
=
R2/R1,
resulHng
in
vo
=
(R2/R1)(vI2
‐
vI1).
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Figure
2.16
Conclusion
(6)
 The
instrumentaHon
amplifier
of
Figure
2.20(b)
is
a
very
popular
circuit.
It
provides
vo
=
(1+R2/R1)(R4/R3)(vI2
‐
vI1).
It
is
usually
designed
with
R3
=
R4
and
R1
and
R2
selected
to
provide
the
required
gain.
If
an
adjustable
gain
is
needed,
part
of
R1
can
be
made
variable.
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Figure
2.20(b)
Conclusion
(7)
 The
inverHng
Miller
Amplifier
of
Figure
2.24
is
a
popular
circuit,
frequently
employed
in
analog
signal‐processing
funcHons
such
as
filters
(Chapter
16)
and
oscillators
(Chapter
17).
 The
input
offset
voltage
(VOS)
is
the
magnitude
of
dc
voltage
that
when
applied
between
the
op‐amp
input
terminals,
with
appropriate
polarity,
reduces
the
dc
offset
at
the
output.
Oxford
University
Publishing
Microelectronic
Circuits
by
Adel
S.
Sedra
and
Kenneth
C.
Smith
(0195323033)
Figure
2.24