SOFTWARE AND HARDWARE USED IN RTS
Use all the facilities provided by modern computer hardware and software
technologies. All progressive methods of computer engineering are in the use
while designing RTS.
SOFTWARE LIFE CYCLE AND STANDARDS
Usually life cycle of the software product has such steps as specification,
design, implementation, testing and maintenance. According to MIL-STD2167A
standard
(www2.umassd.edu/SWPI/DOD/MIL-STD-
2167A/DOD2167A.html) the software development process shall include the
following major activities, which may overlap and may applied iteratively or
recursively:

System Requirements Analysis/Design

Software Requirements Analysis

Preliminary Design

Detailed Design

Coding and CSU (Computer Software Unit) Testing

CSC (Computer Software Component) Integration and Testing

CSCI (Computer Software Configuration Item) Testing

System Integration and Testing.
Computer Software Component (CSC) is a distinct part of a computer software
configuration item (CSCI). CSCs may be further decomposed into other CSCs
and Computer Software Units (CSUs).
SOFTWARE LIFE CYCLE AND STANDARDS (CONT 1)
In November, 1994 this standard was replaced by MIL-STD-498. Also ISO
(International Standards Organization) Standard 9000 has ISO 9000-3 standard
for software development.
Waterfall models [Laplante, p. 88] also assume sequence of the following steps
in software design:
 Concept phase – define project goals and feasibility study -> white paper
 Requirements phase – decide what the product must do -> requirements
document (functional requirements and nonfunctional requirements, for
example, programming language, programming style – no goto’s etc.)
Document must be complete, correct (correspond to common laws),
consistent, each requirement must be testable.
 Design phase – show how the project will meet the requirements ->
design document (partition software into modules, develop test cases,
prepare detailed document). Modules are to hide implementation of each
design decision from the rest of the system. Must be fully defined their
interfaces.
 Programming phase – build the system -> program code (each
programmer must implement its own part – module(s) – clearly knowing
interfaces and goals of this part; it is useful to have versions control).
Parts must be developed, debugged, pass tests and integrated into the
whole system.
 Test phase – check if the system meets the requirements -> test reports
 Maintenance phase – maintain system -> maintenance reports (product
deployment, customer support, program errors correction).
SOFTWARE LIFE CYCLE AND STANDARDS (CONT 2)
Usually these phases are to be fulfilled in multiple iterations. Each next
phase may find out inconsistencies in previous phases leading to inability of
implementation of the next phase. Another approach therefore is to use
spiral model, in which at first is made rough prototype, it is analyzed,
accepted and then is made next approximation and so on.
RTS SPECIFICATION AND DESIGN TECHNIQUE
Specification is performed by customer and tells what product must do and
under what restrictions; design tells how these goals can be achieved.
SPECIFICATION TECHNIQUES
1. Natural languages – they are good understandable for humans, but rather
fuzzy and can’t clearly express goals. They can’t result in runnable codes.
For example, task ‘dining philosophers’ may be described as follows:
There are k philosophers in the room, interleaving philosophical
thinking with taking a food. For each philosopher is fixed its plate; to eat
philosopher needs in two forks, moreover he can use only forks, adjacent to his
plate. It’s required to synchronize philosophers so that each of them could get
for finite time access to his plate. It is assumed that duration of eating and
thinking of the philosopher are finite, but are not known beforehand.
SPECIFICATION TECHNIQUES (CONT 1)
2. Mathematical specification is precise and unambiguous. It promotes
usage of methods for code generation, optimization and verification. But
these methods may be hard for software engineers understanding.
There are k parallel processes-philosophers Pi, i=0,..,k-1, there are k
Boolean variables (forks) fi, i=0,..,k-1. Each process may be in one of the
states T(thinking),E(eating),W(waiting). Initial state for each process is T
and initial values of fi is TRUE, i=1,..,k-1. Process stays in state T during
some time tt which may be determined as a random value. After this time tt
expiration Pi analyses presence of necessary forks: fi and f(i+1)modk ==TRUE.
If YES, then it takes forks: fi=FALSE, f(i+1)modk =FALSE, and transits to state
E, in which he spends also some random time te. After te time expiration he
returns forks: fi=TRUE, f(i+1)modk =TRUE and transits to state T. In the case
of NO, process Pi transits to state W, in which he repeatedly checks presence
of forks: fi and f(i+1)modk ==TRUE until they become available. In such a case
he takes forks: fi=FALSE, f(i+1)modk =FALSE, and transits to state E.
3. Flowcharts – oldest modeling tool for software systems and good
understandable. Not suitable for large projects (more than 10000
instructions) with parallel processes
4. Structure charts – calling trees – represent decomposition of the system
on modules and show what modules are called by the module of higher
level. Modules of the lower level are assumed to be called sequentially
from left to right. Moving from top to bottom we get more details. Don’t
provide conditional branching.
SPECIFICATION TECHNIQUES (CONT 2)
5. Jackson charts
(http://www.smartdraw.com/resources/centers/software/jsd.htm, Michael
Jackson, not the singer, http: // dspace. dial. pipex. com/ jacksonma/) use Entity
Structure Diagrams (ESD) and Network Diagrams (ND) to model a system.
Entity Structure Diagrams (ESDs) illustrate the time-ordered actions entities
perform within the system.
An entity is an object that acts and is acted on by the system. The root of the
ESD parent-child tree is a single entity (the only one on the diagram).
Actions are carried out by entities and actions affect other entities. They are
linked to the root entity and each other in a parent-child hierarchy.
SPECIFICATION TECHNIQUES (CONT 3)
Sequence construct illustrates actions that are executed in order from left to
right.
Constructs – Selection (a choice between two or more mutually exclusive
actions) is represented by a small "o" (for option) on the upper right hand
corner.
If an action is repeated, place a small asterisk (*) in its upper right
hand corner. There is usually only one action under an iteration construct.
In an If-Else statement, a null component can illustrate a "do
nothing" alternative.
SPECIFICATION TECHNIQUES (CONT 4)
Network Diagrams (NDs) show interaction between processes. They are
sometimes referred to as System Specification Diagrams (SSDs).
Processes represent system functions. A model process represents primary
system functions. It is usually connected to an outside entity via a datastream.
Datastreams connect processes and specify what information is passed between
them.
SPECIFICATION TECHNIQUES (CONT 5)
State vectors are an alternative way of connecting processes. They specify the
characteristic or state of the entity being changed by a process.
For example, we can describe dining philosophers as
follows
Philosopher
Philosopher's life
Think
Wait
Eat or Wait
O
Eat
Wait for
forks
O
Eat
Take
forks
Take
forks
*
Eat for
some time
Return
forks
Eat for
some time
Return
forks
SPECIFICATION TECHNIQUES (CONT 6)
Philosop
her-1
f1,f4
f3,f4
Philosop
her-4
Philosop
her-2
f1,f2
f2,f3
Philosop
her-3
6. Pseudocode and programming design languages (PDL)
These are very abstract high-order languages. For PDL usually there exist
compilers to some usual programming language. Usually as pseudocode are
used constructions similar to present in C, Pascal and so on. Programming
language Ada, Modula-2 was used as PDL. PDL is just a kind of a
programming language in which user must be fluent. Cost for developing
and maintenance of tools for PDL are significant enough.
SPECIFICATION TECHNIQUES (CONT 7)
‘Dining philosophers’:
k – number of processes
fi=1, i=,..,k-1
Pi(i=0,..,k-1){
State from {T,E,W};
State=T;
While(1){
Case state{
T: generate integer random tt>0; while(tt>0)tt--;
If (fi and f(i+1)modk) { fi= f(i+1)modk =0;state =E;}
Else state = W;
E: generate integer random te>0; while(te>0)te--;
fi= f(i+1)modk =1;state =T;
W: If (fi and f(i+1)modk) { fi= f(i+1)modk =0;state =E;}
}//end case
}//end while
}//end Pi
par i=0,..,k-1//launch processes in parallel
Pi;
SPECIFICATION TECHNIQUES (CONT 8)
7. Finite state automata (FSA)
There are three methods for FSA representation: set theoretic, diagrams,
matrix. Automaton is a tuple (X,Y,S,S0,TF:X*S->S,OF:X*S->Y), where X
and Y are sets of input and output signals, S is a set of automaton’s states,
TF and OF are transition and output functions determining next state and
output depending on current state and input signal. Two kinds of automata
are distinguished: Moore FSA and Mealy FSA, which are mathematically
equivalent. In Moore FSA output is defined just by the state, in Mealy FSA
output depends both on the state and input signal.
0
1
0
Odd
Eve
n
1
`
Above is shown graph diagram for Moore FSA used as parity checker. Final
state is marked by double line; initial state is marked by arrow. Edges are
marked with signals initiating transitions from state to state. It is assumed
that each discrete moment of the time next signal comes; absence of signal is
treated as null signal.
SPECIFICATION TECHNIQUES (CONT 9)
0/even
1/odd
0/odd
Odd
Even
1/even
`
The same checker represented as Mealy FSA
8. Dataflow diagrams
(http://www.smartdraw.com/resources/centers/software/dfd.htm).
Data flow diagrams illustrate how data is processed by a system in terms of
inputs and outputs.
A process transforms incoming data flow into outgoing data flow.
Datastores are repositories of data in the system. They are sometimes also
referred to as files.
Dataflows are pipelines through which packets of information flow. Label the
arrows with the name of the data that moves through it.
External entities are objects outside the system, with which the system
communicates. External entities are sources and destinations of the system's
inputs and outputs.
A single process node on a high level diagram can be expanded to show a more
detailed data flow diagram. Draw the context diagram first, followed by various
layers of data flow diagrams.
SPECIFICATION TECHNIQUES (CONT 10)
A context diagram is a top level (also known as Level 0) data flow diagram. It
only contains one process node (process 0) that generalizes the function of the
entire system in relationship to external entities.
The first level DFD shows the main processes within the system. Each of these
processes can be broken into further processes until you reach pseudocode.
SPECIFICATION TECHNIQUES (CONT 11)
SPECIFICATION TECHNIQUES (CONT 12)
9. Petri nets
Petri nets are well suited for representation of parallel processes. They are
graphs having nodes of two types: places (P) and transitions (T). Only nodes
of different type may be connected by edges (i.e. only transitions with places
and vice versa). At initial time Petri net is labeled with marks associated
with places. Each place may have several units of mark (several resources).
For each transition there may be defined input places (their outputs are the
inputs for transition node) and output places (to which go outputs of
transition node). Transition node fires when each its input place has at least
one mark. Firing is indivisible action leading to decrementing (by 1) of
marks in each input place and incrementing (by 1) of marks in each output
place. If two transitions without common input places can fire they fire
independently and in parallel. If several transitions can fire and they have
common input place with only one mark, then only one of these transitions
can fire, and it is not determined what namely transition of them will fire.
Transitions can be considered as processes waiting for readiness of
necessary inputs; when all inputs are ready, process is performed, and supply
results to output places. In Petri nets execution times of processes are not
considered. Let’s consider representation of 4 dining philosophers in Petri
nets
SPECIFICATION TECHNIQUES (CONT 13)
*
*
T1
*
e1
*
T2
T3
T4
*
f1
*
F2
e2
*
F4
*
F3
e3
E4