Misc
3-Apr-15—9:31 AM
EEL
3003
EEL 3003: Elements of EE (Digital Logic & Comp Sys)
Menu
• 7-Segment LED
• MSI Components
Look into my ...
>MUX
>Adders
• Memory Devices
>D-FF, RAM, ROM
• Computer/Microprocessor
>GCPU
University of Florida, EEL 3003– File 04
© Dr. Eric M. Schwartz
EEL
3003
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EEL 3003: Elements of EE (Digital Logic & Comp Sys)
7-Segment LED
a
b
c
•
•
•
•
•
•
•
h
GND
abc defg
A = 111 1101
b
c
a
d
g
e
f
h
• Show 7-segment LED in
LogicWorks, “7-Segment
Display *”
• See also the LogicWorks
4-output device called
“Hex Keyboard”
• See also the LogicWorks
4-input device called
“Hex Display”
abc defg
F = ___
011 ____
1001
University of Florida, EEL 3003– File 04
© Dr. Eric M. Schwartz
University of Florida, EEL 3003 – File 04
© Dr. Eric M. Schwartz
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Misc
3-Apr-15—9:31 AM
EEL
3003
EEL 3003: Elements of EE (Digital Logic & Comp Sys)
Multiplexer (MUX)
• MUX: Multiplexer/Data Selector
X0(H)
X1(H)
X2(H)
X3(H)
I0
I1 4-input
I2 MUX
I3 S S
1
Z(H)
Z = X(S1,S0)2
Thus, if S1S0 = 102 , then Z = X2
0
S1(H) S0(H)
X0
X1
X2
X3
Z
S1 S0
University of Florida, EEL 3003– File 04
© Dr. Eric M. Schwartz
EEL
3003
A MUX switches
a choice of any
single input to a
single output
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EEL 3003: Elements of EE (Digital Logic & Comp Sys)
Multiplexer (MUX) Equation
I0
I1 4-input
Z
I2 MUX
I3 S S
1
0
• We call this a 4-input MUX
(even though there are 6 inputs).
• Since 6 inputs, would be 26 = 64
rows in a truth table
• Use wild cards (- or *) for inputs
that can take on both values
• Z = /S1 /S0 I0 + /S1 S0 I1 +
S1 /S0 I2 + S1 S0 I3
University of Florida, EEL 3003– File 04
© Dr. Eric M. Schwartz
University of Florida, EEL 3003 – File 04
© Dr. Eric M. Schwartz
S1
0
0
0
0
1
1
1
1
S0 I3 I2 I1 I0 Z
0 - - - 0 0
0 - - - 1 1
1 - - 0 - 0
1 - - 1 - 1
0 - 0 - - 0
0 - 1 - - 1
1 0 - - - 0
1 1 - - - 1
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Misc
3-Apr-15—9:31 AM
EEL
3003
EEL 3003: Elements of EE (Digital Logic & Comp Sys)
Binary Adder
• Suppose we want to add two 2-bit numbers
Carry
1
0 1 1
+0 1 0
1 0 1
Sum = /X Y + X /Y = XY
Carry = X Y
University of Florida, EEL 3003– File 04
© Dr. Eric M. Schwartz
EEL
3003
5
EEL 3003: Elements of EE (Digital Logic & Comp Sys)
Notation for Binary Addition
• For the circuit with no carry in, we implement as follows:
si = xi  y i
ci+1 = xi yi
xi
yi
si
ci+1
This circuit
is called
a Half-Adder
Notation: A 4-bit number is represented by b3b2b1b0.
Thus, we get bits b0~bN-1 where N = # of bits.
• If we add two 4-bit numbers, must we add 3 #’s, not 2 #’s
c4
c3
x3
y3
s3
c2
x2
y2
s2
c1
x1
y1
s1
University of Florida, EEL 3003– File 04
© Dr. Eric M. Schwartz
University of Florida, EEL 3003 – File 04
© Dr. Eric M. Schwartz
c0 = 0
x0
y0
s0
ci = carry bit
xi = 1st number
yi = 2nd number
si = sum
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Misc
3-Apr-15—9:31 AM
EEL
3003
EEL 3003: Elements of EE (Digital Logic & Comp Sys)
Adder with Carry Input
Let us include a carry input (cin)
in the design:
Sum = /x*/y* cin +
/x* y*/cin +
x*/y*/cin +
x* y* cin
With a little bit of algebra, we can
derive:
Sum = xycin
University of Florida, EEL 3003– File 04
© Dr. Eric M. Schwartz
EEL
3003
7
EEL 3003: Elements of EE (Digital Logic & Comp Sys)
Carry Out of Full Adder
XOR of all inputs
Sum of all possible pairs
Sum=xycin
cout = x y + x cin + y cin
Q: Is the order
important?
Q: Why?
x
y
Sum
cin
x
y
x
This circuit
is called
a Full-Adder
cout
cin
y
cin
University of Florida, EEL 3003– File 04
© Dr. Eric M. Schwartz
Sum = si
cin = ci & cout = ci+1
University of Florida, EEL 3003 – File 04
© Dr. Eric M. Schwartz
xi
yi
ci
s
FA
co
si
ci+1
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Misc
3-Apr-15—9:31 AM
EEL
3003
EEL 3003: Elements of EE (Digital Logic & Comp Sys)
Ripple-Carry Adders
• Thus, to add two 4-bit numbers we need 4 FullAdders as follows:
Y3 X3 C3
Y2 X2 C2
Y1 X1 C1
FA3
FA2
FA1
C4
S3
C3
S2
C2
Y0 X0 C0=0
FA0 (C0=0)
OR
HA (no C0)
S1
C1
S0
• Actually, we could replace FA0 with a half-adder
• 74’283 is a 4-bit look-ahead carry adder
University of Florida, EEL 3003– File 04
© Dr. Eric M. Schwartz
EEL
3003
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EEL 3003: Elements of EE (Digital Logic & Comp Sys)
ALU (74’181)
• ALU: Arithmetic Logic Unit
Lam Fig 6.1
University of Florida, EEL 3003– File 04
© Dr. Eric M. Schwartz
University of Florida, EEL 3003 – File 04
© Dr. Eric M. Schwartz
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Misc
3-Apr-15—9:31 AM
EEL
3003
EEL 3003: Elements of EE (Digital Logic & Comp Sys)
Memory Devices
• D-FF: Delay, Data Flip-Flop
10
• RAM: Random Access Memory
8
A9 ~ A0
D7 ~ D0
RAM
• ROM: Read Only Memory
13
Q
/Q
D
> Rising edge-triggered shown to right
> Falling-edge
Q
D
triggered here
/Q
CS/CE
WE
A12-0
ROM
CS/CE D7-0
8
University of Florida, EEL 3003– File 04
© Dr. Eric M. Schwartz
EEL
3003
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EEL 3003: Elements of EE (Digital Logic & Comp Sys)
Computer Functional
Block Diagram
I/O
ALU
CONTROL
MEMORY
DATA
CONTROL
CPU
University of Florida, EEL 3003– File 04
© Dr. Eric M. Schwartz
University of Florida, EEL 3003 – File 04
© Dr. Eric M. Schwartz
ADDRESS bus not shown
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Misc
3-Apr-15—9:31 AM
EEL
3003
EEL 3003: Elements of EE (Digital Logic & Comp Sys)
GCPU Block Diagram
• Show it!
University of Florida, EEL 3003– File 04
© Dr. Eric M. Schwartz
EEL
3003
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EEL 3003: Elements of EE (Digital Logic & Comp Sys)
GCPU
• Show it!
University of Florida, EEL 3003– File 04
© Dr. Eric M. Schwartz
University of Florida, EEL 3003 – File 04
© Dr. Eric M. Schwartz
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Misc
3-Apr-15—9:31 AM
EEL
3003
EEL 3003: Elements of EE (Digital Logic & Comp Sys)
The End!
University of Florida, EEL 3003– File 04
© Dr. Eric M. Schwartz
University of Florida, EEL 3003 – File 04
© Dr. Eric M. Schwartz
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