ISSN 2319-8885
Vol.03,Issue.10
May-2014,
Pages:1912-1916 www.semargroup.org, www.ijsetr.com
M
YO
S
U
S
U
T
HEINT
1
, Z
AW
M
YO
T
UN
2
1
Dept of Electronic Department, Mandalay Technological University, Mandalay, Myanmar, Email: myonyein87@gmail.com.
2
Dept of Electronic Department, Mandalay Technological University, Mandalay, Myanmar, Email: zawmyotun.mtu@gmail.com.
Abstract: This research work describes design, development and application of a digital trainer circuit prototyping system, for student in their digital electronic course. The primary objective is to design an inexpensive, simple to use device that could be retained by students, so that they could undertake digital experimentations. This research paper is one part of the Digital Trainer
Board which contains power supply section, logic gate section, function generator section and encoder/decoder section. It mainly concerns with logic gate section. Logic gate section is aimed to perform basic Boolean functions, such as AND, OR,
NOT, NOR, NAND and so on. All logic gate circuits are firstly simulated in Multisim simulation environment and then constructed. After construction, several tests have been performed and satisfactory results are obtained.
Keywords: Digital Logic Trainer, AND Gate, NAND Gate, NOR Gate, OR Gate, NOT Gate.
I. INTRODUCTION
Digital electronics is now used in all fields of electronics from computers to digital phones and most industrial machines and motor vehicles. When prototyping digital electronic circuits, specific digital input signals are required
II. HARDWARE DESIGN
The logic gate section contains AND gate subsection,
NAND gate subsection, OR gate subsection, NOR gate subsection and NOT gate subsection.
A. AND Gate Section to design the digital circuit. To accomplish this task, a teaching device known as a “Digital Trainer” is utilized. The purpose of this research work is to provide a method for students to test digital circuits, with a simple and inexpensive digital trainer. Digital trainer kit is a self contained set of
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5 volts
7408 Quad
AND
Gate
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12
11 NOR
Gate
Section
OR
Gate
Section
NAND
Gate
Section
AND
Gate
Section
NOT
Gate
Section
5
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10
9
8
Test Bench Bread Board
Input
Switches
1-32
Display LED
1-32
Fig. 1. Overall Block Diagram Digital logic Trainer. electronic circuits that can be interlinked by students to create working circuits. Component parts cannot be removed or lost in the classroom and interlinking is performed by short coloured cables fitted with small insulated alligator clips.
Rapid changes in the field of engineering technology have increased the need for universities to provide engineering and engineering technological students with meaningful and relevant practical experiences. To partial fulfill this need, study and implementation of digital logic trainer board has been done. The digital logic section contains NOT gate, AND gate, OR gate, NAND gate and NOR gate with control switches and LEDs. The overall block diagram of the system is shown in figure 1.
Fig.2. AND Gate Test Circuit.
AND gate subsection has been implemented with 74HC08
AND gate IC. This IC contains four AND gates. First of all, the AND gate test circuit is constructed. This circuit is very simple and shown in figure2 eight switches are used to give inputs for four AND gates and four LEDs are used to check the outputs.
B. NAND Gate Section
NAND gate subsection has been implemented with
74HC00 NAND gate IC. This IC contains four NAND gates.
NAND gate test circuit is constructed as shown in figure 3.
Eight switches are used to give inputs for four NAND gates and four LEDs are used to check the outputs.
Copyright @ 2014 SEMAR GROUPS TECHNICAL SOCIETY. All rights reserved.

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7400 Quad
NAND
Gate
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8
5 volts
MYO SU SU THEINT, ZAW MYO TUN
E.NOT Gate Section
NOT gate subsection has been implemented with 74HC02
NOT gate IC. This IC contains six NOT gates. NOT gate test circuit is constructed as shown in figure 6. Six switches are used to give inputs for six NOR are gates and six LEDs used to check the outputs.
5 volts
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5
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7404
NOT
Gate
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Fig.3. NAND Gate Test Circuit.
C. OR Gate Section
OR gate subsection has been implemented with 74HC32
OR gate IC. This IC contains four OR gates. OR gate test circuit is constructed as shown in figure 4. Eight switches are used to give inputs for four OR gates and four LEDs are used to check the outputs.
5 volts
Fig.6.NOT Gate Circuit Test.
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7432 Quad
OR
Gate
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IV.
SIMULATION
The simulation of logic gate section has been done with
Multisim Simulation Software. The logic gates used in the trainer are AND Gate, NAND Gate, OR gate, NOR gate and
NOT gate. The circuits for logic gates are simulated separately. Figure 7 shows the simulation window for AND gate logic circuit. Two switches are used as input signals for the gate and output is tested with Light Emitting Diode
(LED). The trainer uses 7408 Quad AND gate and the results assure the AND logic.
Fig .4. OR Gate Test Circuit.
D.NOR Gate Section
NOR gate subsection has been implemented with 74HC02
NOR gate IC. This IC neither contains four NOR gates. NOR gate test circuit is constructed as shown in figure 6. Eight switches are used to give inputs for four NOR are gates and four LEDs used to check the outputs.
5 volts
1
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4
5
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7
14
13
7402 Quad
NOR
Gate
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10
9
8
Fig .5. NOR Gate Circuit Test.
Fig.7. Simulation Window for AND Gate Logic Test
Circuit.
International Journal of Scientific Engineering and Technology Research
Volume.03, IssueNo.10, May-2014, Pages: 1912-1916

Development of Digital Logic Trainer for Student’s Experimentation
Figure 8 shows the simulation window for OR gate logic circuit. Two switches are used as input signals for the gate and output is tested with Light Emitting Diode (LED). The trainer uses 7432 Quad OR gate and the results assure the OR logic.
Fig .10. Simulation Window for NOR Gate Logic Test
Circuit.
Fig.8. Simulation Window for AND Gate Logic Test
Circuit.
Figure 9 shows the simulation window for NAND gate logic circuit. Two switches are used as input signals for the gate and output is tested with Light Emitting Diode (LED).
The trainer uses 7400 Quad NAND gate and the results assure the NAND logic.
Fig.11. Simulation Window for NOT Gate Logic Test
Circuit.
Figure 10 shows the simulation window for NOR gate logic circuit. Two switches are used as input signals for the gate and output is tested with Light Emitting Diode (LED).
The trainer uses 7402 Quad NOR gate and the results assure the NOR logic. Figure 11 shows the simulation window for
NOT gate logic circuit. One only switch is required as input signal for the gate and output is tested with Light Emitting
Diode (LED). The trainer uses 7404 NOT gate IC and it contains six NOT gates.
Fig.9. Simulation Window for NAND Gate Logic Test
Circuit.
V.
TEST AND RESULTS OF DEVELOPED TRAINER
BOARD
Test and results of AND gate implementation is shown in figure 12. The results satisfy that truth table for AND gate shown in table 1.
International Journal of Scientific Engineering and Technology Research
Volume.03, IssueNo.10, May-2014, Pages: 1912-1916

MYO SU SU THEINT, ZAW MYO TUN
(a) (b)
(a) (b)
(c) (d)
Fig.12. Results with AND gate with various inputs; (a) inputs (1,1), (b) inputs (1,0), (c)inputs (0,0), (d)inputs
(0,1).
TABLE.1. TRUTH TABLE FOR AND GATE (d) (b)
Fig.14. Results with NOR gate with various inputs; (a) inputs (1,1), (b) inputs (1,0), (c)inputs (0,0), (d)inputs
(0,1).
.
Test and results of OR gate implementation is shown in figure 13. The results satisfy that truth table for OR gate shown in table 2.
(a) (b)
(a) (b)
(1,1).
(c) (d)
Fig.13. Results with OR gate with various inputs; (a) inputs (0,0), (b) inputs (0,1), (c)inputs (1,0), (d)inputs
(d) (c)
Fig.15. Results with NAND gate with various inputs; (a) inputs (0,1), (b) inputs (1,0), (c)inputs (0,0), (d)inputs
(1,1).
International Journal of Scientific Engineering and Technology Research
Volume.03, IssueNo.10, May-2014, Pages: 1912-1916

Development of Digital Logic Trainer for Student’s Experimentation
Test and results of NOR gate implementation is shown in figure 14. The results neither satisfy that truth table for NOR gate shown in table 3.
TABLE.2. TRUTH TABLE FOR OR GATE
TABLE.3. TRUTH TABLE FOR NOR GATE
Test and results of NAND gate implementation is shown in figure 15. The results satisfy that truth table for NAND ate shown in table 4.
TABLE.4 .TRUTH TABLE FOR NAND GATE
A B Output
0
0
1
1
1
0
1
1
1
0
Test and results of NOT gate implementation is shown in figure 16 and 17. The results satisfy that truth table for NOT gate shown in table 5.
0 1
(a) (b)
Fig .16 .Results with NOT gate with various inputs; (a) inputs (0), (b) inputs (1).
TABLE.5. TRUTH TABLE FOR NOR GATE
Fig.17. Complete Circuit Diagram of Digital Logic Gate
Section.
V .SUMMARY
The hardware design and software implementation of the digital logic trainer is described. The simulation results of logic gate section have been done in Multisim. Thirty-two switches labeled SW1 to SW32 are applied as an input in this system.
VI. CONCLUSION
The development of digital logic trainer for students’ experimentation is described. The components required in trainer board are chosen. The overall circuit for logic trainer is designed the complete system can be implemented to perform higher standard than any other commercial products.
An inexpensive and excellent digital trainer board is designed and implemented. Multisim software is used for simulation.
The results are convenient and simple for students to test.
VII.
REFERENCES
[1] Inderpreet Kaur (Asstt.Prof), Rayat and Bahra Institute of
Engineering and Bio-technology, Mohai, India,
Microcontroller Based Home Automation System with
Security”.
[2] Umm Al-Qura University,Computer Engineering
Department, “ Digital Design Lab Manual.
[3] [http://www.elenco.com/digital/analog trainer/XK 550.
[4] EcE-2022 Digital Electronics, Department of
Electronic Engineering Department of Technological and
Vocational Education, Ministry of Science and Technology,
Myanmar.
[5] www.ALLDATASHEET.com.
[6] 1972 EXAR Corporation, Datasheet June 1997
International Journal of Scientific Engineering and Technology Research
Volume.03, IssueNo.10, May-2014, Pages: 1912-1916