ECE 415/515 – Analog Integrated Circuit Design Spring 2009 SYLLABUS TIME & PLACE: MWF, 10:30-11:20 AM, JEB 025 INSTRUCTOR: Suat U. Ay Office: GJL 212 Phone: 885-2783 EMAIL: suatay@uidaho.edu OFFICE HOURS: MWF, 11:30-12:30 PM or by appointment, but feel free to stop by or email anytime. CLASS WEB SITE: http://www.ece.uidaho.edu/ee/analog/suatay/ece415sp09/ece415sp09.html PREREQS: ECE 410 or permission of the instructor. TEXTBOOK: Design of Analog CMOS Integrated Circuits, Razavi, McGraw-Hill, 2001, REFERENCES: CMOS Circuit Design, Layout, and Simulation, Baker, IEEE Press & Wiley, 2nd Ed., 2005. Analog Integrated Circuit Design, Johns & Martin, John Wiley & Sons, 1997. Analysis and Design of Analog Integrated Circuits, Gray, Hurst, Lewis, &Meyer, Wiley, 4th Ed., 2001 SOFTWARE: LTspice (required) L-Edit VLSI layout software (Student Version-available on the class web site) GOALS: 1. To demonstrate the ability to analyze and design the analog integrated circuits 2. To develop an understanding of the fundamental issues of CMOS analog microelectronic circuit design, 3. To gain knowledge of strengths and weaknesses of basic CMOS circuit building blocks, 4. To develop skills in CMOS operational amplifier, comparator, and voltage reference design. COURSE OUTLINE: (tentative) I. II. III. IV. V VI VII VIII IX. X VII VIII IX. X Topic Introduction Basic MOS Device Physics Short-Channel Effects and Device Models Single-Stage Amplifiers CMOS Processing Technology Layout and Packaging Differential Amplifiers Passive and Active Current Mirrors Frequency Response of Amplifiers Feedback Operational Amplifiers Stability and Frequency Compensation Comparators Bandgap References ECE415/515 – Analog Integrated Circuit Design 1/3 University of Idaho COURSE GRADING: Total points =1000 EXAMS (3) FINAL(1) HOMEWORKS(10+) PROJECT(3) Weight on final grade 50% 20% 15% 15% Total points 500 200 150 150 ECE 515 students will have additional/different homework problems and examination questions, as well as projects. ECE515 students also required to write their project reports in IEEE journal paper format. (http://www.ieee.org/web/publications/authors/transjnl/). An MS Word Template will be available at the class web site. At my discretion, I will use a sliding scale. If a sliding scale is used, all scores will be shifted to a higher value (never a lower value) such that the class average is shifted but the standard deviation remains the same. Thus, you may collect 800 points at the end of semester and still get A. The decision whether or not to adjust the grades will be made at the end of the semester. Grade scale that will be used for total points collected is given below. Total Points Max. Min 1,000 900 899 800 799 700 699 650 649 0 Grade A B C D F MAKE-UP POLICIES Only students presenting medical or official university excuses to the instructor will be allowed to take a make-up exam or quiz, or make up other missed assignments. Whenever possible, arrangements should be made with the instructor prior to the regularly scheduled exam or assignment due date. Making these arrangements is entirely the responsibility of the student. Make up exams and quizzes may differ from those given at the regularly scheduled time, and whether an absence is deemed to be excusable is at the discretion of the instructor. ACADEMIC HONESTY Academic honesty is governed by Article II of the University if Idaho’s Student Code of Conduct http://www.webs.uidaho.edu/fsh/2300.html . Cheating on classroom or outside assignments, including examinations is a violation of this code. Incidents of academic dishonesty will be kept on file by the instructor and may be reported to the dean of students. Such instances of academic dishonesty may warrant expulsion from the course and a failing grade. All students should be aware that even one incident of academic dishonesty may also merit expulsion from the University. POLICIES: All: Homework and exam scores become final one week after they are returned to the class. Late submissions of assignments and project reports are not encouraged; however, if you cannot finish in time and submit late before the solutions are available, a 30% per day compounding deduction will be applied on the final grade. (Ex.:100 points assignment submitted 3 days late will be graded on 34 points, 1 day on 70, 2 days 49, 4 days 24, etc.). Submission will not be accepted if the solutions are distributed by any means. Assignments have to be turned in during class session. I will not accept any assignment dropped in my office mailbox without getting my permission earlier. ECE415/515 – Analog Integrated Circuit Design 2/3 University of Idaho You may consult with others on assignments, provided you only submit your attempt at the work. Identical assignments will receive a grade of zero and be considered as academic dishonesty case. Assignment is considered one day late if it is not turned in at 11:30 PM on the day it is due. Off-campus students: This is not a self-paced class. You are expected to finish within 1-2 weeks of the on-campus students. You are encouraged to access class videos over the internet 1 day after the regular class session through EO video link, which is way before you receive the DVDs. Due dates for homework and projects will generally be specified 1-2 weeks after the due date for the on-campus students. It is recommended that homework be scanned to PDF and sent electronically, if the resulting file size is not too large and if this is a good option for the student (time efficient). Homework submitted in this mode will be an emailed back to the student after grading. This will result in a very fast turn-around time. Homework should be sent by regular mail if scanning to PDF and emailing is not a good option. Your assignment should be postmarked by the due date. Homework submission by FAX is not allowed. Returned homework may not reach you prior to your taking an exam. Please make copies of any assignments that you believe may be useful for study before you submit them. Phone calls or the use of EMAIL for asking questions is encouraged. You are welcome to call at anytime. Mail homework to: Mail exams to: Suat U. Ay Department of ECE University of Idaho PO Box 441023 Moscow, Idaho 83844-1023 UI Engineering Outreach Janssen Engineering Building University of Idaho PO Box 441014 Moscow, Idaho 83844-1014 Disability Support Services Reasonable accommodations are available for students who have documented temporary or permanent disabilities. All accommodations must be approved through Disability Support Services, located in the Idaho Commons Building, Room 306. Please contact Disability Support Services as soon as possible so that you may receive accommodations in a timely manner. Phone Email URL : (208) 885-6307 : dss@uidaho.edu : www.access.uidaho.edu Students should present a completed and signed Accommodation Checklist for the current semester, from our office when requesting accommodations. If they do not, please refer them to the Disability Support Services office (Idaho Commons, Room 306) to obtain one. If you have any questions regarding a student(s) with a disability(s), or how to best work with a particular student in class, please contact our office. ECE415/515 – Analog Integrated Circuit Design 3/3 University of Idaho