Why a System Driver

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System Integration and System

Driver Roadmaps in ITRS 2.0

Andrew B. Kahng

CSE and ECE Departments, UC San Diego abk@ucsd.edu

http://vlsicad.ucsd.edu/

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Outline

•   Introduction: System Integration Roadmapping in ITRS2.0

•   Smartphone Driver: IoT (People)

•   Microserver Driver: IoT (Cloud)

•   IoT Driver: IoT (Things)

•   Summary

[source]   h+p://www.1.com/ww/en/internet_of_things/pdf/14-­‐09-­‐17-­‐IoTforCap.pdf  

Kahng ConFab-2015, 150521

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ITRS1.0: IC-Centric Roadmap

ORTCs  

Fundamental  Models  

INTC  

PIDS  

FEP  

LITHO  

 

I d,sat,

 I sd,leak  

CV/I,f

T  

#cores,     max  IO  freq

 

Design  &  

System  Drivers  

#IOs,  max   power,  thermal,  

TSV/3D  roadmap

 

•   max  chip  power  

•   layout  density  

•   transistor  count  

•   chip  size  

•   #disLnct  cores  

•   #cores  

•   max  on-­‐chip  freq  

•   product/market   drivers  

Test   A&P  

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Market, Application Contexts

Source: Internet of Things (IoT): A Vision, Architectural

Elements, and Future Directions, Future Generation Computer

Systems 29 (2013), pp. 1645-1660.

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ITRS2.0: Applications, Markets, Systems

Source: Dr. P. Gargini, ITRS

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Outline

•   Introduction: System Integration Roadmapping in ITRS2.0

•   Smartphone Driver: IoT (People)

•   Microserver Driver: IoT (Cloud)

•   IoT Driver: IoT (Things)

•   Summary

[source]   h+p://www.1.com/ww/en/internet_of_things/pdf/14-­‐09-­‐17-­‐IoTforCap.pdf  

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Definition: Smartphone Driver

•  

Smartphone mobile SOC platforms are interfaces to humans (“people” in IoT infrastructure)

•  

Portable and wireless applications: smart mediaenabled telephones, tablets and digital cameras

•   Products IN this class: iPhones and iPad

•   Products NOT IN this class: Snapdragon 810 / Apple A6

(processors instead of platforms), iWatch

•  

Why a System Driver

•   Prominence of mobile, communication markets

•   Strict power budget with uncompromising performance

•   Drives heterogeneous integration of components and outside system connectivity

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Smartphone Driver Evolution

•   SOC-Consumer Portable (ITRS1.0 Driver) IC product evolves into ITRS 2.0 Smartphone Driver by adding additional components

Antenna

Switch

Receiver

Transceiver

NFC

BB/AP P

M

SOC-

CP

RF Tuner and

Demodulator

Audio   Bluetooth  

Mul1-­‐mode   modem  

Video   Wifi  

SOC-CP (ITRS 2013)

Bio Sensor

Gyrometer

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Evolution of Smartphone Metrics

•  

Metrics from SOC-CP (old)

•   #AP cores

•   #GPU cores remains

•   MPU frequency

•  

Several new metrics have been added for

•   Form factor scaling

•   Display size scaling

•   Memory size and bandwidth scaling

•   Data communication bandwidth scaling

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Summary of Metrics: Smartphone

•   #AP cores

•   Platform complexity and performance

•   #GPU cores

•   Complexity and graphic performance

•   Max frequency (GHz)

•   Performance and power consumption

•   #MPixels of display

•   Graphic performance and system bandwidth

•   Mem BW (Gb/s)

•   Memory performance and system bandwidth

•   #Sensors

•   Peripheral diversity

•   #Antennas

•   Complexity of RF subsystem

•   #ICs

•   System complexity and BOM cost

•   Cellular data rate (MB/s)

•   Design requirement for RF subsystem and modem performance

•   WiFi data rate (Mb/s)

•   Design requirement for WiFi subsystem and modem performance

•   Board area (cm 2 )

•   System form factor

•   Board power (mW)

•   System power

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Smartphone Block Diagram Evolution (2002)

BT BB x1

BT Transceiver x1

GSM

PA x1

RF Switch x1

SAW x3

Transceiver x1

VCO x1

TCXO x1

VGA Imaging Sensor x1

RF Connections Sensor

PMIC x1

DC-DC x2

Current Gauge x1

Analog Interface x1

BB Processor x1

Image Processor x1

LCD Driver x1

Display + Input devices

Power / Analog

AP / BB + Multimedia

4MB SDRAM x1

16MB NAND Flash x1

4MB NOR Flash x1

Memory

[Source: TechInsights]

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Smartphone Block Diagram Evolution (2013)

BT + WiFi + FM BB x1

Connections

PMIC x1

Audio Amplifier x1

Power IC x8

RF

Multimode

PA x4

PA controller x1

GPS LNA x1

GSM+CDMA+WCDMA+GPS Transceiver x1

Antenna Switch

App Processor x1

Sensor

5M Imaging Sensor x1

VGA Imaging Sensor x1

Accelerometer x1

Flashlight Driver x1

Proximity Sensor x1

LCD Driver x1

Touchscreen Controller x1

Display + Input devices

Power / Analog

AP / BB + Multimedia

Notes:

1.

  All multimedia features are on AP

2.

  Audio output circuits integrated into one IC

3.

  BT, WiFi, and FM (baseband) integrated into one IC

4.

  Touchscreen introduced

5.

  Memory scaling up

Memory

512MB DDR2 x1

4GB NAND Flash x1

Memory Controller x1

[Source: TechInsights]

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Smartphone Block Diagram Evolution (2015)

NFC

2x2 WLAN

BT4.1

Connections

Power Management

Platform

Power Management

Power / Analog

USB 3.0

Multimode

Low/Mid Band

PA/ Antenna

Switch Module

RxD Switch

High Band PA

Envelope Power Tracker

Diversity Antenna Tuner

RF

App Processor  

Modem

GPU

LP Core

HP Core location

DRAM controller

DSP

Sensor engine

Dual ISP

Display engine

Multimedia

AP / BB + Multimedia

Sensor

Front Imaging Sensor

Back Imaging Sensor

Positioning Imaging Sensors

Environment

Sensor Complex

Gestures

LCD Driver

Touchscreen Controller

Display + Input devices

NAND Flash

Memory http://www.anandtech.com/show/7925/qualcomms-snapdragon-808810-20nm-highend-64bit-socs-with-ltecategory-67-support-in-2015

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Smartphone Trends Beyond 2015

•   Market: computer vision, 2D-to-3D reconstruction

•   Multiple image sensors (e.g., Kindle Fire has four additional VGA sensors for 3D application)

•   Market: data mining of user behavior and HCI applications

•   Multiple sensors required to monitor environmental events

•   Aggressive power management with multiple sensors (e.g., Apple A7 use of co-processor as sensor hub)

•   Integration: MEMS integration (e.g., six-axes (gyro x accelerometer) in a package)

•   Block Diagram beyond 2015

•   Alt-1 (through 2019) has similar organization as smartphones in 2015 but integrates more sensors, sensor hub and antennas

•   Alt-2 (2020 and beyond) integrates several functions into the AP

•   System optimizations drive integrations and dis-integrations at SOC, SIP level [Sources]     h+p://www.techinsights.com/teardown.com/amazon-­‐fire-­‐phone/   h+p://www.invensense.com/mems/gyro/mpu6500.html

  h+p://en.wikipedia.org/wiki/Apple_M7  

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Smartphone Block Diagram Alt-1 (-2019)

BT + WiFi + FM BB

Connections

PMIC

Audio Amplifier

Power IC

RF

Multimode

PA

PA controller

GPS LNA

GSM+CDMA+WCDMA+GPS Transceiver

Antenna Switch

App Processor x1

Sensor

13M Imaging Sensor x1

2.1M Imaging Sensor x1

VGA Imaging Sensor x4

6 Axis Motion Sensor

Proximity Sensors

ALS

Temperature sensor

Sensor Hub

LCD Driver

Touchscreen Controller

AP / BB + Multimedia

Display + Input devices

Power / Analog

[Source]:

TechInsights

Amazon

Apple

Memory

DDR2

NAND Flash

Memory Controller

•   Similar organization as smartphones in 2014-2015

•   Integration of more sensors, antennas, sensor hub

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Smartphone Block Diagram Alt-2 (2020+)

Multimode

RF

Multimode RF for 2G, 3G

LTE mm-Wave

BT

Wireless

XX (= voLTE, LTE-A, etc.)

Sensor

Front Imaging Sensor

Back Imaging Sensor

Positioning Imaging Sensors

Environment

Sensor Complex

XX (= Biometric, health, etc.)

Connections

PMIC

Audio Amplifier

Power IC

App Processor ( stacked )  

Power / Analog

Core SDR

Baseband

LP cores

GPU

Core

AP / BB + Multimedia eDRAM LP cores

LCD Driver

Touchscreen Controller

Display + Input devices

Memory

NAND Flash

•   Multiple functions integrated into AP, e.g., heterogeneous memory, SDR BB

•   Integration of more sensors, antennas

•   SDR = Software-Defined Radio

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Roadmaps for #Cores, Max Freq

20  

15  

#AP  cores  

#AP cores = 1.0 * 1.14

(Year – 2007)

400  

300  

#GPU  cores  

#GPU cores = 2.0 * 1.26

(Year – 2007)

10   200  

5   100  

0  

2005   2010   2015   2020   2025   2030   2035  

0  

2005   2010   2015   2020   2025   2030   2035  

8.0   Max  freq  (GHz)  

6.0  

Max freq = 2.3 * 1.04

(Year – 2011)

4.0  

2.0  

0.0  

2005   2010   2015   2020   2025   2030   2035  

•   #AP cores : This is the metric to evaluate AP performance and design complexity. More AP cores can also allow higher functionality integration. There will not be more co-processors for new features if AP cores can provide enough performance. (But low power requirement may be exception. For example, Apple M7.)

•   #GPU cores : This reflects the graphics processing capacity for 3D, holographic. Heterogeneous computing and programmability increases #GPU cores and other accelerators to be integrated with the GPU cores. Beyond 2019, context-based computing will drive #cores for both AP and GPUs

•   Max freq : Linear growth of 4% per year due to power constraints. In 2029, the max power is ~12W, which will drive low-power design methodologies

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Roadmaps for Sensors, Antennas, #ICs

30  

#Sensors  

20  

#Antennas  

20  

10  

#Sensors = 7 + (Year – 2009) * 0.85

0  

2005   2010   2015   2020   2025   2030   2035  

10  

#Antennas = 7 + (Year – 2009) * 0.4

0  

2005   2010   2015   2020   2025   2030   2035  

15.0  

#ICs  

10.0  

5.0  

#ICs = 10 - (Year – 2009) * 0.15

0.0  

2005   2010   2015   2020   2025   2030   2035  

•   Sensors: Diverse sensors such as environment/ambience, accelerometers, health, vibration till 2019.These grow due to proliferation of IoT, context-based computing, pressure, gyro, acoustic, light, etc. However, beyond 2013 the number of sensors saturate due to the form factor limitations of a smartphone.

•   Antennas: Diverse antennas for WiF, BT, and cellular. The diversity is driven by WiFi standards (e.g., 802.11ac, ad, etc.) and cellular (e.g., LTE-Advanced, TD-LTE, VoLTE). IoT and context-based computing will push WiFi and cellular standards and their BW requirements. Beyond 2021, the number of antennas saturate but standard evolve and increase the bandwidth.

•   #ICs: There is an increase and then decrease due to integration and deintegration of functions (e.g., PEs, sensor hubs, antennas)

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Roadmaps for Display Pixels, Memory BW

40.0  

30.0  

20.0  

10.0  

#MPixels  

#MPixels = 0.7 * 1.27

(Year – 2013)

0.0  

2005   2010   2015   2020   2025   2030   2035  

600000.0  

500000.0  

400000.0  

300000.0  

Mem  BW  (Mb/s)  

After calibration with 2014 data point

Mem BW = 136000 * 1.09

(Year – 2014) ; Year > 2014

200000.0  

100000.0  

0.0  

2005   2010   2015   2020   2025   2030   2035  

•   #MPixels: Display pixels driven by high-definition standards (e.g., 720p, 1080p, 4K). #bits per pixel and refresh rates do not scale per year significantly (e.g., #bits per pixel limited to 64bits and refresh rate limited to 120Hz, 240Hz for 3D). Large display sizes drive up memory BW requirements. By 2029, super HD resolutions of 7680 x 4320 will increase memory BW requirements to 144Gb/s [ http:// en.wikipedia.org/wiki/Ultra_high_definition_television ]

•   Mem BW: This is defined as the BW between AP and off-chip DRAMs. This reflects the requirement for memory integration technologies. Higher mem BW is due to advanced WiFi, cellular standards, display frame rates and evolution of context-based computing and on-body sensors that’ll require user-specific information to be stored and retrieved when the user’s environment changes. In 2029, the memory BW is 525Gb/s to support super HD display frame rates. The energy consumption till 2019 is ~25pJ/bit and after that around 10pJ/bit with optical interconnects/on-chip plasmonics [ https://www.cs.ucsb.edu/~sherwood/pubs/JETCAS-12plasmon.pdf

], which is ~5.3W for 525Gb/s memory BW. This is larger than total smartphone max power (~4W). Therefore, aggressive memory power management techniques will be needed to reduce this power.

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Outline

•   Introduction: System Integration Roadmapping in ITRS2.0

•   Smartphone Driver: IoT (People)

•   Microserver Driver: IoT (Cloud)

•   IoT Driver: IoT (Things)

•   Summary

[source]   h+p://www.1.com/ww/en/internet_of_things/pdf/14-­‐09-­‐17-­‐IoTforCap.pdf  

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Definition: Microserver Driver

•  

Microserver (IoT cloud) platforms are compact servers with improved power efficiency compared to conventional servers

•   Products is IN this class: HP Moonshot, HP ProLiant servers

•   Products NOT IN this class: Intel Atom processor (not a platform)

•  

Why a System Driver

•   Demand for low-latency data processing

•   Demand to reduce CO

2

emission and cooling expenses by improving datacenter power efficiency

•   Realization of warehouse computer paradigm

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Microserver Driver Evolution

•   MPU-HP (high-performance MPU IC driver) is incorporated into the microserver (ultimately, server / datacenter) System Driver core1 core1 core1 core1 core2 core2 core3 core2 core2 core4 core3 core3

SRAM1

SRAM1 core3 core4 core4

SRAM1

SRAM1

SRAM2

SRAM2

SRAM3 core4

U n c o c o

U n re  

SRAM3

SRAM3

SRAM3

SRAM4

SRAM4

SRAM4 c o

U n re   c o

U n re  

4 × MPU-HP (ITRS 2013)

HP ProLiant Microserver with

16 cores

•   Metrics evolved from MPU-HP in ITRS 1.0

•   MPU frequency, logic/SRAM breakdown, #cores, …

•   New metrics added to account for network / backplane bandwidth, storage capacity, …

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Summary of Metrics: Microserver

•  

#MPU cores/rack unit

•   Density of cartridges

•  

Max Frequency (GHz)

•   Performance

•  

DRAM capacity (GB)/ rack unit

•   Local memory capacity

•  

DRAM BW (GB/s)

•   Intra-node system bandwidth

•  

Off-MPU BW (GB/s)

•   Inter-node system bandwidth

•  

MPU frequency × #Cores (GHz)/rack unit

•   Per-node performance

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Microserver Block Diagram (2012)

MPU-­‐0  

Memory  

Controller  

Cores  

PCIe  2.0  

×  8  

10.7GB/s  

DDR3  

2GB/s  

1GB/s  

Local  SATA  

Drives  

GbE  ×  2  

1GB/s  

Peripherals  

[source]   h+p://h20195.www2.hp.com/v2/GetDocument.aspx?docname=4AA5-­‐0893ENW&doctype=data%20sheet&doclang=EN_US&searchquery=&cc=us&lc=en   h+p://www.intel.com/content/dam/www/public/us/en/documents/datasheets/atom-­‐processor-­‐s1200-­‐datasheet-­‐vol-­‐1.pdf

  h+p://en.wikipedia.org/wiki/List_of_device_bit_rates  

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Microserver Block Diagram (2012)

MPU-­‐0  

10.7GB/s  

Microserver revolution – since 2012

Memory  

Controller  

DDR3  

Compared to conventional server:

1.

2.

Few (

Cores  

Significant reduction of MPU performance (2.0GHz) and system-level bandwidth

(PCIe

×

4) MPU per server cartridge

8)

3.

  PCIe hub is integrated into MPU

4.

  No auxiliary chipset

-- BOM cost and integration effort are reduced

5.

  Inexpensive components

-- SAS à SATA

-- Buffered DDR3 à Unbuffered DDR3

1GB/s  

1GB/s  

GbE  ×  2  

Peripherals  

[source]   h+p://h20195.www2.hp.com/v2/GetDocument.aspx?docname=4AA5-­‐0893ENW&doctype=data%20sheet&doclang=EN_US&searchquery=&cc=us&lc=en   h+p://www.intel.com/content/dam/www/public/us/en/documents/datasheets/atom-­‐processor-­‐s1200-­‐datasheet-­‐vol-­‐1.pdf

  h+p://en.wikipedia.org/wiki/List_of_device_bit_rates  

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Microserver Block Diagram (2015)

MPU-­‐0  

Cores   Cores   Cores  

Memory  

Controller  

Low  power   cores  

Low  power   cores  

Low  power   cores  

Accelerator Accelerator

Electrical    

Interconnects                    

(PCIe  3.x)   eDRAM  

Op1cal  

Interface  

DRAM  

Op1cal  

Networks  

•   Introduction of optical interconnects, mainstream heterogeneous cores

Local  Drives  

Peripherals  

“22-nm Next-Generation IBM System z Microprocessor”, ISSCC 2015 (proof point for eDRAM and memory controller integration in cores)

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Microserver Trends Beyond 2015

•   Computational power density challenges may imply SOC/ASIClike trajectories

•   More light cores

•   More peripherals

•   More application-specific accelerators

•   More complicated inter-IP communication fabrics

•   Higher integrated network bandwidth to address system throughput requirements under strict form-factor and power constraints

•   Block Diagram beyond 2015

•   Alt-1 (through 2019) has similar organization as microservers in

2014/2015 with architectural improvements in MPUs and peripherals

•   Alt-2 (2020 and beyond) integrates optical interconnects and heterogeneous cores

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Microserver Block Diagram Alt-1 (-2019)

MPU-­‐0  

Cores   Cores   Cores  

Memory  

Controller  

Cores   Cores   Cores  

Accelerator Accelerator

Local  SATA  (or  

XX)  Drives  

DDRXX  

PCIe  XX  Hubs  

Op1cal  

Interface  

Op1cal  

Networks  

•   Similar organization as microservers in

2014/2015

•   Architectural improvements in components, e.g., PCIe, DRAM, cores, etc.

•   Timeline is beyond 2015, but up to 2019

Peripherals  

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Microserver Block Diagram Alt-2 (2020+)

MPU-­‐0  

Cores   Cores   Cores  

Memory  

Controller  

Low  power   cores  

Low  power   cores  

Low  power   cores   eDRAM  

Accelerator Accelerator

Hub  for  op1cal  

Electrical    

Interconnects  

Fiber  Interface  

DRAM  +  

Op1cal   storage  

Op1cal  

Networks  

•   Introduction of on-chip optical interconnects, mainstream heterogeneous cores

•   Timeline is from 2020 and beyond

Local  Drives  

Peripherals  

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Roadmaps for #Cores, Max Frequency

180  

160  

140  

120  

100  

80  

60  

#MPU  cores  /  rack  unit  

#MPU cores/rack unit

= 16 * 1.19

(Year – 2013) ; Year ≤ 2019

= 45 * 1.12

(Year – 2019) ; Year > 2019

40  

20  

0  

2009   2011   2013   2015   2017   2019   2021   2023   2025   2027   2029  

7  

Max  frequency  (GHz)  

6   Max freq = 3.46 * 1.04

(Year – 2013)

5  

4  

3  

Follows MPU-HP/

CP trajectory

2  

1  

Performance challenge, might need better processor / memory architecture

0  

2009   2011   2013   2015   2017   2019   2021   2023   2025   2027   2029  

MPU  frequency  x  #Core  (GHz)  /  rack  unit  

1200  

1000  

800  

600  

#MPU cores/rack unit

= 55 * 1.24

= 45 * 1.16

(Year – 2013)

(Year – 2019)

; Year ≤ 2019

; Year > 2019

400  

200  

0  

2009   2011   2013   2015   2017   2019   2021   2023   2025   2027   2029  

•   These metrics are driven by the max power delivery to a rack. Most of the jobs on microservers are batch-processed, which drives the number of low-power cores grow in the roadmap. The growth is constrained by power and cost.

•   The frequency roadmap is same as the existing MPU-CP roadmap and driven by real-time jobs (e.g., video streaming, maps, virtualization) [ http://forums.whirlpool.net.au/archive/2234398 ]. The roadmap is limited by power, which grows to ~90W in

2029 and will drive low-power design methodologies.

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Roadmaps for DRAM capacity, BW, Off-MPU BW

DRAM  capacity  /  rack  unit  (GB)  

1000000  

100000  

10000  

1000  

100  

10  

1  

2010   2015  

DRAM / Rack Unit (GB)

= 128 * 1.58

(Year – 2013)

2020   2025   2030  

DRAM  BW  (GB/s)  

3000  

2500   DRAM BW

= 51.2 * 1.26

(Year – 2013)

2000  

1500  

1000  

500  

Grows as #cores increase per rack

0  

2009   2011   2013   2015   2017   2019   2021   2023   2025   2027   2029  

Off-­‐MPU  BW  (GB/s)  

900  

800  

700  

600  

500  

400  

300  

200  

100  

0  

2009  

Off-MPU BW

= 32 * 1.28

(Year – 2013) ; Year ≤ 2019

= 144 * 1.18

(Year – 2019) ; Year > 2019

2014   2019   2024   2029   2034  

•   DRAM cap per rack unit is driven by the number of cores in a rack and redundancy due to using advanced RAID [ http://www.newegg.com/Product/

Product.aspx?Item=N82E16859107052 ] and cloud data storage needs

•   IBM expects 2TB / 1U in 2019 [https://www.power.org/wp-content/uploads/2012/10/15.-IBM-DB2_lui-v5.pdf]

•   DRAM BW is driven by faster clocks, the number of cores and smaller latency requirements for high-priority tasks (e.g., ads, maps) [ http:// www.theregister.co.uk/2013/09/04/intel_avoton_rangeley_atom_c2000 ]

•   Off-MPU BW is driven by both batch and real-time applications (e.g., queries, video streaming)

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Outline

•   Introduction: System Integration Roadmapping in ITRS2.0

•   Smartphone Driver: IoT (People)

•   Microserver Driver: IoT (Cloud)

•   IoT Driver: IoT (Things)

•   Summary

[source]   h+p://www.1.com/ww/en/internet_of_things/pdf/14-­‐09-­‐17-­‐IoTforCap.pdf  

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Definition: IoT (Things) Driver

•   IoT (Things) are extremely compact, low-power MCU platforms with sensors which can be ubiquitously deployed in the environment

•   Product (research) IN this class: Smart Dust; Nest

•   Products NOT IN this class: MEMS chip, MCU, proximity sensors

•   Why a System Driver

•   Drives display market (huge number of devices to be deployed)

•   Drives robust reliability and battery requirements to work under harsh environmental conditions

•   Drives extremely low suspend power requirement

•   Increasing performance requirement

•   Drives heterogeneous integration and connectivity requirements

(packaging, interconnect, panel technologies)

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IoT Driver Introduction

•  

IoT is a new driver (not in ITRS 1.0) for context-aware computing, harmonizing the way humans and machines connect using common public services

[Source]   h+p://www.1.com/ww/en/internet_of_things/pdf/14-­‐09-­‐17-­‐IoTforCap.pdf  

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Summary of Metrics: IoT (Things)

•   Power à sufficient lifetime without battery replacement

Lowest  system  supply  voltage  (V)

Ba+ery  capacity  (mA-­‐h)

Deep  suspend  current  (nA)

DC-­‐DC  efficiency  (%)

DC-­‐DC  power  density  (W/mm^2)

Peak  Tx/Rx  current  (mA)

•   Performance à sufficient computation capacity for applications

•   MCU  #Cores  

•   MCU  #FPUs  

•   MCU  IDD  /  Opera1on  frequency  (uA/MHz)  

•   Max  MCU  Frequency  (MHz)  

•   MCU  SRAM  Size  (KB)  

•   MCU  Flash  Size  (KB)  

•   MCU  MIPS  

•   Form factor à small system size to simplify deployment

•   MCU  Package  size  (mm^2)  

•   Peripheral à sufficient interfaces to interact with physical world

•   #Integrated  Comm.  Protocols  of  MCU  

•   #  of  MCU  GPIOs  

•   #ADC  channels  

•   ADC  resolu1ons  

•   #PWM  

•   Reliability à robustness under harsh environment

•   Life1me  #access  of  NVM  memory  

•   Device  life1me  (years)  

•   Max  system  supply  voltage  (V)  

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ITRS Challenges From IoT

•   Potential new device, interconnect roadmaps

•   Very low duty cycle to reduce the lifetime energy consumption

•   Fine-grained power modes to adapt to application contexts

•   Potential new integration technologies

•   Complex communication protocols, large bandwidth requirements

•   Heterogeneous integration in stacked ICs

(WAS) (IS) h+p://cache.freescale.com/files/microcontrollers/doc/brochure/

BRLWPWR.pdf

 

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IoT Integration Challenges

•   IoT SOCs require on-chip NVM for storing programs and data

à new NVM technology to dominate [1]

•   Fin discreteness à integrated RF, analog circuits may favor

FD-SOI over FinFET, unlike pure logic devices [2]

STM  technology  roadmap  for  IoT  SOC [2]  

Comparison  of  process  integra1on  between   floa1ng  gate  and  SONOS [1]  

 

[1]   h+p://www.cypress.com/?docID=45736  

[2]   h+p://www.ee1mes.com/document.asp?doc_id=1325866&  

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Supply Voltage, Suspend Current

•   Assumption: energy harvesting introduced in 2017

•   Lowest supply voltages drops significantly

•   Deep suspend current reaches ~10nA level concurrent with deployment of energy harvesting

Lowest  system  supply  voltage  

(energy  source)  (V)  

2  

1.5  

1  

0.5  

0  

2014   2016   2018   2020   2022   2024   2026   2028   2030  

Deep  suspend  current  (nA)  

120  

100  

80  

60  

40  

20  

0  

2014   2016   2018   2020   2022   2024   2026   2028   2030  

[source]     h+p://eh-­‐network.org/files/human_power.pdf

  h+p://www.cymbet.com/pdfs/Powering-­‐Wearable-­‐Technology-­‐and-­‐the-­‐Internet-­‐of-­‐Everything-­‐WP-­‐72-­‐10.1.pdf

 

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DC-DC Efficiency, Power Density

•   Data from published articles, product datasheets

•   Driven by low-power requirement

1.00  

0.80  

0.60  

0.40  

1.20  

DC-­‐DC  efficiency  (%)  

0.20  

0.00  

2014   2016   2018   2020   2022   2024   2026   2028   2030  

DC-­‐DC  power  density  (W/mm^2)  

3.50  

3.00  

2.50  

2.00  

1.50  

1.00  

0.50  

0.00  

2014   2016   2018   2020   2022   2024   2026   2028   2030  

Kahng ConFab-2015, 150521

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Peak Tx/Rx Current, Power

•   Power consumed by connectivity is critical to IoT

•   High peak currents inconsistent with small battery size, energy harvesting

•   Improved system-level power efficiencies expected (e.g., “do nothing well”)

Peak  Tx/Rx  current  (mA)  

Tx/Rx  power  per  bit  (uW/bit)  

60.00  

3.00  

50.00  

2.50  

40.00  

2.00  

30.00  

1.50  

20.00  

1.00  

10.00  

0.50  

0.00  

2014   2016   2018   2020   2022   2024   2026   2028   2030  

0.00  

2014   2016   2018   2020   2022   2024   2026   2028   2030  

Power overhead (normalized to BW)

= (energy per bit in uJ) / (bit/sec)

= uW/bit

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Module Footprint

•   System form factor is limited (e.g., by battery technology) in near term

•   After 2017, form factor scales as devices go to 3D / 2.5D or better analogdigital system partitioning, integration

•   Scaling of passives (number, size) eventually blocks form factor scaling

à novel solutions needed

Module  footprint  (mm^2)  

45.00  

40.00  

35.00  

30.00  

25.00  

20.00  

15.00  

10.00  

5.00  

0.00  

2014   2016   2018   2020   2022   2024   2026   2028   2030  

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Outline

•   Introduction: System Integration Roadmapping in ITRS2.0

•   Smartphone Driver: IoT (People)

•   Microserver Driver: IoT (Cloud)

•   IoT Driver: IoT (Things)

•   Summary

[source]   h+p://www.1.com/ww/en/internet_of_things/pdf/14-­‐09-­‐17-­‐IoTforCap.pdf  

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Bigger Picture

•   IoT (Things) still a developing product category

•   New applications, drivers and integration challenges are expected

•   Not-yet-roadmapped applications

•   Automobile electronics (ADAS, transportation management, selfdriving car)

•   Smart electronics (wearables, etc.) + implied big data applications

[Source]    

R.  Aschenbrenner,  “Hetero-­‐integra1on  for  cyber  physical  systems  at  wafer-­‐level  and  panel-­‐level”,  INC-­‐11,  2015.    

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Technology Requirements From Applications

•   Example: Roadmap for computer vision support

•   Middle 200X à RFID tags/facilitating routing = barcode scanning

•   Early 201X à gesture detection

•   Early 201X à transport = license plate detection

•   Middle 201X à locating people = face recognition

•   Late 201X à ubiquitous positioning = (highly sensitive) security/surveillance

•   Early 202X à physical-world web = realtime, high resolution machine vision

[source]   h+p://en.wikipedia.org/wiki/Internet_of_Things#/media/File:Internet_of_Things.png

 

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Conclusion

•   ITRS 2.0 System Integration Focus Team : roadmaps of system drivers that drive semiconductor and design technologies

•   Initial proofs of concept (2014): Smartphone, Microserver

•   2015 target: “IoT (Things)”

•   Roadmapping process based on calibration data (product teardowns and physical analyses, product datasheets), block diagram evolution, extrapolation

•   Key interactions in ITRS 2.0 with Heterogeneous Integration and Outside System Connectivity

•   Your feedback and inputs, contributions welcome!

My email: abk@ucsd.edu

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Acknowledgments

•   Dr. Juan-Antonio Carballo, Dr. Paolo Gargini

•   ITRS 2.0 System Integration Focus Team

•   Wei-Ting Jonas Chan, Siddhartha Nath and other UCSD

VLSI CAD Laboratory members

•   Recent publications:

•   J.-A. Carballo, W.-T. J. Chan, P. A. Gargini, A. B. Kahng and S. Nath,

"ITRS 2.0: Toward a Re-Framing of the Semiconductor Technology

Roadmap", Proc. ICCD , 2014, pp. 139-146.

•   W.-T. J. Chan, A. B. Kahng, S. Nath and I. Yamamoto, "The ITRS MPU and SOC System Drivers: Calibration and Implications for Design-Based

Equivalent Scaling in the Roadmap", Proc. ICCD , 2014, pp. 153-160.

•   “ITRS 2.0: Top-Down System Integration” http://semimd.com/blog/2015/04/22/itrs-2-0-top-down-system-integration/

•   A. B. Kahng, "The Road Ahead: Predicting the future of information technology and society", IEEE Design and Test , Nov-Dec 2012, pp.

101-102.

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Thank You !

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Computer Vision Power / Performance Reqts

•   Performance: required Mpixel/sec for CV applications

•   Power efficiency: nJ/pixel (characterized from FPGA + mobile SOC CV [1])

•   At < 0.1W, severe power challenges for CV applications on IoT/wearable devices à technology and system architecture solutions needed

500  

Required  Mpixel/sec  (data  point)  

400  

300  

Required  Mpixel/sec  (est.)  

200  

100  

0  

2005   2010   2015   2020   2025   2030   2035  

100  

Power  (W)  

10  

Power constraint ~0.1W

(from ARM roadmap)

1  

2005   2010   2015   2020   2025   2030   2035  

Year  

Resolu1on  

FPS  

Required  Mpixel/sec  

(data  point)  

Required  Mpixel/sec  

(est.)  

Energy  per  pixel  (nJ)  

Power  (W)  

2008   2009   2010   2011   2012   2013   2014   2015   2016   2017   2018   2019   2020   2021   2022   2023   2024   2025   2026   2027   2028   2029  

QVGA       VGA      

5       15      

   

   

   

   

   

   

VGA  

30  

   

   

   

   

HD720  

30  

   

   

HD1080  

30  

   

   

   

   

VGA  

240  

   

   

   

   

   

   

   

   

   

   

   

   

0.4  

   

   

0  

   

   

   

1  

   

   

5  

5  

   

6  

   

   

   

8  

   

   

10  

   

   

       

13  

231  

3  

9  

16  

231  

4  

   

20  

231  

5  

   

25  

231  

6  

28  

31  

231  

7  

   

40  

231  

9  

62  

50  

231  

12  

   

63  

231  

14  

   

79  

231  

18  

73  

99  

231  

23  

   

125  

231  

29  

   

158  

231  

36  

   

198  

231  

46  

   

249  

231  

58  

   

314  

231  

72  

   

395  

231  

91  

[1]  h+p://www.inf.ethz.ch/personal/pomarc/pubs/HoneggerIROS14.pdf  

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