comp 180
Lecture 23
Outline of Lecture
• Main Memory
• Building a Datapath
HKUST
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Computer Science
comp 180
Lecture 23
Main Memory
• A register file is a fast small amount of memory inside the processor.
• Larger amount of memory which resides outside the processor are built either using
SRAMs (Static Random Access Memory) or
DRAMs (Dynamic Random Access Memory).
• SRAMs (They are typically built using flipflops) do not need to be refreshed periodically
like DRAMs (They are typically built using
capacitors) - but are more expensive and less
dense.
• SRAMs are used for small memories (e.g.,
Cache), and DRAMs are used for large memories (e.g., main memory).
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Computer Science
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Lecture 23
Example
a 256K x 1 SRAM contains 256K entries, and
each entry is 1 bit wide.
Thus we need 18 address lines (i.e., 218 =
256K).
• A 32K x 8 SRAM has the same number of bits,
but will have 15 address lines (to address 32K
entries) and each entry holds 8 bits.
15
Address
SRAM
Chip select
32K x 8
Output enable
8
Dout[7-0]
Write enable
8
Din[7-0]
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Computer Science
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Lecture 23
Decoder
• In order to activate individual words within a
SRAM, we need a decoder to accomplish that.
Din[0]
Din[1]
Write enable
2-to-4
A
d
d
r
e
s
s
D
E
C
O
D
E
R
D
D flip-flop
C
Q
Enable
D
D flip-flop
C
Q
Enable
D
D flip-flop
C
Q
Enable
D
D flip-flop
C
Q
Enable
D
D flip-flop
C
Q
Enable
D
D flip-flop
C
Q
Enable
D
D flip-flop
C
Q
Enable
D
D flip-flop
C
Q
Enable
Dout[1]
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4
Dout[0]
Computer Science
comp 180
Lecture 23
Two-Step Decoder
• In order to solve the problem of having large
decoders for large memories, a two-step
decoding process can be used:
[14 9
-6] to
512
decod
er
Address
[5 - 0]
512
x
64
512
x
64
512
x
64
512
x
64
512
x
64
512
x
64
512
x
64
SRAM SRAM SRAM SRAM SRAM SRAM SRAM SRAM
Mux
Dou7
HKUST
512
x
64
Mux
Dout6
Mux
Mux
Mux
Mux
Mux
Mux
Dout5 Dout4 Dout3 Dout2 Dout1 Dout0
5
Computer Science
comp 180
Lecture 23
Building a Datapath
• In designing our datapath, we initially assume
that each MIPS instruction takes a single clock
cycle. Later, we will look at the more realistic
case, where each instruction takes a variable
number of clock cycles.
• The first element we need in a data path is a
memory unit to store the instructions in a program and supply an instruction given its
address.
Instruction
address
Instruction
Instruction memory
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Computer Science
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Lecture 23
• The address of the instruction being executed
is also stored in a register called program
counter (PC).
PC
Write
• We need to be able to increment the PC to
point to the next instruction. This can be done
using the ALU we designed in the previous
chapter.
Add
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Sum
Computer Science
comp 180
Lecture 23
• In order to execute an instruction, we need to
fetch the instruction, and increment (+ 4) the
program counter so that it is ready for the next
instruction.
Add
4
PC
Read
address
Instruction
Instruction memory
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Computer Science
comp 180
Lecture 23
• Next we consider the execution of R-format
instructions (R-type instructions). They all
read two registers, perform an ALU operation
(add, sub, and, or, and slt) and write the
result into a register.
op
rs
6 bits
5 bits
rd
rt
5 bits
5 bits
shamt
funct
5 bits
6 bits
➔ To read: We need an input to the register file
that specifies the register number (5 bits) to be
read and an output (32 bits) that will carry the
value read.
➔ To write: We need to specify the register number to be written, and we need to input the data
(32 bits) that will be written into that register.
∴ We need a total of 4 inputs
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Computer Science
comp 180
Lecture 23
Read register
number 1
Read register
number 2
Read
data 1
Register file
Write
register
Write
data
Read
data 2
Write
• The ALU takes two 32-bit inputs and produces
a 32-bit result - it is controlled by a 3-bit signal
as described in our previous lectures.
ALU operation
ALU
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ALU result
Computer Science
comp 180
Lecture 23
The Data Path for R-type
Instructions
• The Data path for R-type instructions is as follows:
I
n
s
t
r
u
c
t
i
o
n
HKUST
Read
register 1
Read
data 1
Read
register 2
Registers
Write
register
Zero
ALU
ALU
result
Read
data 2
Write
data
11
Computer Science
comp 180
Lecture 23
Further Reading
Chapter 5 & Appendix B. David A. Patterson
and John L. Hennessy. Computer Organization &
Design: The Hardware / Software Interface.
Morgan Kaufman Publishers, 1998. ( 343-348 and
B-28 to B-33).
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Computer Science