Computer Arithmetic Circuit Design
Chapter 2. Representing Signed Numbers
‰ Signed-Magnitude Representation
‰ Biased Representations
‰ Complement Representations
‰ Two’s- and 1’s-complement Numbers
‰ Direct and Indirect Signed Arithmetic
‰ Using Signed Positions or Signed Digits
Ch 2. Representing Signed Numbers
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Computer Arithmetic Circuit Design
Unsigned v.s. Signed Number
‰ Chapter 1: Natural number
X Often refered to as Unsigned number
‰ Chapter 2: Signed numbers
X Include both positive and negative numbers
Ch 2. Representing Signed Numbers
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Computer Arithmetic Circuit Design
Signed-Magnitude Representation
‰
The number k of digits need for representing the number
natural ulp (unit in least significant position) to MAX is :
k=
log r MAX + 1 =
log r ( MAX + 1)
‰
Conversely,with k digits,one can represent [0, r k − 1]
‰
Signed Magnitude (or called sign-and-magnitude format)
−
−
−
−
one bit is devoted to sign
usually 1 ↔ negative
0 ↔ positive
k-1 bits are available to represent magitude
Range of k-bit signed-magnitude number is:
[-(2k-1-1), 2k-1-1]
Ch 2. Representing Signed Numbers
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Computer Arithmetic Circuit Design
Signed-Magnitude Representation
‰ Good points
− Easy to understand
‰ Bad points
– Addition of numbers with unlike sign and addition with
same sign must be handled differently
– Two encodings for 0
‰ Addition operation
− Either a subtraction is involved because of negative
number
− Or use complement representation
Ch 2. Representing Signed Numbers
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Computer Arithmetic Circuit Design
Signed-Magnitude Representation
‰
The hardware-implementation is shown below
(Figure 2-2 in the text book)
X
Based on the signs of x, y, and the operation(add or
sub), the control unit decide if x on the result must be
complemented
Sign X
X
Sign Y
Y
Selective
Compl X complement
Add/Sub
Control
C out
Adder
C in
Sign
Compl S
Ch 2. Representing Signed Numbers
Sign S
Selective
complement
S
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Computer Arithmetic Circuit Design
Biased Representation 1
‰
Adding a positive value “bias” to all number
X
Transfer [-bias, Max-bias] to [0, MAX]
for example
–8 –7 –6 –5 –7 –4 –3 –2 –1 0 1… 7
0 1 2 3 4…
...7 8 9… 15
This is called excess-8 coding
X
X
Biased representation is used to encode the exponent
part of a floating point number
Ch 2. Representing Signed Numbers
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Computer Arithmetic Circuit Design
Biased Representation 2
‰ In binary representing system, the left most bit
indicates the sign of the value.
X
X
Ex: 100(=4) + 1000(=bias)=1100
0 = negative, 1 = positive
‰ Usually in other system
X 0 : positive,
X 1: negative
Ch 2. Representing Signed Numbers
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Computer Arithmetic Circuit Design
Biased Representation 3
‰ Addition is not simplified
x + y ⇒ (x + bias) + (y + bias) = x + y + 2bias
the result should be : x + y + bias = (x + y + 2bias) - bias
‰ Multiplication and division become more difficult
X
Unless multiplication and division never happen, biased
representation is impractical
Ch 2. Representing Signed Numbers
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Computer Arithmetic Circuit Design
Converting biased numbers1
xbias = x + bias
⇒ x = xbias − bias
=
k −1
k −1
∑ xi 2 − ∑ bi 2
i= 0
i
i
i= 0
 xi if bi = 0 i
= ∑
2
i= 0 

 ( xi -1) if bi = 1 
k −1
Ch 2. Representing Signed Numbers
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Computer Arithmetic Circuit Design
Converting biased numbers2
‰ Example:
− Bias: 195 (= 11000011)
− X: -49
− Xbiased: 146 = (-49+195)
= 10010010
+ Value
- Value
0
1
0
1
0
1
-1
0
11000011
-1→ 0
--++++-7
6
5
4
0
10010010 = 0 ⋅ 2 − 1 ⋅ 2 + 0 ⋅ 2 + 1 ⋅ 2 + ⋅⋅⋅ − 1 ⋅ 2
-1
Ch 2. Representing Signed Numbers
= −49
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Computer Arithmetic Circuit Design
Complement Representation
‰ Like biased representation, except:
–
–
Only negative numbers are biased
Bias M is large enough to bias negative numbers above the
positive number range
{
xcomp−M =
x < 0: x +M
x ≥ 0: x
‰ Use M-X to represent –X
‰ Assume: To represent [-N,+P]
Then M ≥ N + P + 1
Usually M = N + P + 1 is used
M is called complementation constant
Ch 2. Representing Signed Numbers
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Computer Arithmetic Circuit Design
Addition in complement number system
‰ Assume the complementation constant M and
range [-N,+P]
Desired
operation
Computation to be Correct result
performed mod M with no overflow
Overflow
condition
(+x)+(+y)
x+y
x+y
x+y > P
(+x)+(-y)
x+(M-y)
x-y
if y ≤ x
M-(y-x) if y > x
N/A
(-x)+(+y)
(M-x)+y
y-x
if x ≤ y
M-(x-y) if x > y
N/A
(-x)+(-y)
(M-x)+(M-y)
M-(x+y)
x+y > N
TABLE 2.1 in the text book
Ch 2. Representing Signed Numbers
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Computer Arithmetic Circuit Design
Complement Representation
‰ Two Auxiliary operations are required for complement
representation
1: complementation (computing M-X)
2: computation of residues mod M
‰ M must be selected such that these two operations are
simplified
Example: Assume M = 256, and -x = -20 , y = 30,
x Complement: 256-20=236 need subtraction
y+(-x) = (266)mod 256 = 10 need residue Mod
Ch 2. Representing Signed Numbers
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Computer Arithmetic Circuit Design
Complement Representation
‰ Two good choices :
k
M
=
r
X Radix complement
X Digit on diminished–radix complement
M = r k − ulp
ulp : unit in least significant position
‰ Subtraction is performed by
X complementing the subtrahend
X performing addition modulo-M
‰ Addition and subtraction are essentially the same
operation
‰ This is the primary advantage of complement
representations
Ch 2. Representing Signed Numbers
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Computer Arithmetic Circuit Design
Two’s- and 1’s complement1
‰ Two’s complement, r=2, M=2k
M − x = 2k − x = [(2k − ulp ) − x] + ulp
= x compl + ulp
Bit-wise Complement
For x = 1011
2k = 10000
2k-1 = 1111
2k-1- x = 1111 – 1011
= 0100
Ch 2. Representing Signed Numbers
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Computer Arithmetic Circuit Design
Two’s- and 1’s complement2
‰ 1‘s complement
M = 2k – ulp, if ulp = 1, M = 2k-1
M - x = (2k-ulp) - x = xcomple
‰ Adder/Subtractor for 2’s-complement numbers
X
Y
Selective
complement
Add/Sub
Fig 2.7
y or yc
C out
Adder
C in
x+y
or x-y
Ch 2. Representing Signed Numbers
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Computer Arithmetic Circuit Design
Two’s- and 1’s- complement3
‰ 2’s complement is the favored choice in all modern
digital system
‰ Padding for equal length
-2’s complement
…Xk-1 Xk-1 Xk-2 … X1 X0. X-1 X-2… X-l0…
-1’s complement
…Xk-1 Xk-1 Xk-2 … X1 X0 .X-1 X-2 … X-l Xk-1 Xk-1 …
Ch 2. Representing Signed Numbers
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Computer Arithmetic Circuit Design
Direct Method and Indirect Method1
‰
Direct Method:
X
‰
Use one hardware for signed addition and
subtraction (avoid using separate addition and
subtraction units)
Indirect Method
X The operands are converted to unsigned
values
X Indirect signed arithmetic can be performed
for multiplication or division of signed
numbers
Ch 2. Representing Signed Numbers
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Computer Arithmetic Circuit Design
Direct Method and Indirect Method2
Ch 2. Representing Signed Numbers
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Computer Arithmetic Circuit Design
Using Signed Positions or Signed Digits1
‰ Unsigned Digits Representation
X R=10, Digits:[0-9]
321= 3*102+2*101+1*100
X R=4, Digits:[0-3]
2023 = 2*43+2*41+3*40
‰ Signed Digits Representation
X R=4, Digits:[-1, 0, 1, 2]
2 1 –1 –1 =(+2)*43+(+1)*42+(-1)*41+(-1)*40
Ch 2. Representing Signed Numbers
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Computer Arithmetic Circuit Design
Using Signed Positions or Signed Digits2
‰
Example of Transformation
3 1 2 0 2 3 ← R=4, Digits:{0,3}
45 44 43 42 41 40
4-1 1 2 0 2 4-1 ← R=4, Digits:{-1,0, 1, 2}
45 44 43 42 41 40
1 -1 1 2 0 3 -1 Again replace 3 with (4-1)
46 45 44 43 42 41 40
Finally: 1 -1 1 2 1 -1 -1
Ch 2. Representing Signed Numbers
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Computer Arithmetic Circuit Design
Using Signed Positions or Signed Digits3
‰ Actually 2’s complement can be
considered signed position number
93 = 01011101
-93 = 10100011
Sign vector: (– + + + + + + +)
-93 = (-128) + 32 + 2 +1
Ch 2. Representing Signed Numbers
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Computer Arithmetic Circuit Design
Converting to another digit set1
{0,1,2,3}radix − 4 → {1,0,1,2}radix − 4
0
1
2
3
00
01
02
11
Ch 2. Representing Signed Numbers
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Computer Arithmetic Circuit Design
Converting to another digit set2
{0,1,2,3}radix − 4 → {2,1,0,1,2}radix − 4
0
1
2
3
00
01
02 1 2
11
Transfers do not propagate, and thus this
conversion is always carry-free
Ch 2. Representing Signed Numbers
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