Radovi na konferencijama (na engleskom):
1.
Milutinovic, V., Paunovic, R., Nedic, S., Jeftovic, M., “One Approach to Microprocessor Implementation
of Modem for Data Ttransmision over HF Radio,” Proceedings of the 6th Annual Symposium og the
European Association for Microprocessing and Microprogramming, EUROMICRO 80, London, England,
September 1980, pp. 107-111.
2.
Milutinovic, V., “Generalized Detection Procedre Based on the Weighting of Partial Decisions,” IEEE
International Symposium on Information Theory, Santa Monica, CA, U.S.A., February 1981.
3.
Milutinovic, V., Waldschmidt, K., “Extension of Software Tools for Firmware Engineering to Dedicated
Bit-Slice Processing,” Proceedings of the IEEE Southcon Conference, Orlando, FL, April 1982, pp. 5457.
4.
Milutinovic, V., “Bit-Slice-Based Impelmentation of a High-Level Language Architecture,” The 9th
Symposium of the European Association for Microprocessing and Microprogramming, EUROMICRO
83, Madrid, Spain, September 1983.
5.
Milutinovic, V., “One Approach to Microprocessor Implementation of 4800 b/s Data Modem for
Telephone Channels,” Proceedings of the IEEE International Conference on Acoustics, Speech, and
Signal Processing, San Diego, CA, March 1984, pp.44.11.1-44.11.4.
6.
Milutinovic, V., Furht, B., Hwang, K., Lopey-Benitez, N., Waldschmidt, K., “The Vertical Migration
Architecture: A HLL Architecture for Dedicated Real-Time Applications,” Processings of the
International Workshop on High-Level Computer Architecture, Los Angeles, CA, May 1984, pp. 7.207.27.
7.
Milutinovic, V., “On Use of the TMS 320 Microprocessor for Implementation of a 9600 b/s Data
Modem,” The 25th International Symposium on Mini and Microcomputer Applications, San Francisco,
CA, June 1984.
8.
Milutinovic, V., “On Microprcessor-Based Implementation of a 14400 b/s Data Modem,” The 26th
International Symposium on Mini and Microcomputer Applications, New York, NY, October 1984.
9.
Milutinovic, V., Roberts, D., Hwang, K., “Mapping High-Level Language Constructs into Microcode for
Improved Execution Speed,” Proceedings of the 17th IEEE/ACM Annual Workshop on
Microprogramming, New Orleans, LA, October 1984, pp. 2-11.
10.
Milutinovic, V., Fortes, J., Jamieson, L., “An MISD Multiporcessor System for Real-Time Computations
of a Class of Discrete Fourier Transforms,” Proceedings of the IEEE Real-Time Systems Symposium,
Austin, TX, December 1984, pp. 165-174.
11.
Yang, G., Milutinovic, V., “Joint VLSI/HLL Architecture Optimization,” IEEE Mini/Micro Conference,
Anaheim, CA, February 1985.
12.
Mendoza-Grado, V., Milutinovic, V., “A Vertical-Migration Architecture for Prolog,” IEEE Mini/Micro
Confernce, Anahei, CA, February 1985.
13.
Vaghar, A., Milutinovic, V., “An Anakysis of Algorithms for Microprocessor Implementation of HighSpeed Data Modems,: Proceedings of the IEEE International Conference on Acoustics, Speech, and
Signal Processing, Tampa, FL, March 1985, pp. 42.15.1-45.15.4.
14.
Milutinovic, V., Crnkovic, J., “State Transition Times for Limited Contention Multiple Access Schemes,”
Proceedings of the 13th ACM Computer Science Conference, New Orleans, LA, March 1985, pp. 330338.
15.
Milutinovic, V., Crnkovic, J., Chang, L., Siegel, H., “The LOCO Approach to disrtibuted Task Allocaton
in AIDA by VERDI,” Proceedings of the 5th International Conference on Distributed Computing
Systems, Denver, CO , May 1985, pp.359-368.
16.
Medina, D., Milutinovic, V., “Impacts of VLSI and Microprocessor-Based Design on Data
Communications,: The 11th Symposium of the European Association for Microprocessing and
Microprograming, EUROMICRO 85, Brussels, Belgium, September 1985.
17.
Fura, D., Milutinovic, V., “GaAs Microprocessorr Architectures for Numeric and Symbolic Processing,”
IEEE Westcon Conference, Chicago, IL, September 1985.
18.
McNeley, K., Milutinovic, V., “Emulation of a CISC with RISC,” Proceedings of the IEEE Mini/Micro
Conference, Chicago, IL, September 1985.
19.
Milutinovic, V., Fura, D., Helbig, W., “Impacts of GaAs on Microprocessor Architecture,” Proceesings of
the IEEE International Conference on Computer Design, Port Chester, New York, NY, October 1985
(Invited), pp. 30-40.
20.
Keirn, K., Milutinovic, V., “An Analysis of the UCB-RISC in the GaAs Enviornment,” Proceesings of
the IEEE International Conference on Computer Design, Port Chester, New York, NY, October 1985, pp.
396-399.
21.
Fortes, J., Milutinovic, V., Dock, R., Helbig, W., Moyers, W., “A High-Level Systolic Architecture for
GaAs,” Proceedings of the ACM/IEEE 19th Hawaii International Conference on System Scinece,
Honolulu, HI, January 1986, (Awarded), pp. 253-258.
22.
Milutinovic, V., Silbey, A., Fura, D., Bettinger, M., Keirn, K., Helbig, W., Heagerty, W., Zeigert, R.,
“Design Issues in GaAs Computer Systems for Efficien Execution of HLL Programs,” Proceedings of the
ACM/IEEE 19th Hawaii International Conference on System Scinece, Honolulu, HI, January 1986, pp.
238-245.
23.
Milutinovic, V., Fura, D., Helbig, W., Linn, J., “An Integrated Architecture-Compiler Approach to
Gallium Arsenide Microprocessor Design,” Proceedings of the ACM/IEEE 19th Hawaii International
Conference on System Scinece, Honolulu, HI, January 1986, pp. 75-87.
24.
Milutinovic, V., “Impacts of GaAs Technology on Computer Design,” Proceedings of the IEEE Tenth
Annual International Computer Software & Applications Conference, Chicago, IL, October 1987
(Invited), pp. 280-281.
25.
Perunicic, B., Lakhani, S., Milutinovic, V., “Modeling and Analysis of Stochastic Propagation Delays in
GaAs Adders,” Proceedings of the ACM/IEEE 21st Hawaii International Conference on System Sciences,
Kona, Hawaii, January 1988, pp. 275-286.
26.
Milutinovic, V., “Examples of Catalytic Migration for the Implementation of GaAs Mocroprocessors,”
MICROELECTRONICS-88, Zagreb, Jugoslavija, May 1988 (Invited).
27.
Helbig, W., Milutinovic, V., “A 32-bit GaAs Microprocessor,” MICROELECTRONICS-88, Sydney,
Australia, May 1988, (Invited).
28.
Gimarc, C., Milutinovic, V., Ersoy, O., “Time Complexity Modeling and Comparison of Parallel
Architectures for Fourier Transforms Oriented Algorithms,” International Conference on System
Sciences, HICSS-22, Kailua-Kona, HI, January 1989, pp. 160-170.
29.
Jung, G., Meyer, D., Milutinovic, V., “Comparison and Evaluation of Two Catalytic Migration
Approaches for the Design of Windowing-Oriented Register File Srtuctures,” International Conference on
System Sciences, HICSS-23, Kailua-Kona, HI, January 1990, pp. 58-64.
30.
Milutinovic, V., Upatising, V., Zak, S., “Mapping of Neural Networks on the Honeycomb Architecture:
Area Analysis,” International Conference on System Sciences, HICSS-23, Kailua-Kona, HI, January
1990, pp. 180-186.
31.
Perunicic, B., Milutinovic, V., Senicic, D., “Mapping of Neural Networks Related Topologies on NonPlanar Chip Structures,” IFIP Workshop on Silicon Architectures for Neural Networks, Nice, France,
November 1990, pp. II.25-II.39.
32.
Lakhani, S., Meyer, D., Milutinovic, V., Perunucic, B., “Stochastic Modeling and Analysis of
Propagation Delays in Processing Units,” International Conference on System Sciences, HICSS-24,
Kauai, Hawaii, January 1991, pp. 171-180.
33.
Jung, G., Meyer, D., Milutinovic, V., “A Flexible Register, Window Structure for Multi-Tasking,”
International Conference on System Sciences, HICSS-24, Kauai, Hawaii, January 1991, pp. 110-116.
34.
Perunicic, B., Milutinovic, V., Markovic, P., “Mapping of Neural Networks on 3-D VLSI,” International
Conference on System Sciences, HICSS-24, Kauai, Hawaii, January 1991, pp. 181-189.
35.
Aleksic, M., Milutinovic, V., “Architecture Support for Window Environment,” HICSS-92, Koloa, HI,
U.S.A., January 1992, 506-514.
36.
Tartalja, I., Milutinovic, V., “An Approach to Dynamic Software Cache Consistency Maintenance Based
on Conditional Invalidations,” HICSS-92, Koloa, HI, U.S.A., January 1992, pp. 457-466.
37.
Tomasevic, M., Milutinovic, V., “A Simulation Study of Snoopy Cache Coherence Protocols,” HICSS92, Koloa, HI, U.S.A., January 1992, pp. 427-436 (Awarded).
38.
Milutinovic, V., “Catalytic Migration: A Strategy for Creation of Technology Sensitive Microporcessor
Architectures,” EUROMICRO-92, Paris, France, September 1992 (accepted but withdrawn).
39.
Tomasevic, M., Milutinovic, V., “A Survey of Cache Consistency Protocols for Shared Memory
Multiprocessor Systems,” Proceedings of the HICSS-93, Koloa, HI, U.S.A., January 1993, pp. 863-872.
40.
Aleksic, M., Milutinovic, V., “RISC Architecture for Window Environments: A Simulation Study,”
Proceedings of the 2nd ITG/GI Workshop on Workstations: Archtekturen, Anwendungen und
Entwicklungstrends, Hagen, Germany, May 1993, pp. 17–25.
41.
Skorc, A., Milutinovic, V., “A Comparison of Two DCT Pretporcessor Architectures for VLSI Image
Compression,” Proceedings of the HICSS-94, Maui, HI, U.S.A., January 1994, pp. 312-320.
42.
Grujic, A., Tomasevic, M., Milutinovic, V., "A Simulation Study of Hardware-Oriented DSM
Approaches," Proceedings of the IEEE Region 10 Ninth Annual International Conference on Frontiers in
Computer Technology, Singapore, August 1994, pp. 386-390.
43.
Deletic, D., Lazarevic, P., Milutinovic, V., Zlatkovic, S., “Simulation Analysis of an Improved Disk
Cache Controller for Utilization of ‘Silence’,” Proceedings of the IEEE ICSI-94, San Paulo, Brasil,
August 1994 (in press).
44.
Protic, J., Tomasevic, M., Milutinovic, V., "A Survey of Distributed Shared Memory Approaches,"
Proceedings of the XVI International Symposium on Nuclear Electronics, Varna, Bulgaria, September
1994. pp. 132-136.
45.
Jovanovic, J., Tomasevic, M., Milutinovic, V., "Design Issues for a Block-Oriented Reflective System,"
Proceedings of the XVI International Symposium on Nuclear Electronics, Varna, Bulgaria, September
1994. pp. 137-141.
46.
Janicijevic, A., Jovanov, E., Raskovic, D., Milutinovic, V., "A Comparison of Two Approaches to ATM
Router Chip Design," Proceedings of the XVI International Symposium on Nuclear Electronics, Varna,
Bulgaria, September 1994. pp. 142-146.
47.
Raskovic, D., Jovanov, E., Janicijevic, A., Milutinovic, V., "An Implementation of a Hash Based ATM
Router Chip," Proceedings of the Hawaii International Conference on System Sciences (HICSS-95),
Maui, Hawaii, USA, January 1995, pp. 32-40.
48.
Protic, J., Tomasevic, M., Milutinovic, V. "A Survey of Distributed Shared Memory Systems,"
Proceedings of the Hawaii International Conference on System Sciences (HICSS-95), Maui, Hawaii,
USA, January 1995, pp. 74-84.
49.
Jovanovic, M., Tomasevic, M., Milutinovic, V., "A Simulation-Based Comparison of of Two Reflective
Memory Approaches," Proceedings of the Hawaii International Conference on System Sciences (HICSS95), Maui, Hawaii, USA, January 1995, pp. 140-149.
50.
Tartalja, I., Milutinovic, V., "A Survey of Software Solutions for Maintenance of Cache Consistency in
Shared Memory Multiprocessors," Proceedings of the Hawaii International Conference on System
Sciences (HICSS-95), Maui, Hawaii, USA, January 1995, pp. 272-282.
51.
Milutinovic, V., et al, "Some Solutions for Critical Problems in the Theory and Practice of Distributed
Shared Memory: Ideas and Implications," Proceedings of the Hawaii International Conference on System
Sciences (HICSS-96), Maui, Hawaii, USA, January 1996, pp. 276-281.
52.
Markovic, P., Milutinovic, V., "A RISC Architecture for Lossless Data Compression in Multimedia
Applications," Proceedings of the ESONE International Conference on New Trends in Data and Signal
Processing Research (ESONE RTD-95), Warszaw, Poland, September 1995, pp. 23-32.
53.
Car, A., Djuric, D., Milutinovic, V., "A RISC Architecture for JPEG," Proceedings of the ESONE
International Conference on New Trends in Data and Signal Processing Research (ESONE RTD-95),
Warszaw, Poland, September 1995, pp. 113-118.
54.
Deletic, D., Lazarevic, P., Milutinovic, V., Zlatkovic, S., "A Disc Cache Concept for Real-Time Data
Processing and its Implementation Using FPGA VLSI," Proceedings of the ESONE International
Conference on New Trends in Data and Signal Processing Research (ESONE RTD-95), Warszaw,
Poland, September 1995, pp. 129-138.
55.
Milutinovic, V., "A Research Methodology in the Field of Computer Engineering for VLSI," Proceedings
of the 20th International Conference on Microelectronics, Nis, Serbia, Yugoslavia, September 1995, pp.
811 - 816.
56.
Raskovic, D., Jovanov, E., Milutinovic, V., "A Simulation Study of Hash-Based Algorithms for
Searching in ATM Routing Tables," Proceedings of the 20th International Conference on
Microelectronics, Nis, Serbia, Yugoslavia, September 1995, pp. 851 - 854.
57.
Petrovic, M., Tartalja, I., Milutinovic, V., "Branch Mechanisms in Deep Pipelines: Reevaluating the
Existing Solutions and Proposing a New Guideline," Proceedings of the 20th International Conference on
Microelectronics, Nis, Serbia, Yugoslavia, September 1995, pp. 855 - 858.
58.
Petkovic, Z., Milutinovic, V., "An Approach to Processor Logic Design Using HDL for Silicon
Compilation," Proceedings of the 20th International Conference on Microelectronics, Nis, Serbia,
Yugoslavia, September 1995, pp. 859-862.
59.
Petkovic, Z., Milutinovic, V., "Processor Modelling for Silicon Compilation: A Methodology Derived
from Lessons Learned," Proceedings of the IFIP TC10 WG10.5 International Workshop on Logic and
Architecture Synthesis, Grenoble, France, December 1995, pp. A-1 - A-9.
60.
Milutinovic, V., Markovic, B., Tomasevic, M., Tremblay, M., "The Split Temporal/Spatial Cache: Initial
Performance Analysis," Proceedings of the Fifth International Workshop on SCI-Based HighPerformance Low-Cost Compouting SCIzzL-5, Santa Clara, California, USA, March 1996, pp. 63-69.
61.
Jovanov, E., Milutinovic. V., "A New Concept for Hardware Acceleration of Database Code,"
Proceedings of the IEEE Region 8 Eith Mediterranean Electrotechnical Conference (MELECON-96),
Bari, Italy, May 1996, pp. 162 - 165.
62.
Milutinovic. V., Tomasevic, M., Markovic, B., Tremblay, M., "A New Cache Architecture Concept: The
Split Temporal/Spatial Cache," Proceedings of the IEEE Region 8 Eith Mediterranean Electrotechnical
Conference (MELECON-96), Bari, Italy, May 1996, pp. 1108 - 1111.
63.
Davidovic, G., Ciric, J., Milutinovic, V., "Simulation Analysis and VLSI Implemenation of Suboptimal
Methods for Detection of R2 Signalling," Proceedings of the High Performance Computer Systems
HPCS-96, Ottawa, Ontario, Canada, June 1996, pp. PG25.1–PG25.17.
64.
Milutinovic, V., Markovic, B., Tomasevic, M., Tremblay, M., "The Split Temporal/Spatial Cache: Initial
Complexity Analysis," Proceedings of the Sixth International Workshop on SCI-Based HighPerformance Low-Cost Compouting SCIzzL-6, Santa Clara, California, USA, September 1996, pp. 8996.
65.
Ciric, J., Davidovic, G., Ristic-Djurovic, J., Milutinovic, V., "A Comparative Study of Adders Based on
Wave Pipelining," Proceddings of the 22nd Euromicro Conference - Beyond 2000 Hardware/Software
Design Strategies - Short Contributions, Prague, Czeck Republic, September 1996, pp. 51-56.
66.
Milutinovic, V., Milenkovic, A., Sheaffer, G., "The Cache Injection/Cofetch Architecture: Initial
Performance Evaluation," Proceedings of the IEEE MASCOTS-97, Haifa, Israel, January 1997, pp. X-1 X-2.
Radovi na konferencijama (na srpskom):
Ukupno 20 radova u toku 70ih i 80ih (jedan po pozivu), plus 20 radova posle 1.1.1990. (jedan nagrađen
- najbolji rad u sekciji za računarsku tehniku na konferenciji ETAN92).