ECOE 560: Design Methodologies and Tools for
Software/Hardware Systems
Spring 2006
Homework Assignment 3
Due 5pm, Friday, April 28, 2006
1. Sequential Equivalence
Two Moore FSM’s M1 and M2 are said to be sequentially equivalent if when they both start at
their initial state, for all sequences of inputs, they produce the same sequence of outputs. In
this problem, you are asked to write (in pencil and paper, not implement as a program) a
BDD-based implicit algorithm for checking whether two given Moore FSM’s are sequentially
equivalent.
Assume that Mj for j=1 and 2 is described as follows:
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Vector of present state variables: psj
Vector of next state variables: nsj
Vector of input variables: ij
Vector of output variables: oj
A unary relation, represented by the BDD for its characteristic function, that
describes the initial state: initj (psj)
The Boolean function initj (psj) evaluates to “true” iff the state described by the
assignment to psj is the initial state of Mj
The transition relation, represented by a BDD: transj (psj, ij, nsj)
transj (psj, ij, nsj) evaluates to “true” iff Mj can make a transition from psj to nsj when
its input is given by ij
The output function, outj (psj, oj)
outj (psj, oj) evaluates to “true” iff the output of Mj at state is psj given by oj
To solve this problem, you should think of an implicit BFS where the same inputs drive
both machines, and for each pair of states you reach, you check whether the output of the
two machines are the same.
Argue the correctness of your algorithm, i.e., show that it declares sequential equivalence
if and only if the two machines are really sequentially equivalent.
Is your algorithm guaranteed to terminate? How many iterations can your algorithm make
at the most?
2. Writing correctness properties for hardware designs
Suppose that the following are some input, state or output variables and their possible values
in a hardware system:
cache1.state: Exclusive, Shared, Invalid
cache2.state: Exclusive, Shared, Invalid
cpu1.request: None, Read, Write
cpu2.request: None, Read, Write
cpu1.state: Idle, Requesting, WaitingForRequest, ReadingResponse
cpu2.state: Idle, Requesting, WaitingForRequest, ReadingResponse
Express the following properties using a monitor, a CTL or PLTL formula. In each case,
describe what a counterexample to the property would look like.
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If at any clock cycle cpu1 is in the WaitingForRequest state, it eventually gets into
the Idle state.
From any state, there should be a way for cpu1 to get into the Exclusive state.
If cpu1.request is “Read”, cpu1.state should be “Requesting” and, in the next state,
cpu1.request should be “None” and cpu1.state should be WaitingForRequest.
cpu1 and cpu2 cannot go from the WaitingForRequest state to the Requesting state
without going through the Idle state first.
If cpu1 is in the Requesting state while cpu2 is in the Idle state, then cpu2 cannot get
into the WaitingForRequest state before cpu1.
If cache1.state is Invalid, cache2.state is Shared and cpu1.request is Read,
cache1.state should not become Exclusive before it becomes Shared.
3. Program verification and analysis
On a non-trivial (more than 50 lines excluding comments) piece of C, C++ or Java code that
you are familiar with, use one of the following program analysis tools.
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Valgrind (www.valgrind.org)
ESC/Java2 (http://secure.ucd.ie/products/opensource/ESCJava2/faq.html ,
http://sort.ucd.ie/projects/escjava-eclipse/
Supply the program annotations that the tools require. If the tools cannot find any errors
or produce any warnings, insert by hand the kinds of errors that the tools check for. If you
have difficulty finding good, simple examples, you can refer to homework solutions on
the following class home pages:
http://network.ku.edu.tr/~stasiran/comp131/index.html
http://network.ku.edu.tr/~stasiran/comp241/index.html
These tools may be key in some debugging effort in the future for you. Therefore, please
pick the tool based on the language you are likely to program in in the future, not based
on the least amount of work and learning that it requires!
Include a web link to the annotated code you used and the tool output with your
homework submission. In the cases where you caught actual bugs, please include a
description of the bug fix as well.