UNIVERSIDAD DE GUADALAJARA
CENTRO UNIVERSITARIO DE CIENCIAS EXACTAS E INGENIERIAS
DIVISION ELECTRONICA Y COMPUTACION
ALUMNOS: EDGAR IGNACIO CADENA MARTINEZ.
MIGUEL ANGEL AYALA TOSCANO
FECHA: 13/03/2012
1- PRACTICE # 1
1.1-
OBJETIVO:
Implement a light intensity regulator using the micro PIC18F4550
1.2-
INTRODUCTION:
1.2.1 ADC
An analog-to-digital converter (abbreviated ADC, A/D or A to D) is a device that
converts a continuous quantity to a discrete time digitalrepresentation. An ADC may
also provide an isolated measurement. The reverse operation is performed by
a digital-to-analog converter (DAC).
Typically, an ADC is an electronic device that converts an input
analog voltage or current to a digital number proportional to the magnitude of the
voltage or current. However, some non-electronic or only partially electronic
devices, such as rotary encoders, can also be considered ADCs.
The digital output may use different coding schemes. Typically the digital output
will be a two's complement binary number that is proportional to the input, but there
are other possibilities. An encoder, for example, might output a Gray code.
UNIVERSIDAD DE GUADALAJARA
CENTRO UNIVERSITARIO DE CIENCIAS EXACTAS E INGENIERIAS
DIVISION ELECTRONICA Y COMPUTACION
ALUMNOS: EDGAR IGNACIO CADENA MARTINEZ.
MIGUEL ANGEL AYALA TOSCANO
The resolution of the converter indicates the number of discrete values it can
produce over the range of analog values. The values are usually stored
electronically in binary form, so the resolution is usually expressed in bits. In
consequence, the number of discrete values available, or "levels", is a power of
two. For example, an ADC with a resolution of 8 bits can encode an analog input to
one in 256 different levels, since 28 = 256. The values can represent the ranges
from 0 to 255 (i.e. unsigned integer) or from −128 to 127 (i.e. signed integer),
depending on the application.
Resolution can also be defined electrically, and expressed in volts. The minimum
change in voltage required to guarantee a change in the output code level is called
the least significant bit (LSB) voltage. The resolution Q of the ADC is equal to the
LSB voltage. The voltage resolution of an ADC is equal to its overall voltage
measurement range divided by the number of discrete voltage intervals:
where N is the number of voltage intervals and EFSR is the full scale voltage
range. EFSR is given by
where VRefHi and VRefLow are the upper and lower extremes,
respectively, of the voltages that can be coded.
Normally, the number of voltage intervals is given by
where M is the ADC's resolution in bits.
That is, one voltage interval is assigned per code level.
Example:




Coding scheme as in figure 1 (assume input signal x(t) = Acos(t), A
= 5V)
Full scale measurement range = -5 to 5 volts
ADC resolution is 8 bits: 28 = 256 quantization levels (codes)
ADC voltage resolution, Q = (10 V − 0 V) / 256 = 10 V / 256 ≈ 0.039
V ≈ 39 mV.
In practice, the useful resolution of a converter is limited by the
best signal-to-noise ratio (SNR) that can be achieved for a digitized
signal. An ADC can resolve a signal to only a certain number of bits of
resolution, called the effective number of bits (ENOB). One effective bit of
UNIVERSIDAD DE GUADALAJARA
CENTRO UNIVERSITARIO DE CIENCIAS EXACTAS E INGENIERIAS
DIVISION ELECTRONICA Y COMPUTACION
ALUMNOS: EDGAR IGNACIO CADENA MARTINEZ.
MIGUEL ANGEL AYALA TOSCANO
resolution changes the signal-to-noise ratio of the digitized signal by 6 dB,
if the resolution is limited by the ADC. If apreamplifier has been used
prior to A/D conversion, the noise introduced by the amplifier can be an
important contributing factor towards the overall SNR.
1.2.1.1 Response type
Most ADCs are linear types. The term linear implies that the range of
input values has a linear relationship with the output value.
Some early converters had a logarithmic response to directly
implement A-law or μ-law coding. These encodings are now achieved by
using a higher-resolution linear ADC (e.g. 12 or 16 bits) and mapping its
output to the 8-bit coded values.
1.2.1.2 Accuracy
An ADC has several sources of errors. Quantization error and (assuming
the ADC is intended to be linear) non-linearity are intrinsic to any
analog-to-digital conversion. There is also a so-called aperture
error which is due to a clock jitter and is revealed when digitizing a timevariant signal (not a constant value).
These errors are measured in a unit called the least significant bit (LSB).
In the above example of an eight-bit ADC, an error of one LSB is 1/256
of the full signal range, or about 0.4%.
1.2.1.3 Quantization error
Main article: Quantization error
Quantization error (or quantization noise) is the difference between the
original signal and the digitized signal. Hence, The magnitude of the
quantization error at the sampling instant is between zero and half of
one LSB. Quantization error is due to the finite resolution of the digital
representation of the signal, and is an unavoidable imperfection in all
types of ADCs.
1.2.1.4 Non-linearity
All ADCs suffer from non-linearity errors caused by their physical
imperfections, causing their output to deviate from a linear function (or
some other function, in the case of a deliberately non-linear ADC) of
their input. These errors can sometimes be mitigated by calibration, or
prevented by testing.
Important parameters for linearity are integral non-linearity (INL)
and differential non-linearity (DNL). These non-linearities reduce the
UNIVERSIDAD DE GUADALAJARA
CENTRO UNIVERSITARIO DE CIENCIAS EXACTAS E INGENIERIAS
DIVISION ELECTRONICA Y COMPUTACION
ALUMNOS: EDGAR IGNACIO CADENA MARTINEZ.
MIGUEL ANGEL AYALA TOSCANO
dynamic range of the signals that can be digitized by the ADC, also
reducing the effective resolution of the ADC.
1.2.2- PWM
Pulse-width modulation (PWM), or pulse-duration modulation (PDM), is a
commonly used technique for controlling power to inertial electrical devices, made
practical by modern electronic power switches.
The average value of voltage (and current) fed to the load is controlled by turning
the switch between supply and load on and off at a fast pace. The longer the
switch is on compared to the off periods, the higher the power supplied to the load
is.
The PWM switching frequency has to be much faster than what would affect the
load, which is to say the device that uses the power. Typically switchings have to
be done several times a minute in an electric stove, 120 Hz in a lamp dimmer, from
few kilohertz (kHz) to tens of kHz for a motor drive and well into the tens or
hundreds of kHz in audio amplifiers and computer power supplies.
The term duty cycle describes the proportion of 'on' time to the regular interval or
'period' of time; a low duty cycle corresponds to low power, because the power is
off for most of the time. Duty cycle is expressed in percent, 100% being fully on.
The main advantage of PWM is that power loss in the switching devices is very
low. When a switch is off there is practically no current, and when it is on, there is
almost no voltage drop across the switch. Power loss, being the product of voltage
and current, is thus in both cases close to zero. PWM also works well with digital
controls, which, because of their on/off nature, can easily set the needed duty
cycle.
PWM has also been used in certain communication systems where its duty cycle has
been used to convey information over a communications channel.
UNIVERSIDAD DE GUADALAJARA
CENTRO UNIVERSITARIO DE CIENCIAS EXACTAS E INGENIERIAS
DIVISION ELECTRONICA Y COMPUTACION
ALUMNOS: EDGAR IGNACIO CADENA MARTINEZ.
MIGUEL ANGEL AYALA TOSCANO
1.3-
DEVELOPMENT:
vcc
RV1
U1
50%
2
3
4
5
6
7
14
13
10k
33
34
35
36
37
38
39
40
RA0/AN0
RC0/T1OSO/T1CKI
RA1/AN1
RC1/T1OSI/CCP2/UOE
RA2/AN2/VREF-/CVREF
RC2/CCP1/P1A
RA3/AN3/VREF+
RC4/D-/VM
RA4/T0CKI/C1OUT/RCV
RC5/D+/VP
RA5/AN4/SS/LVDIN/C2OUT
RC6/TX/CK
RA6/OSC2/CLKO
RC7/RX/DT/SDO
OSC1/CLKI
RB0/AN12/INT0/FLT0/SDI/SDA
RB1/AN10/INT1/SCK/SCL
RB2/AN8/INT2/VMO
RB3/AN9/CCP2/VPO
RB4/AN11/KBI0/CSSPP
RB5/KBI1/PGM
RB6/KBI2/PGC
RB7/KBI3/PGD
D1
LED-BIBY
D2
18
LED-BIBY
D8
R8 R7 R6
330
330
330
D7 D6 D5
R5
330
D4
R4
330
D3
VUSB
RD0/SPP0
RD1/SPP1
RD2/SPP2
RD3/SPP3
RD4/SPP4
RD5/SPP5/P1B
RD6/SPP6/P1C
RD7/SPP7/P1D
RE0/AN5/CK1SPP
RE1/AN6/CK2SPP
RE2/AN7/OESPP
RE3/MCLR/VPP
15
16
17
23
24
25
26
19
20
21
22
27
28
29
30
D9
LED-BIBY
8
9
10
1
PIC18F4550
R3
R2
R1
330
330
330
vcc
LED-BIBY
LED-BIBY
LED-BIBY
LED-BIBY LED-BIBY
LED-BIBY
For this practice we use:
1 potentiometer 10k
1 Micro PIC18F4550
9 Leds
8 Resistances 330 Ohms
As input we take the bit A0 where we take the C.A signal , We put 8 leds for
monitoring the output of ADC, this measure we take it as duty cycle for the PWM
inside of a while Routine where decrement the value, all this time the led is turn it
on and turn it off when the time in the while condition is 0, an begin the cycle of
acquisition of the ADC again.
UNIVERSIDAD DE GUADALAJARA
CENTRO UNIVERSITARIO DE CIENCIAS EXACTAS E INGENIERIAS
DIVISION ELECTRONICA Y COMPUTACION
ALUMNOS: EDGAR IGNACIO CADENA MARTINEZ.
MIGUEL ANGEL AYALA TOSCANO
1.4-
BIBLIOGRAPHY:
http://en.wikipedia.org/wiki/Analog-to-digital_converter
http://en.wikipedia.org/wiki/Pulse-width_modulation