Experiment: #10:
Implementing Binary Adders
Marlon Myers
Digital Control
EMT1250
Professor: Prof. Patrick
1
Table of Contents:
Objective
3
Abstract
3
Questions
3
Schematic
4
Waveform
5
Data Results
6
2
Objective:
To design and test a 3-bit adder circuit with using the Quartus II
development software with the DE-2 board.
Abstract:
A Full Adder is the basic logic circuit used in addition of binary numbers.
Using Quartus II adder circuits will be constructed using the Graphic Editor. The
circuit will then be tested and its operation verified on the DE-2 board.
Name
A2
A1
A0
B2
B1
B0
Name
Cout
Sum2
Sum1
Sum0
Switch Inputs
Pin Number
Pin_V2
Pin_V1
PIN_U4
Pin_P25
PIN_N26
PIN_N25
LED Output
Pin Number
Pin_AE23
Pin_W19
PIN_AF22
PIN_AE22
Switches
SW[17]
SW[16]
SW[15]
SW[2]
SW[1]
SW[0]
LED
LEDR[0]
LEDG[2]
LEDG[1]
LEDG[0]
Question:
What is the Range of the values for an 8-bit unsigned binary number? 128-1 = 127
3
[128] [64] [32] [16] [8] [4] [2] [1]
7
6
5
4
3 2
1 0
Schematic:
4
Wave Form:
5
Data Results:
A2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
A1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
A0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
B2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
B1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
B0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Cout
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
Sum2
0
0
1
1
0
0
1
1
1
1
1
1
1
1
1
1
Sum1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
Sum0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
6